target-sh4: Use mul*2 for dmul*
[qemu/agraf.git] / hw / ide / isa.c
blobfb7bb8201db3269128fa10900e4851029f4d9782
1 /*
2 * QEMU IDE Emulation: ISA Bus support.
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include <hw/hw.h>
26 #include <hw/pc.h>
27 #include <hw/isa.h>
28 #include "block/block.h"
29 #include "sysemu/dma.h"
31 #include <hw/ide/internal.h>
33 /***********************************************************/
34 /* ISA IDE definitions */
36 typedef struct ISAIDEState {
37 ISADevice dev;
38 IDEBus bus;
39 uint32_t iobase;
40 uint32_t iobase2;
41 uint32_t isairq;
42 qemu_irq irq;
43 } ISAIDEState;
45 static void isa_ide_reset(DeviceState *d)
47 ISAIDEState *s = container_of(d, ISAIDEState, dev.qdev);
49 ide_bus_reset(&s->bus);
52 static const VMStateDescription vmstate_ide_isa = {
53 .name = "isa-ide",
54 .version_id = 3,
55 .minimum_version_id = 0,
56 .minimum_version_id_old = 0,
57 .fields = (VMStateField []) {
58 VMSTATE_IDE_BUS(bus, ISAIDEState),
59 VMSTATE_IDE_DRIVES(bus.ifs, ISAIDEState),
60 VMSTATE_END_OF_LIST()
64 static int isa_ide_initfn(ISADevice *dev)
66 ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
68 ide_bus_new(&s->bus, &s->dev.qdev, 0);
69 ide_init_ioport(&s->bus, dev, s->iobase, s->iobase2);
70 isa_init_irq(dev, &s->irq, s->isairq);
71 ide_init2(&s->bus, s->irq);
72 vmstate_register(&dev->qdev, 0, &vmstate_ide_isa, s);
73 return 0;
76 ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq,
77 DriveInfo *hd0, DriveInfo *hd1)
79 ISADevice *dev;
80 ISAIDEState *s;
82 dev = isa_create(bus, "isa-ide");
83 qdev_prop_set_uint32(&dev->qdev, "iobase", iobase);
84 qdev_prop_set_uint32(&dev->qdev, "iobase2", iobase2);
85 qdev_prop_set_uint32(&dev->qdev, "irq", isairq);
86 if (qdev_init(&dev->qdev) < 0)
87 return NULL;
89 s = DO_UPCAST(ISAIDEState, dev, dev);
90 if (hd0)
91 ide_create_drive(&s->bus, 0, hd0);
92 if (hd1)
93 ide_create_drive(&s->bus, 1, hd1);
94 return dev;
97 static Property isa_ide_properties[] = {
98 DEFINE_PROP_HEX32("iobase", ISAIDEState, iobase, 0x1f0),
99 DEFINE_PROP_HEX32("iobase2", ISAIDEState, iobase2, 0x3f6),
100 DEFINE_PROP_UINT32("irq", ISAIDEState, isairq, 14),
101 DEFINE_PROP_END_OF_LIST(),
104 static void isa_ide_class_initfn(ObjectClass *klass, void *data)
106 DeviceClass *dc = DEVICE_CLASS(klass);
107 ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
108 ic->init = isa_ide_initfn;
109 dc->fw_name = "ide";
110 dc->reset = isa_ide_reset;
111 dc->props = isa_ide_properties;
114 static const TypeInfo isa_ide_info = {
115 .name = "isa-ide",
116 .parent = TYPE_ISA_DEVICE,
117 .instance_size = sizeof(ISAIDEState),
118 .class_init = isa_ide_class_initfn,
121 static void isa_ide_register_types(void)
123 type_register_static(&isa_ide_info);
126 type_init(isa_ide_register_types)