target-tricore: Add instructions of RR opcode format, that have 0x4b as the first...
[qemu.git] / linux-user / aarch64 / 
tree62610dc39d5b7b4d5593caed23ee16cd8d9a5b1e
drwxr-xr-x   ..
-rw-r--r-- 349 syscall.h
-rw-r--r-- 10094 syscall_nr.h
-rw-r--r-- 1245 target_cpu.h
-rw-r--r-- 530 target_signal.h
-rw-r--r-- 2206 target_structs.h
-rw-r--r-- 7648 termbits.h