hw/realview_gic.c

   1 /*
   2  * ARM RealView Emulation Baseboard Interrupt Controller
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "sysbus.h"
  11
  12 #define NCPU 1
  13
  14 /* Only a single "CPU" interface is present.  */
  15 static inline int
  16 gic_get_current_cpu(void)
  17 {
  18   return 0;
  19 }
  20
  21 #include "arm_gic.c"
  22
  23 typedef struct {
  24     gic_state gic;
  25     MemoryRegion container;
  26 } RealViewGICState;
  27
  28 static void realview_gic_map_setup(RealViewGICState *s)
  29 {
  30     memory_region_init(&s->container, "realview-gic-container", 0x2000);
  31     memory_region_add_subregion(&s->container, 0, &s->gic.cpuiomem[0]);
  32     memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
  33 }
  34
  35 static int realview_gic_init(SysBusDevice *dev)
  36 {
  37     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
  38
  39     /* The GICs on the RealView boards have a fixed nonconfigurable
  40      * number of interrupt lines, so we don't need to expose this as
  41      * a qdev property.
  42      */
  43     gic_init(&s->gic, 96);
  44     realview_gic_map_setup(s);
  45     sysbus_init_mmio(dev, &s->container);
  46     return 0;
  47 }
  48
  49 static void realview_gic_class_init(ObjectClass *klass, void *data)
  50 {
  51     SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
  52
  53     sdc->init = realview_gic_init;
  54 }
  55
  56 static TypeInfo realview_gic_info = {
  57     .name          = "realview_gic",
  58     .parent        = TYPE_SYS_BUS_DEVICE,
  59     .instance_size = sizeof(RealViewGICState),
  60     .class_init    = realview_gic_class_init,
  61 };
  62
  63 static void realview_gic_register_types(void)
  64 {
  65     type_register_static(&realview_gic_info);
  66 }
  67
  68 type_init(realview_gic_register_types)