hw/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu-common.h"
   5 #include "memory.h"
   6 #include "ioport.h"
   7 #include "isa.h"
   8 #include "fdc.h"
   9 #include "net.h"
  10 #include "memory.h"
  11 #include "ioapic.h"
  12
  13 /* PC-style peripherals (also used by other machines).  */
  14
  15 /* serial.c */
  16
  17 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
  18                          CharDriverState *chr);
  19 SerialState *serial_mm_init(MemoryRegion *address_space,
  20                             target_phys_addr_t base, int it_shift,
  21                             qemu_irq irq, int baudbase,
  22                             CharDriverState *chr, enum device_endian);
  23 static inline bool serial_isa_init(ISABus *bus, int index,
  24                                    CharDriverState *chr)
  25 {
  26     ISADevice *dev;
  27
  28     dev = isa_try_create(bus, "isa-serial");
  29     if (!dev) {
  30         return false;
  31     }
  32     qdev_prop_set_uint32(&dev->qdev, "index", index);
  33     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  34     if (qdev_init(&dev->qdev) < 0) {
  35         return false;
  36     }
  37     return true;
  38 }
  39
  40 void serial_set_frequency(SerialState *s, uint32_t frequency);
  41
  42 /* parallel.c */
  43 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
  44 {
  45     ISADevice *dev;
  46
  47     dev = isa_try_create(bus, "isa-parallel");
  48     if (!dev) {
  49         return false;
  50     }
  51     qdev_prop_set_uint32(&dev->qdev, "index", index);
  52     qdev_prop_set_chr(&dev->qdev, "chardev", chr);
  53     if (qdev_init(&dev->qdev) < 0) {
  54         return false;
  55     }
  56     return true;
  57 }
  58
  59 bool parallel_mm_init(MemoryRegion *address_space,
  60                       target_phys_addr_t base, int it_shift, qemu_irq irq,
  61                       CharDriverState *chr);
  62
  63 /* i8259.c */
  64
  65 extern DeviceState *isa_pic;
  66 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
  67 qemu_irq *kvm_i8259_init(ISABus *bus);
  68 int pic_read_irq(DeviceState *d);
  69 int pic_get_output(DeviceState *d);
  70 void pic_info(Monitor *mon);
  71 void irq_info(Monitor *mon);
  72
  73 /* Global System Interrupts */
  74
  75 #define GSI_NUM_PINS IOAPIC_NUM_PINS
  76
  77 typedef struct GSIState {
  78     qemu_irq i8259_irq[ISA_NUM_IRQS];
  79     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
  80 } GSIState;
  81
  82 void gsi_handler(void *opaque, int n, int level);
  83
  84 /* vmport.c */
  85 static inline void vmport_init(ISABus *bus)
  86 {
  87     isa_create_simple(bus, "vmport");
  88 }
  89 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
  90 void vmmouse_get_data(uint32_t *data);
  91 void vmmouse_set_data(const uint32_t *data);
  92
  93 /* pckbd.c */
  94
  95 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
  96 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
  97                    MemoryRegion *region, ram_addr_t size,
  98                    target_phys_addr_t mask);
  99 void i8042_isa_mouse_fake_event(void *opaque);
 100 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
 101
 102 /* pc.c */
 103 extern int fd_bootchk;
 104
 105 void pc_register_ferr_irq(qemu_irq irq);
 106 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 107
 108 void pc_cpus_init(const char *cpu_model);
 109 void *pc_memory_init(MemoryRegion *system_memory,
 110                     const char *kernel_filename,
 111                     const char *kernel_cmdline,
 112                     const char *initrd_filename,
 113                     ram_addr_t below_4g_mem_size,
 114                     ram_addr_t above_4g_mem_size,
 115                     MemoryRegion *rom_memory,
 116                     MemoryRegion **ram_memory);
 117 qemu_irq *pc_allocate_cpu_irq(void);
 118 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 119 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
 120                           ISADevice **rtc_state,
 121                           ISADevice **floppy,
 122                           bool no_vmport);
 123 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
 124 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 125                   const char *boot_device,
 126                   ISADevice *floppy, BusState *ide0, BusState *ide1,
 127                   ISADevice *s);
 128 void pc_pci_device_init(PCIBus *pci_bus);
 129
 130 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 131 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
 132
 133 /* acpi.c */
 134 extern int acpi_enabled;
 135 extern char *acpi_tables;
 136 extern size_t acpi_tables_len;
 137
 138 void acpi_bios_init(void);
 139 int acpi_table_add(const char *table_desc);
 140
 141 /* acpi_piix.c */
 142
 143 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
 144                        qemu_irq sci_irq, qemu_irq smi_irq,
 145                        int kvm_enabled, void *fw_cfg);
 146 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
 147
 148 /* hpet.c */
 149 extern int no_hpet;
 150
 151 /* piix_pci.c */
 152 struct PCII440FXState;
 153 typedef struct PCII440FXState PCII440FXState;
 154
 155 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
 156                     ISABus **isa_bus, qemu_irq *pic,
 157                     MemoryRegion *address_space_mem,
 158                     MemoryRegion *address_space_io,
 159                     ram_addr_t ram_size,
 160                     target_phys_addr_t pci_hole_start,
 161                     target_phys_addr_t pci_hole_size,
 162                     target_phys_addr_t pci_hole64_start,
 163                     target_phys_addr_t pci_hole64_size,
 164                     MemoryRegion *pci_memory,
 165                     MemoryRegion *ram_memory);
 166
 167 /* piix4.c */
 168 extern PCIDevice *piix4_dev;
 169 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
 170
 171 /* vga.c */
 172 enum vga_retrace_method {
 173     VGA_RETRACE_DUMB,
 174     VGA_RETRACE_PRECISE
 175 };
 176
 177 extern enum vga_retrace_method vga_retrace_method;
 178
 179 int isa_vga_mm_init(target_phys_addr_t vram_base,
 180                     target_phys_addr_t ctrl_base, int it_shift,
 181                     MemoryRegion *address_space);
 182
 183 /* ne2000.c */
 184 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
 185 {
 186     ISADevice *dev;
 187
 188     qemu_check_nic_model(nd, "ne2k_isa");
 189
 190     dev = isa_try_create(bus, "ne2k_isa");
 191     if (!dev) {
 192         return false;
 193     }
 194     qdev_prop_set_uint32(&dev->qdev, "iobase", base);
 195     qdev_prop_set_uint32(&dev->qdev, "irq",    irq);
 196     qdev_set_nic_properties(&dev->qdev, nd);
 197     qdev_init_nofail(&dev->qdev);
 198     return true;
 199 }
 200
 201 /* pc_sysfw.c */
 202 void pc_system_firmware_init(MemoryRegion *rom_memory);
 203
 204 /* e820 types */
 205 #define E820_RAM        1
 206 #define E820_RESERVED   2
 207 #define E820_ACPI       3
 208 #define E820_NVS        4
 209 #define E820_UNUSABLE   5
 210
 211 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 212
 213 #endif