target-sh4/op_helper.c

   1 /*
   2  *  SH4 emulation
   3  *
   4  *  Copyright (c) 2005 Samuel Tardieu
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <assert.h>
  20 #include <stdlib.h>
  21 #include "exec.h"
  22 #include "helper.h"
  23
  24 static void cpu_restore_state_from_retaddr(void *retaddr)
  25 {
  26     TranslationBlock *tb;
  27     unsigned long pc;
  28
  29     if (retaddr) {
  30         pc = (unsigned long) retaddr;
  31         tb = tb_find_pc(pc);
  32         if (tb) {
  33             /* the PC is inside the translated code. It means that we have
  34                a virtual CPU fault */
  35             cpu_restore_state(tb, env, pc, NULL);
  36         }
  37     }
  38 }
  39
  40 #ifndef CONFIG_USER_ONLY
  41
  42 #define MMUSUFFIX _mmu
  43
  44 #define SHIFT 0
  45 #include "softmmu_template.h"
  46
  47 #define SHIFT 1
  48 #include "softmmu_template.h"
  49
  50 #define SHIFT 2
  51 #include "softmmu_template.h"
  52
  53 #define SHIFT 3
  54 #include "softmmu_template.h"
  55
  56 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
  57 {
  58     CPUState *saved_env;
  59     int ret;
  60
  61     /* XXX: hack to restore env in all cases, even if not called from
  62        generated code */
  63     saved_env = env;
  64     env = cpu_single_env;
  65     ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
  66     if (ret) {
  67         /* now we have a real cpu fault */
  68         cpu_restore_state_from_retaddr(retaddr);
  69         cpu_loop_exit();
  70     }
  71     env = saved_env;
  72 }
  73
  74 #endif
  75
  76 void helper_ldtlb(void)
  77 {
  78 #ifdef CONFIG_USER_ONLY
  79     /* XXXXX */
  80     cpu_abort(env, "Unhandled ldtlb");
  81 #else
  82     cpu_load_tlb(env);
  83 #endif
  84 }
  85
  86 static inline void raise_exception(int index, void *retaddr)
  87 {
  88     env->exception_index = index;
  89     cpu_restore_state_from_retaddr(retaddr);
  90     cpu_loop_exit();
  91 }
  92
  93 void helper_raise_illegal_instruction(void)
  94 {
  95     raise_exception(0x180, GETPC());
  96 }
  97
  98 void helper_raise_slot_illegal_instruction(void)
  99 {
 100     raise_exception(0x1a0, GETPC());
 101 }
 102
 103 void helper_raise_fpu_disable(void)
 104 {
 105     raise_exception(0x800, GETPC());
 106 }
 107
 108 void helper_raise_slot_fpu_disable(void)
 109 {
 110     raise_exception(0x820, GETPC());
 111 }
 112
 113 void helper_debug(void)
 114 {
 115     env->exception_index = EXCP_DEBUG;
 116     cpu_loop_exit();
 117 }
 118
 119 void helper_sleep(uint32_t next_pc)
 120 {
 121     env->halted = 1;
 122     env->exception_index = EXCP_HLT;
 123     env->pc = next_pc;
 124     cpu_loop_exit();
 125 }
 126
 127 void helper_trapa(uint32_t tra)
 128 {
 129     env->tra = tra << 2;
 130     raise_exception(0x160, GETPC());
 131 }
 132
 133 void helper_movcal(uint32_t address, uint32_t value)
 134 {
 135     if (cpu_sh4_is_cached (env, address))
 136     {
 137         memory_content *r = malloc (sizeof(memory_content));
 138         r->address = address;
 139         r->value = value;
 140         r->next = NULL;
 141
 142         *(env->movcal_backup_tail) = r;
 143         env->movcal_backup_tail = &(r->next);
 144     }
 145 }
 146
 147 void helper_discard_movcal_backup(void)
 148 {
 149     memory_content *current = env->movcal_backup;
 150
 151     while(current)
 152     {
 153         memory_content *next = current->next;
 154         free (current);
 155         env->movcal_backup = current = next;
 156         if (current == NULL)
 157             env->movcal_backup_tail = &(env->movcal_backup);
 158     }
 159 }
 160
 161 void helper_ocbi(uint32_t address)
 162 {
 163     memory_content **current = &(env->movcal_backup);
 164     while (*current)
 165     {
 166         uint32_t a = (*current)->address;
 167         if ((a & ~0x1F) == (address & ~0x1F))
 168         {
 169             memory_content *next = (*current)->next;
 170             stl(a, (*current)->value);
 171
 172             if (next == NULL)
 173             {
 174                 env->movcal_backup_tail = current;
 175             }
 176
 177             free (*current);
 178             *current = next;
 179             break;
 180         }
 181     }
 182 }
 183
 184 uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
 185 {
 186     uint32_t tmp0, tmp1;
 187
 188     tmp1 = arg0 + arg1;
 189     tmp0 = arg1;
 190     arg1 = tmp1 + (env->sr & 1);
 191     if (tmp0 > tmp1)
 192         env->sr |= SR_T;
 193     else
 194         env->sr &= ~SR_T;
 195     if (tmp1 > arg1)
 196         env->sr |= SR_T;
 197     return arg1;
 198 }
 199
 200 uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
 201 {
 202     uint32_t dest, src, ans;
 203
 204     if ((int32_t) arg1 >= 0)
 205         dest = 0;
 206     else
 207         dest = 1;
 208     if ((int32_t) arg0 >= 0)
 209         src = 0;
 210     else
 211         src = 1;
 212     src += dest;
 213     arg1 += arg0;
 214     if ((int32_t) arg1 >= 0)
 215         ans = 0;
 216     else
 217         ans = 1;
 218     ans += dest;
 219     if (src == 0 || src == 2) {
 220         if (ans == 1)
 221             env->sr |= SR_T;
 222         else
 223             env->sr &= ~SR_T;
 224     } else
 225         env->sr &= ~SR_T;
 226     return arg1;
 227 }
 228
 229 #define T (env->sr & SR_T)
 230 #define Q (env->sr & SR_Q ? 1 : 0)
 231 #define M (env->sr & SR_M ? 1 : 0)
 232 #define SETT env->sr |= SR_T
 233 #define CLRT env->sr &= ~SR_T
 234 #define SETQ env->sr |= SR_Q
 235 #define CLRQ env->sr &= ~SR_Q
 236 #define SETM env->sr |= SR_M
 237 #define CLRM env->sr &= ~SR_M
 238
 239 uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
 240 {
 241     uint32_t tmp0, tmp2;
 242     uint8_t old_q, tmp1 = 0xff;
 243
 244     //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
 245     old_q = Q;
 246     if ((0x80000000 & arg1) != 0)
 247         SETQ;
 248     else
 249         CLRQ;
 250     tmp2 = arg0;
 251     arg1 <<= 1;
 252     arg1 |= T;
 253     switch (old_q) {
 254     case 0:
 255         switch (M) {
 256         case 0:
 257             tmp0 = arg1;
 258             arg1 -= tmp2;
 259             tmp1 = arg1 > tmp0;
 260             switch (Q) {
 261             case 0:
 262                 if (tmp1)
 263                     SETQ;
 264                 else
 265                     CLRQ;
 266                 break;
 267             case 1:
 268                 if (tmp1 == 0)
 269                     SETQ;
 270                 else
 271                     CLRQ;
 272                 break;
 273             }
 274             break;
 275         case 1:
 276             tmp0 = arg1;
 277             arg1 += tmp2;
 278             tmp1 = arg1 < tmp0;
 279             switch (Q) {
 280             case 0:
 281                 if (tmp1 == 0)
 282                     SETQ;
 283                 else
 284                     CLRQ;
 285                 break;
 286             case 1:
 287                 if (tmp1)
 288                     SETQ;
 289                 else
 290                     CLRQ;
 291                 break;
 292             }
 293             break;
 294         }
 295         break;
 296     case 1:
 297         switch (M) {
 298         case 0:
 299             tmp0 = arg1;
 300             arg1 += tmp2;
 301             tmp1 = arg1 < tmp0;
 302             switch (Q) {
 303             case 0:
 304                 if (tmp1)
 305                     SETQ;
 306                 else
 307                     CLRQ;
 308                 break;
 309             case 1:
 310                 if (tmp1 == 0)
 311                     SETQ;
 312                 else
 313                     CLRQ;
 314                 break;
 315             }
 316             break;
 317         case 1:
 318             tmp0 = arg1;
 319             arg1 -= tmp2;
 320             tmp1 = arg1 > tmp0;
 321             switch (Q) {
 322             case 0:
 323                 if (tmp1 == 0)
 324                     SETQ;
 325                 else
 326                     CLRQ;
 327                 break;
 328             case 1:
 329                 if (tmp1)
 330                     SETQ;
 331                 else
 332                     CLRQ;
 333                 break;
 334             }
 335             break;
 336         }
 337         break;
 338     }
 339     if (Q == M)
 340         SETT;
 341     else
 342         CLRT;
 343     //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
 344     return arg1;
 345 }
 346
 347 void helper_macl(uint32_t arg0, uint32_t arg1)
 348 {
 349     int64_t res;
 350
 351     res = ((uint64_t) env->mach << 32) | env->macl;
 352     res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
 353     env->mach = (res >> 32) & 0xffffffff;
 354     env->macl = res & 0xffffffff;
 355     if (env->sr & SR_S) {
 356         if (res < 0)
 357             env->mach |= 0xffff0000;
 358         else
 359             env->mach &= 0x00007fff;
 360     }
 361 }
 362
 363 void helper_macw(uint32_t arg0, uint32_t arg1)
 364 {
 365     int64_t res;
 366
 367     res = ((uint64_t) env->mach << 32) | env->macl;
 368     res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
 369     env->mach = (res >> 32) & 0xffffffff;
 370     env->macl = res & 0xffffffff;
 371     if (env->sr & SR_S) {
 372         if (res < -0x80000000) {
 373             env->mach = 1;
 374             env->macl = 0x80000000;
 375         } else if (res > 0x000000007fffffff) {
 376             env->mach = 1;
 377             env->macl = 0x7fffffff;
 378         }
 379     }
 380 }
 381
 382 uint32_t helper_negc(uint32_t arg)
 383 {
 384     uint32_t temp;
 385
 386     temp = -arg;
 387     arg = temp - (env->sr & SR_T);
 388     if (0 < temp)
 389         env->sr |= SR_T;
 390     else
 391         env->sr &= ~SR_T;
 392     if (temp < arg)
 393         env->sr |= SR_T;
 394     return arg;
 395 }
 396
 397 uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
 398 {
 399     uint32_t tmp0, tmp1;
 400
 401     tmp1 = arg1 - arg0;
 402     tmp0 = arg1;
 403     arg1 = tmp1 - (env->sr & SR_T);
 404     if (tmp0 < tmp1)
 405         env->sr |= SR_T;
 406     else
 407         env->sr &= ~SR_T;
 408     if (tmp1 < arg1)
 409         env->sr |= SR_T;
 410     return arg1;
 411 }
 412
 413 uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
 414 {
 415     int32_t dest, src, ans;
 416
 417     if ((int32_t) arg1 >= 0)
 418         dest = 0;
 419     else
 420         dest = 1;
 421     if ((int32_t) arg0 >= 0)
 422         src = 0;
 423     else
 424         src = 1;
 425     src += dest;
 426     arg1 -= arg0;
 427     if ((int32_t) arg1 >= 0)
 428         ans = 0;
 429     else
 430         ans = 1;
 431     ans += dest;
 432     if (src == 1) {
 433         if (ans == 1)
 434             env->sr |= SR_T;
 435         else
 436             env->sr &= ~SR_T;
 437     } else
 438         env->sr &= ~SR_T;
 439     return arg1;
 440 }
 441
 442 static inline void set_t(void)
 443 {
 444     env->sr |= SR_T;
 445 }
 446
 447 static inline void clr_t(void)
 448 {
 449     env->sr &= ~SR_T;
 450 }
 451
 452 void helper_ld_fpscr(uint32_t val)
 453 {
 454     env->fpscr = val & FPSCR_MASK;
 455     if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
 456         set_float_rounding_mode(float_round_to_zero, &env->fp_status);
 457     } else {
 458         set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
 459     }
 460     set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
 461 }
 462
 463 static void update_fpscr(void *retaddr)
 464 {
 465     int xcpt, cause, enable;
 466
 467     xcpt = get_float_exception_flags(&env->fp_status);
 468
 469     /* Clear the flag entries */
 470     env->fpscr &= ~FPSCR_FLAG_MASK;
 471
 472     if (unlikely(xcpt)) {
 473         if (xcpt & float_flag_invalid) {
 474             env->fpscr |= FPSCR_FLAG_V;
 475         }
 476         if (xcpt & float_flag_divbyzero) {
 477             env->fpscr |= FPSCR_FLAG_Z;
 478         }
 479         if (xcpt & float_flag_overflow) {
 480             env->fpscr |= FPSCR_FLAG_O;
 481         }
 482         if (xcpt & float_flag_underflow) {
 483             env->fpscr |= FPSCR_FLAG_U;
 484         }
 485         if (xcpt & float_flag_inexact) {
 486             env->fpscr |= FPSCR_FLAG_I;
 487         }
 488
 489         /* Accumulate in cause entries */
 490         env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
 491                       << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
 492
 493         /* Generate an exception if enabled */
 494         cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
 495         enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
 496         if (cause & enable) {
 497             cpu_restore_state_from_retaddr(retaddr);
 498             env->exception_index = 0x120;
 499             cpu_loop_exit();
 500         }
 501     }
 502 }
 503
 504 uint32_t helper_fabs_FT(uint32_t t0)
 505 {
 506     CPU_FloatU f;
 507     f.l = t0;
 508     f.f = float32_abs(f.f);
 509     return f.l;
 510 }
 511
 512 uint64_t helper_fabs_DT(uint64_t t0)
 513 {
 514     CPU_DoubleU d;
 515     d.ll = t0;
 516     d.d = float64_abs(d.d);
 517     return d.ll;
 518 }
 519
 520 uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
 521 {
 522     CPU_FloatU f0, f1;
 523     f0.l = t0;
 524     f1.l = t1;
 525     set_float_exception_flags(0, &env->fp_status);
 526     f0.f = float32_add(f0.f, f1.f, &env->fp_status);
 527     update_fpscr(GETPC());
 528     return f0.l;
 529 }
 530
 531 uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
 532 {
 533     CPU_DoubleU d0, d1;
 534     d0.ll = t0;
 535     d1.ll = t1;
 536     set_float_exception_flags(0, &env->fp_status);
 537     d0.d = float64_add(d0.d, d1.d, &env->fp_status);
 538     update_fpscr(GETPC());
 539     return d0.ll;
 540 }
 541
 542 void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
 543 {
 544     CPU_FloatU f0, f1;
 545     int relation;
 546     f0.l = t0;
 547     f1.l = t1;
 548
 549     set_float_exception_flags(0, &env->fp_status);
 550     relation = float32_compare(f0.f, f1.f, &env->fp_status);
 551     if (unlikely(relation == float_relation_unordered)) {
 552         update_fpscr(GETPC());
 553     } else if (relation == float_relation_equal) {
 554         set_t();
 555     } else {
 556         clr_t();
 557     }
 558 }
 559
 560 void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
 561 {
 562     CPU_DoubleU d0, d1;
 563     int relation;
 564     d0.ll = t0;
 565     d1.ll = t1;
 566
 567     set_float_exception_flags(0, &env->fp_status);
 568     relation = float64_compare(d0.d, d1.d, &env->fp_status);
 569     if (unlikely(relation == float_relation_unordered)) {
 570         update_fpscr(GETPC());
 571     } else if (relation == float_relation_equal) {
 572         set_t();
 573     } else {
 574         clr_t();
 575     }
 576 }
 577
 578 void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
 579 {
 580     CPU_FloatU f0, f1;
 581     int relation;
 582     f0.l = t0;
 583     f1.l = t1;
 584
 585     set_float_exception_flags(0, &env->fp_status);
 586     relation = float32_compare(f0.f, f1.f, &env->fp_status);
 587     if (unlikely(relation == float_relation_unordered)) {
 588         update_fpscr(GETPC());
 589     } else if (relation == float_relation_greater) {
 590         set_t();
 591     } else {
 592         clr_t();
 593     }
 594 }
 595
 596 void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
 597 {
 598     CPU_DoubleU d0, d1;
 599     int relation;
 600     d0.ll = t0;
 601     d1.ll = t1;
 602
 603     set_float_exception_flags(0, &env->fp_status);
 604     relation = float64_compare(d0.d, d1.d, &env->fp_status);
 605     if (unlikely(relation == float_relation_unordered)) {
 606         update_fpscr(GETPC());
 607     } else if (relation == float_relation_greater) {
 608         set_t();
 609     } else {
 610         clr_t();
 611     }
 612 }
 613
 614 uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
 615 {
 616     CPU_DoubleU d;
 617     CPU_FloatU f;
 618     f.l = t0;
 619     set_float_exception_flags(0, &env->fp_status);
 620     d.d = float32_to_float64(f.f, &env->fp_status);
 621     update_fpscr(GETPC());
 622     return d.ll;
 623 }
 624
 625 uint32_t helper_fcnvds_DT_FT(uint64_t t0)
 626 {
 627     CPU_DoubleU d;
 628     CPU_FloatU f;
 629     d.ll = t0;
 630     set_float_exception_flags(0, &env->fp_status);
 631     f.f = float64_to_float32(d.d, &env->fp_status);
 632     update_fpscr(GETPC());
 633     return f.l;
 634 }
 635
 636 uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
 637 {
 638     CPU_FloatU f0, f1;
 639     f0.l = t0;
 640     f1.l = t1;
 641     set_float_exception_flags(0, &env->fp_status);
 642     f0.f = float32_div(f0.f, f1.f, &env->fp_status);
 643     update_fpscr(GETPC());
 644     return f0.l;
 645 }
 646
 647 uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
 648 {
 649     CPU_DoubleU d0, d1;
 650     d0.ll = t0;
 651     d1.ll = t1;
 652     set_float_exception_flags(0, &env->fp_status);
 653     d0.d = float64_div(d0.d, d1.d, &env->fp_status);
 654     update_fpscr(GETPC());
 655     return d0.ll;
 656 }
 657
 658 uint32_t helper_float_FT(uint32_t t0)
 659 {
 660     CPU_FloatU f;
 661
 662     set_float_exception_flags(0, &env->fp_status);
 663     f.f = int32_to_float32(t0, &env->fp_status);
 664     update_fpscr(GETPC());
 665
 666     return f.l;
 667 }
 668
 669 uint64_t helper_float_DT(uint32_t t0)
 670 {
 671     CPU_DoubleU d;
 672     set_float_exception_flags(0, &env->fp_status);
 673     d.d = int32_to_float64(t0, &env->fp_status);
 674     update_fpscr(GETPC());
 675     return d.ll;
 676 }
 677
 678 uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
 679 {
 680     CPU_FloatU f0, f1, f2;
 681     f0.l = t0;
 682     f1.l = t1;
 683     f2.l = t2;
 684     set_float_exception_flags(0, &env->fp_status);
 685     f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
 686     f0.f = float32_add(f0.f, f2.f, &env->fp_status);
 687     update_fpscr(GETPC());
 688
 689     return f0.l;
 690 }
 691
 692 uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
 693 {
 694     CPU_FloatU f0, f1;
 695     f0.l = t0;
 696     f1.l = t1;
 697     set_float_exception_flags(0, &env->fp_status);
 698     f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
 699     update_fpscr(GETPC());
 700     return f0.l;
 701 }
 702
 703 uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
 704 {
 705     CPU_DoubleU d0, d1;
 706     d0.ll = t0;
 707     d1.ll = t1;
 708     set_float_exception_flags(0, &env->fp_status);
 709     d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
 710     update_fpscr(GETPC());
 711
 712     return d0.ll;
 713 }
 714
 715 uint32_t helper_fneg_T(uint32_t t0)
 716 {
 717     CPU_FloatU f;
 718     f.l = t0;
 719     f.f = float32_chs(f.f);
 720     return f.l;
 721 }
 722
 723 uint32_t helper_fsqrt_FT(uint32_t t0)
 724 {
 725     CPU_FloatU f;
 726     f.l = t0;
 727     set_float_exception_flags(0, &env->fp_status);
 728     f.f = float32_sqrt(f.f, &env->fp_status);
 729     update_fpscr(GETPC());
 730     return f.l;
 731 }
 732
 733 uint64_t helper_fsqrt_DT(uint64_t t0)
 734 {
 735     CPU_DoubleU d;
 736     d.ll = t0;
 737     set_float_exception_flags(0, &env->fp_status);
 738     d.d = float64_sqrt(d.d, &env->fp_status);
 739     update_fpscr(GETPC());
 740     return d.ll;
 741 }
 742
 743 uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
 744 {
 745     CPU_FloatU f0, f1;
 746     f0.l = t0;
 747     f1.l = t1;
 748     set_float_exception_flags(0, &env->fp_status);
 749     f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
 750     update_fpscr(GETPC());
 751     return f0.l;
 752 }
 753
 754 uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
 755 {
 756     CPU_DoubleU d0, d1;
 757
 758     d0.ll = t0;
 759     d1.ll = t1;
 760     set_float_exception_flags(0, &env->fp_status);
 761     d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
 762     update_fpscr(GETPC());
 763     return d0.ll;
 764 }
 765
 766 uint32_t helper_ftrc_FT(uint32_t t0)
 767 {
 768     CPU_FloatU f;
 769     uint32_t ret;
 770     f.l = t0;
 771     set_float_exception_flags(0, &env->fp_status);
 772     ret = float32_to_int32_round_to_zero(f.f, &env->fp_status);
 773     update_fpscr(GETPC());
 774     return ret;
 775 }
 776
 777 uint32_t helper_ftrc_DT(uint64_t t0)
 778 {
 779     CPU_DoubleU d;
 780     uint32_t ret;
 781     d.ll = t0;
 782     set_float_exception_flags(0, &env->fp_status);
 783     ret = float64_to_int32_round_to_zero(d.d, &env->fp_status);
 784     update_fpscr(GETPC());
 785     return ret;
 786 }
 787
 788 void helper_fipr(uint32_t m, uint32_t n)
 789 {
 790     int bank, i;
 791     float32 r, p;
 792
 793     bank = (env->sr & FPSCR_FR) ? 16 : 0;
 794     r = float32_zero;
 795     set_float_exception_flags(0, &env->fp_status);
 796
 797     for (i = 0 ; i < 4 ; i++) {
 798         p = float32_mul(env->fregs[bank + m + i],
 799                         env->fregs[bank + n + i],
 800                         &env->fp_status);
 801         r = float32_add(r, p, &env->fp_status);
 802     }
 803     update_fpscr(GETPC());
 804
 805     env->fregs[bank + n + 3] = r;
 806 }
 807
 808 void helper_ftrv(uint32_t n)
 809 {
 810     int bank_matrix, bank_vector;
 811     int i, j;
 812     float32 r[4];
 813     float32 p;
 814
 815     bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
 816     bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
 817     set_float_exception_flags(0, &env->fp_status);
 818     for (i = 0 ; i < 4 ; i++) {
 819         r[i] = float32_zero;
 820         for (j = 0 ; j < 4 ; j++) {
 821             p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
 822                             env->fregs[bank_vector + j],
 823                             &env->fp_status);
 824             r[i] = float32_add(r[i], p, &env->fp_status);
 825         }
 826     }
 827     update_fpscr(GETPC());
 828
 829     for (i = 0 ; i < 4 ; i++) {
 830         env->fregs[bank_vector + i] = r[i];
 831     }
 832 }