target-arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include <stdio.h>
  12 #include <sys/types.h>
  13 #include <sys/ioctl.h>
  14 #include <sys/mman.h>
  15
  16 #include <linux/kvm.h>
  17
  18 #include "qemu-common.h"
  19 #include "qemu/timer.h"
  20 #include "sysemu/sysemu.h"
  21 #include "sysemu/kvm.h"
  22 #include "kvm_arm.h"
  23 #include "cpu.h"
  24 #include "internals.h"
  25 #include "hw/arm/arm.h"
  26
  27 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  28     KVM_CAP_LAST_INFO
  29 };
  30
  31 static bool cap_has_mp_state;
  32
  33 int kvm_arm_vcpu_init(CPUState *cs)
  34 {
  35     ARMCPU *cpu = ARM_CPU(cs);
  36     struct kvm_vcpu_init init;
  37
  38     init.target = cpu->kvm_target;
  39     memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
  40
  41     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  42 }
  43
  44 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
  45                                       int *fdarray,
  46                                       struct kvm_vcpu_init *init)
  47 {
  48     int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
  49
  50     kvmfd = qemu_open("/dev/kvm", O_RDWR);
  51     if (kvmfd < 0) {
  52         goto err;
  53     }
  54     vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
  55     if (vmfd < 0) {
  56         goto err;
  57     }
  58     cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
  59     if (cpufd < 0) {
  60         goto err;
  61     }
  62
  63     ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
  64     if (ret >= 0) {
  65         ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
  66         if (ret < 0) {
  67             goto err;
  68         }
  69     } else {
  70         /* Old kernel which doesn't know about the
  71          * PREFERRED_TARGET ioctl: we know it will only support
  72          * creating one kind of guest CPU which is its preferred
  73          * CPU type.
  74          */
  75         while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
  76             init->target = *cpus_to_try++;
  77             memset(init->features, 0, sizeof(init->features));
  78             ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
  79             if (ret >= 0) {
  80                 break;
  81             }
  82         }
  83         if (ret < 0) {
  84             goto err;
  85         }
  86     }
  87
  88     fdarray[0] = kvmfd;
  89     fdarray[1] = vmfd;
  90     fdarray[2] = cpufd;
  91
  92     return true;
  93
  94 err:
  95     if (cpufd >= 0) {
  96         close(cpufd);
  97     }
  98     if (vmfd >= 0) {
  99         close(vmfd);
 100     }
 101     if (kvmfd >= 0) {
 102         close(kvmfd);
 103     }
 104
 105     return false;
 106 }
 107
 108 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
 109 {
 110     int i;
 111
 112     for (i = 2; i >= 0; i--) {
 113         close(fdarray[i]);
 114     }
 115 }
 116
 117 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
 118 {
 119     ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
 120
 121     /* All we really need to set up for the 'host' CPU
 122      * is the feature bits -- we rely on the fact that the
 123      * various ID register values in ARMCPU are only used for
 124      * TCG CPUs.
 125      */
 126     if (!kvm_arm_get_host_cpu_features(ahcc)) {
 127         fprintf(stderr, "Failed to retrieve host CPU features!\n");
 128         abort();
 129     }
 130 }
 131
 132 static void kvm_arm_host_cpu_initfn(Object *obj)
 133 {
 134     ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
 135     ARMCPU *cpu = ARM_CPU(obj);
 136     CPUARMState *env = &cpu->env;
 137
 138     cpu->kvm_target = ahcc->target;
 139     cpu->dtb_compatible = ahcc->dtb_compatible;
 140     env->features = ahcc->features;
 141 }
 142
 143 static const TypeInfo host_arm_cpu_type_info = {
 144     .name = TYPE_ARM_HOST_CPU,
 145 #ifdef TARGET_AARCH64
 146     .parent = TYPE_AARCH64_CPU,
 147 #else
 148     .parent = TYPE_ARM_CPU,
 149 #endif
 150     .instance_init = kvm_arm_host_cpu_initfn,
 151     .class_init = kvm_arm_host_cpu_class_init,
 152     .class_size = sizeof(ARMHostCPUClass),
 153 };
 154
 155 int kvm_arch_init(MachineState *ms, KVMState *s)
 156 {
 157     /* For ARM interrupt delivery is always asynchronous,
 158      * whether we are using an in-kernel VGIC or not.
 159      */
 160     kvm_async_interrupts_allowed = true;
 161
 162     cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
 163
 164     type_register_static(&host_arm_cpu_type_info);
 165
 166     return 0;
 167 }
 168
 169 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
 170 {
 171     return cpu->cpu_index;
 172 }
 173
 174 /* We track all the KVM devices which need their memory addresses
 175  * passing to the kernel in a list of these structures.
 176  * When board init is complete we run through the list and
 177  * tell the kernel the base addresses of the memory regions.
 178  * We use a MemoryListener to track mapping and unmapping of
 179  * the regions during board creation, so the board models don't
 180  * need to do anything special for the KVM case.
 181  */
 182 typedef struct KVMDevice {
 183     struct kvm_arm_device_addr kda;
 184     struct kvm_device_attr kdattr;
 185     MemoryRegion *mr;
 186     QSLIST_ENTRY(KVMDevice) entries;
 187     int dev_fd;
 188 } KVMDevice;
 189
 190 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
 191
 192 static void kvm_arm_devlistener_add(MemoryListener *listener,
 193                                     MemoryRegionSection *section)
 194 {
 195     KVMDevice *kd;
 196
 197     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 198         if (section->mr == kd->mr) {
 199             kd->kda.addr = section->offset_within_address_space;
 200         }
 201     }
 202 }
 203
 204 static void kvm_arm_devlistener_del(MemoryListener *listener,
 205                                     MemoryRegionSection *section)
 206 {
 207     KVMDevice *kd;
 208
 209     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 210         if (section->mr == kd->mr) {
 211             kd->kda.addr = -1;
 212         }
 213     }
 214 }
 215
 216 static MemoryListener devlistener = {
 217     .region_add = kvm_arm_devlistener_add,
 218     .region_del = kvm_arm_devlistener_del,
 219 };
 220
 221 static void kvm_arm_set_device_addr(KVMDevice *kd)
 222 {
 223     struct kvm_device_attr *attr = &kd->kdattr;
 224     int ret;
 225
 226     /* If the device control API is available and we have a device fd on the
 227      * KVMDevice struct, let's use the newer API
 228      */
 229     if (kd->dev_fd >= 0) {
 230         uint64_t addr = kd->kda.addr;
 231         attr->addr = (uintptr_t)&addr;
 232         ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
 233     } else {
 234         ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
 235     }
 236
 237     if (ret < 0) {
 238         fprintf(stderr, "Failed to set device address: %s\n",
 239                 strerror(-ret));
 240         abort();
 241     }
 242 }
 243
 244 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 245 {
 246     KVMDevice *kd, *tkd;
 247
 248     memory_listener_unregister(&devlistener);
 249     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 250         if (kd->kda.addr != -1) {
 251             kvm_arm_set_device_addr(kd);
 252         }
 253         memory_region_unref(kd->mr);
 254         g_free(kd);
 255     }
 256 }
 257
 258 static Notifier notify = {
 259     .notify = kvm_arm_machine_init_done,
 260 };
 261
 262 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
 263                              uint64_t attr, int dev_fd)
 264 {
 265     KVMDevice *kd;
 266
 267     if (!kvm_irqchip_in_kernel()) {
 268         return;
 269     }
 270
 271     if (QSLIST_EMPTY(&kvm_devices_head)) {
 272         memory_listener_register(&devlistener, NULL);
 273         qemu_add_machine_init_done_notifier(&notify);
 274     }
 275     kd = g_new0(KVMDevice, 1);
 276     kd->mr = mr;
 277     kd->kda.id = devid;
 278     kd->kda.addr = -1;
 279     kd->kdattr.flags = 0;
 280     kd->kdattr.group = group;
 281     kd->kdattr.attr = attr;
 282     kd->dev_fd = dev_fd;
 283     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 284     memory_region_ref(kd->mr);
 285 }
 286
 287 static int compare_u64(const void *a, const void *b)
 288 {
 289     if (*(uint64_t *)a > *(uint64_t *)b) {
 290         return 1;
 291     }
 292     if (*(uint64_t *)a < *(uint64_t *)b) {
 293         return -1;
 294     }
 295     return 0;
 296 }
 297
 298 /* Initialize the CPUState's cpreg list according to the kernel's
 299  * definition of what CPU registers it knows about (and throw away
 300  * the previous TCG-created cpreg list).
 301  */
 302 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
 303 {
 304     struct kvm_reg_list rl;
 305     struct kvm_reg_list *rlp;
 306     int i, ret, arraylen;
 307     CPUState *cs = CPU(cpu);
 308
 309     rl.n = 0;
 310     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 311     if (ret != -E2BIG) {
 312         return ret;
 313     }
 314     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 315     rlp->n = rl.n;
 316     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 317     if (ret) {
 318         goto out;
 319     }
 320     /* Sort the list we get back from the kernel, since cpreg_tuples
 321      * must be in strictly ascending order.
 322      */
 323     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 324
 325     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 326         if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
 327             continue;
 328         }
 329         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 330         case KVM_REG_SIZE_U32:
 331         case KVM_REG_SIZE_U64:
 332             break;
 333         default:
 334             fprintf(stderr, "Can't handle size of register in kernel list\n");
 335             ret = -EINVAL;
 336             goto out;
 337         }
 338
 339         arraylen++;
 340     }
 341
 342     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 343     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 344     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 345                                          arraylen);
 346     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 347                                         arraylen);
 348     cpu->cpreg_array_len = arraylen;
 349     cpu->cpreg_vmstate_array_len = arraylen;
 350
 351     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 352         uint64_t regidx = rlp->reg[i];
 353         if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
 354             continue;
 355         }
 356         cpu->cpreg_indexes[arraylen] = regidx;
 357         arraylen++;
 358     }
 359     assert(cpu->cpreg_array_len == arraylen);
 360
 361     if (!write_kvmstate_to_list(cpu)) {
 362         /* Shouldn't happen unless kernel is inconsistent about
 363          * what registers exist.
 364          */
 365         fprintf(stderr, "Initial read of kernel register state failed\n");
 366         ret = -EINVAL;
 367         goto out;
 368     }
 369
 370 out:
 371     g_free(rlp);
 372     return ret;
 373 }
 374
 375 bool write_kvmstate_to_list(ARMCPU *cpu)
 376 {
 377     CPUState *cs = CPU(cpu);
 378     int i;
 379     bool ok = true;
 380
 381     for (i = 0; i < cpu->cpreg_array_len; i++) {
 382         struct kvm_one_reg r;
 383         uint64_t regidx = cpu->cpreg_indexes[i];
 384         uint32_t v32;
 385         int ret;
 386
 387         r.id = regidx;
 388
 389         switch (regidx & KVM_REG_SIZE_MASK) {
 390         case KVM_REG_SIZE_U32:
 391             r.addr = (uintptr_t)&v32;
 392             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 393             if (!ret) {
 394                 cpu->cpreg_values[i] = v32;
 395             }
 396             break;
 397         case KVM_REG_SIZE_U64:
 398             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 399             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 400             break;
 401         default:
 402             abort();
 403         }
 404         if (ret) {
 405             ok = false;
 406         }
 407     }
 408     return ok;
 409 }
 410
 411 bool write_list_to_kvmstate(ARMCPU *cpu)
 412 {
 413     CPUState *cs = CPU(cpu);
 414     int i;
 415     bool ok = true;
 416
 417     for (i = 0; i < cpu->cpreg_array_len; i++) {
 418         struct kvm_one_reg r;
 419         uint64_t regidx = cpu->cpreg_indexes[i];
 420         uint32_t v32;
 421         int ret;
 422
 423         r.id = regidx;
 424         switch (regidx & KVM_REG_SIZE_MASK) {
 425         case KVM_REG_SIZE_U32:
 426             v32 = cpu->cpreg_values[i];
 427             r.addr = (uintptr_t)&v32;
 428             break;
 429         case KVM_REG_SIZE_U64:
 430             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 431             break;
 432         default:
 433             abort();
 434         }
 435         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 436         if (ret) {
 437             /* We might fail for "unknown register" and also for
 438              * "you tried to set a register which is constant with
 439              * a different value from what it actually contains".
 440              */
 441             ok = false;
 442         }
 443     }
 444     return ok;
 445 }
 446
 447 void kvm_arm_reset_vcpu(ARMCPU *cpu)
 448 {
 449     int ret;
 450
 451     /* Re-init VCPU so that all registers are set to
 452      * their respective reset values.
 453      */
 454     ret = kvm_arm_vcpu_init(CPU(cpu));
 455     if (ret < 0) {
 456         fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
 457         abort();
 458     }
 459     if (!write_kvmstate_to_list(cpu)) {
 460         fprintf(stderr, "write_kvmstate_to_list failed\n");
 461         abort();
 462     }
 463 }
 464
 465 /*
 466  * Update KVM's MP_STATE based on what QEMU thinks it is
 467  */
 468 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
 469 {
 470     if (cap_has_mp_state) {
 471         struct kvm_mp_state mp_state = {
 472             .mp_state =
 473             cpu->powered_off ? KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
 474         };
 475         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
 476         if (ret) {
 477             fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
 478                     __func__, ret, strerror(-ret));
 479             return -1;
 480         }
 481     }
 482
 483     return 0;
 484 }
 485
 486 /*
 487  * Sync the KVM MP_STATE into QEMU
 488  */
 489 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
 490 {
 491     if (cap_has_mp_state) {
 492         struct kvm_mp_state mp_state;
 493         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
 494         if (ret) {
 495             fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
 496                     __func__, ret, strerror(-ret));
 497             abort();
 498         }
 499         cpu->powered_off = (mp_state.mp_state == KVM_MP_STATE_STOPPED);
 500     }
 501
 502     return 0;
 503 }
 504
 505 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 506 {
 507 }
 508
 509 void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 510 {
 511 }
 512
 513 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 514 {
 515     return 0;
 516 }
 517
 518 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 519 {
 520     return true;
 521 }
 522
 523 int kvm_arch_process_async_events(CPUState *cs)
 524 {
 525     return 0;
 526 }
 527
 528 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
 529 {
 530     return 1;
 531 }
 532
 533 int kvm_arch_on_sigbus(int code, void *addr)
 534 {
 535     return 1;
 536 }
 537
 538 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 539 {
 540     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 541 }
 542
 543 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
 544                                   struct kvm_sw_breakpoint *bp)
 545 {
 546     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 547     return -EINVAL;
 548 }
 549
 550 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
 551                                   target_ulong len, int type)
 552 {
 553     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 554     return -EINVAL;
 555 }
 556
 557 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
 558                                   target_ulong len, int type)
 559 {
 560     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 561     return -EINVAL;
 562 }
 563
 564 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
 565                                   struct kvm_sw_breakpoint *bp)
 566 {
 567     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 568     return -EINVAL;
 569 }
 570
 571 void kvm_arch_remove_all_hw_breakpoints(void)
 572 {
 573     qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
 574 }
 575
 576 void kvm_arch_init_irq_routing(KVMState *s)
 577 {
 578 }
 579
 580 int kvm_arch_irqchip_create(KVMState *s)
 581 {
 582     int ret;
 583
 584     /* If we can create the VGIC using the newer device control API, we
 585      * let the device do this when it initializes itself, otherwise we
 586      * fall back to the old API */
 587
 588     ret = kvm_create_device(s, KVM_DEV_TYPE_ARM_VGIC_V2, true);
 589     if (ret == 0) {
 590         return 1;
 591     }
 592
 593     return 0;
 594 }
 595
 596 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
 597                              uint64_t address, uint32_t data)
 598 {
 599     return 0;
 600 }