3 # tool for querying VMX capabilities
5 # Copyright 2009-2010 Red Hat, Inc.
8 # Avi Kivity <avi@redhat.com>
10 # This work is licensed under the terms of the GNU GPL, version 2. See
11 # the COPYING file in the top-level directory.
13 MSR_IA32_VMX_BASIC = 0x480
14 MSR_IA32_VMX_PINBASED_CTLS = 0x481
15 MSR_IA32_VMX_PROCBASED_CTLS = 0x482
16 MSR_IA32_VMX_EXIT_CTLS = 0x483
17 MSR_IA32_VMX_ENTRY_CTLS = 0x484
18 MSR_IA32_VMX_MISC_CTLS = 0x485
19 MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
20 MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
21 MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
22 MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
23 MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
24 MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
25 MSR_IA32_VMX_VMFUNC = 0x491
26 MSR_IA32_VMX_PROCBASED_CTLS3 = 0x492
31 self.f = open('/dev/cpu/0/msr', 'rb', 0)
33 self.f = open('/dev/msr0', 'rb', 0)
34 def read(self, index, default = None):
38 return struct.unpack('Q', self.f.read(8))[0]
42 class Control(object):
43 def __init__(self, name, bits, cap_msr, true_cap_msr = None):
46 self.cap_msr = cap_msr
47 self.true_cap_msr = true_cap_msr
51 return (val & 0xffffffff, val >> 32)
54 mb1, cb1 = self.read2(self.cap_msr)
57 tmb1, tcb1 = self.read2(self.true_cap_msr)
58 for bit in sorted(self.bits.keys()):
59 zero = not (mb1 & (1 << bit))
60 one = cb1 & (1 << bit)
61 true_zero = not (tmb1 & (1 << bit))
62 true_one = tcb1 & (1 << bit)
64 if (self.true_cap_msr and true_zero and true_one
65 and one and not zero):
67 elif zero and not one:
69 elif one and not zero:
73 print(' %-40s %s' % (self.bits[bit], s))
75 # All 64 bits in the tertiary controls MSR are allowed-1
76 class Allowed1Control(Control):
83 def __init__(self, name, bits, msr):
89 value = msr().read(self.msr, 0)
90 print(' Hex: 0x%x' % (value))
92 if type(key) is tuple:
96 for bits in sorted(self.bits.keys(), key = first_bit):
97 if type(bits) is tuple:
103 return { True: 'yes', False: 'no' }[x]
104 v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
105 print(' %-40s %s' % (self.bits[bits], fmt(v)))
109 name = 'Basic VMX Information',
112 (32,44): 'VMCS size',
113 48: 'VMCS restricted to 32 bit addresses',
114 49: 'Dual-monitor support',
115 (50, 53): 'VMCS memory type',
116 54: 'INS/OUTS instruction information',
117 55: 'IA32_VMX_TRUE_*_CTLS support',
119 msr = MSR_IA32_VMX_BASIC,
122 name = 'pin-based controls',
124 0: 'External interrupt exiting',
127 6: 'Activate VMX-preemption timer',
128 7: 'Process posted interrupts',
130 cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
131 true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
135 name = 'primary processor-based controls',
137 2: 'Interrupt window exiting',
138 3: 'Use TSC offsetting',
144 15: 'CR3-load exiting',
145 16: 'CR3-store exiting',
146 17: 'Activate tertiary controls',
147 19: 'CR8-load exiting',
148 20: 'CR8-store exiting',
149 21: 'Use TPR shadow',
150 22: 'NMI-window exiting',
151 23: 'MOV-DR exiting',
152 24: 'Unconditional I/O exiting',
153 25: 'Use I/O bitmaps',
154 27: 'Monitor trap flag',
155 28: 'Use MSR bitmaps',
156 29: 'MONITOR exiting',
158 31: 'Activate secondary control',
160 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
161 true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
165 name = 'secondary processor-based controls',
167 0: 'Virtualize APIC accesses',
169 2: 'Descriptor-table exiting',
171 4: 'Virtualize x2APIC mode',
174 7: 'Unrestricted guest',
175 8: 'APIC register emulation',
176 9: 'Virtual interrupt delivery',
177 10: 'PAUSE-loop exiting',
178 11: 'RDRAND exiting',
179 12: 'Enable INVPCID',
180 13: 'Enable VM functions',
181 14: 'VMCS shadowing',
182 15: 'Enable ENCLS exiting',
183 16: 'RDSEED exiting',
185 18: 'EPT-violation #VE',
186 19: 'Conceal non-root operation from PT',
187 20: 'Enable XSAVES/XRSTORS',
188 22: 'Mode-based execute control (XS/XU)',
189 23: 'Sub-page write permissions',
190 24: 'GPA translation for PT',
192 26: 'User wait and pause',
195 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
199 name = 'tertiary processor-based controls',
201 4: 'Enable IPI virtualization'
203 cap_msr = MSR_IA32_VMX_PROCBASED_CTLS3,
207 name = 'VM-Exit controls',
209 2: 'Save debug controls',
210 9: 'Host address-space size',
211 12: 'Load IA32_PERF_GLOBAL_CTRL',
212 15: 'Acknowledge interrupt on exit',
215 20: 'Save IA32_EFER',
216 21: 'Load IA32_EFER',
217 22: 'Save VMX-preemption timer value',
218 23: 'Clear IA32_BNDCFGS',
219 24: 'Conceal VM exits from PT',
220 25: 'Clear IA32_RTIT_CTL',
222 cap_msr = MSR_IA32_VMX_EXIT_CTLS,
223 true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
227 name = 'VM-Entry controls',
229 2: 'Load debug controls',
230 9: 'IA-32e mode guest',
232 11: 'Deactivate dual-monitor treatment',
233 13: 'Load IA32_PERF_GLOBAL_CTRL',
235 15: 'Load IA32_EFER',
236 16: 'Load IA32_BNDCFGS',
237 17: 'Conceal VM entries from PT',
238 18: 'Load IA32_RTIT_CTL',
240 cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
241 true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
245 name = 'Miscellaneous data',
247 (0,4): 'VMX-preemption timer scale (log2)',
248 5: 'Store EFER.LMA into IA-32e mode guest control',
249 6: 'HLT activity state',
250 7: 'Shutdown activity state',
251 8: 'Wait-for-SIPI activity state',
252 14: 'PT in VMX operation',
253 15: 'IA32_SMBASE support',
254 (16,24): 'Number of CR3-target values',
255 (25,27): 'MSR-load/store count recommendation',
256 28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
257 29: 'VMWRITE to VM-exit information fields',
258 30: 'Inject event with insn length=0',
259 (32,63): 'MSEG revision identifier',
261 msr = MSR_IA32_VMX_MISC_CTLS,
265 name = 'VPID and EPT capabilities',
267 0: 'Execute-only EPT translations',
268 6: 'Page-walk length 4',
269 7: 'Page-walk length 5',
270 8: 'Paging-structure memory type UC',
271 14: 'Paging-structure memory type WB',
274 20: 'INVEPT supported',
275 21: 'EPT accessed and dirty flags',
276 22: 'Advanced VM-exit information for EPT violations',
277 25: 'Single-context INVEPT',
278 26: 'All-context INVEPT',
279 32: 'INVVPID supported',
280 40: 'Individual-address INVVPID',
281 41: 'Single-context INVVPID',
282 42: 'All-context INVVPID',
283 43: 'Single-context-retaining-globals INVVPID',
285 msr = MSR_IA32_VMX_EPT_VPID_CAP,
288 name = 'VM Functions',
292 msr = MSR_IA32_VMX_VMFUNC,
296 if __name__ == '__main__':