2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * KVM/MIPS: MIPS specific KVM APIs
8 * Copyright (C) 2012-2014 Imagination Technologies Ltd.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/error-report.h"
20 #include "qemu/timer.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/kvm.h"
24 #include "sysemu/cpus.h"
26 #include "exec/memattrs.h"
30 #define DPRINTF(fmt, ...) \
31 do { if (DEBUG_KVM) { fprintf(stderr, fmt, ## __VA_ARGS__); } } while (0)
33 const KVMCapabilityInfo kvm_arch_required_capabilities
[] = {
37 static void kvm_mips_update_state(void *opaque
, int running
, RunState state
);
39 unsigned long kvm_arch_vcpu_id(CPUState
*cs
)
44 int kvm_arch_init(MachineState
*ms
, KVMState
*s
)
46 /* MIPS has 128 signals */
47 kvm_set_sigmask_len(s
, 16);
49 DPRINTF("%s\n", __func__
);
53 int kvm_arch_init_vcpu(CPUState
*cs
)
57 qemu_add_vm_change_state_handler(kvm_mips_update_state
, cs
);
59 DPRINTF("%s\n", __func__
);
63 void kvm_mips_reset_vcpu(MIPSCPU
*cpu
)
65 CPUMIPSState
*env
= &cpu
->env
;
67 if (env
->CP0_Config1
& (1 << CP0C1_FP
)) {
68 fprintf(stderr
, "Warning: FPU not supported with KVM, disabling\n");
69 env
->CP0_Config1
&= ~(1 << CP0C1_FP
);
72 DPRINTF("%s\n", __func__
);
75 int kvm_arch_insert_sw_breakpoint(CPUState
*cs
, struct kvm_sw_breakpoint
*bp
)
77 DPRINTF("%s\n", __func__
);
81 int kvm_arch_remove_sw_breakpoint(CPUState
*cs
, struct kvm_sw_breakpoint
*bp
)
83 DPRINTF("%s\n", __func__
);
87 static inline int cpu_mips_io_interrupts_pending(MIPSCPU
*cpu
)
89 CPUMIPSState
*env
= &cpu
->env
;
91 DPRINTF("%s: %#x\n", __func__
, env
->CP0_Cause
& (1 << (2 + CP0Ca_IP
)));
92 return env
->CP0_Cause
& (0x1 << (2 + CP0Ca_IP
));
96 void kvm_arch_pre_run(CPUState
*cs
, struct kvm_run
*run
)
98 MIPSCPU
*cpu
= MIPS_CPU(cs
);
100 struct kvm_mips_interrupt intr
;
102 qemu_mutex_lock_iothread();
104 if ((cs
->interrupt_request
& CPU_INTERRUPT_HARD
) &&
105 cpu_mips_io_interrupts_pending(cpu
)) {
108 r
= kvm_vcpu_ioctl(cs
, KVM_INTERRUPT
, &intr
);
110 error_report("%s: cpu %d: failed to inject IRQ %x",
111 __func__
, cs
->cpu_index
, intr
.irq
);
115 qemu_mutex_unlock_iothread();
118 MemTxAttrs
kvm_arch_post_run(CPUState
*cs
, struct kvm_run
*run
)
120 DPRINTF("%s\n", __func__
);
121 return MEMTXATTRS_UNSPECIFIED
;
124 int kvm_arch_process_async_events(CPUState
*cs
)
129 int kvm_arch_handle_exit(CPUState
*cs
, struct kvm_run
*run
)
133 DPRINTF("%s\n", __func__
);
134 switch (run
->exit_reason
) {
136 error_report("%s: unknown exit reason %d",
137 __func__
, run
->exit_reason
);
145 bool kvm_arch_stop_on_emulation_error(CPUState
*cs
)
147 DPRINTF("%s\n", __func__
);
151 int kvm_arch_on_sigbus_vcpu(CPUState
*cs
, int code
, void *addr
)
153 DPRINTF("%s\n", __func__
);
157 int kvm_arch_on_sigbus(int code
, void *addr
)
159 DPRINTF("%s\n", __func__
);
163 void kvm_arch_init_irq_routing(KVMState
*s
)
167 int kvm_mips_set_interrupt(MIPSCPU
*cpu
, int irq
, int level
)
169 CPUState
*cs
= CPU(cpu
);
170 struct kvm_mips_interrupt intr
;
172 if (!kvm_enabled()) {
184 kvm_vcpu_ioctl(cs
, KVM_INTERRUPT
, &intr
);
189 int kvm_mips_set_ipi_interrupt(MIPSCPU
*cpu
, int irq
, int level
)
191 CPUState
*cs
= current_cpu
;
192 CPUState
*dest_cs
= CPU(cpu
);
193 struct kvm_mips_interrupt intr
;
195 if (!kvm_enabled()) {
199 intr
.cpu
= dest_cs
->cpu_index
;
207 DPRINTF("%s: CPU %d, IRQ: %d\n", __func__
, intr
.cpu
, intr
.irq
);
209 kvm_vcpu_ioctl(cs
, KVM_INTERRUPT
, &intr
);
214 #define MIPS_CP0_32(_R, _S) \
215 (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
217 #define MIPS_CP0_64(_R, _S) \
218 (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S)))
220 #define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
221 #define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
222 #define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
223 #define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
224 #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
225 #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
226 #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
227 #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
228 #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
229 #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
230 #define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
231 #define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
232 #define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
233 #define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
235 static inline int kvm_mips_put_one_reg(CPUState
*cs
, uint64_t reg_id
,
238 uint64_t val64
= *addr
;
239 struct kvm_one_reg cp0reg
= {
241 .addr
= (uintptr_t)&val64
244 return kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &cp0reg
);
247 static inline int kvm_mips_put_one_ulreg(CPUState
*cs
, uint64_t reg_id
,
250 uint64_t val64
= *addr
;
251 struct kvm_one_reg cp0reg
= {
253 .addr
= (uintptr_t)&val64
256 return kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &cp0reg
);
259 static inline int kvm_mips_put_one_reg64(CPUState
*cs
, uint64_t reg_id
,
262 struct kvm_one_reg cp0reg
= {
264 .addr
= (uintptr_t)addr
267 return kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, &cp0reg
);
270 static inline int kvm_mips_get_one_reg(CPUState
*cs
, uint64_t reg_id
,
275 struct kvm_one_reg cp0reg
= {
277 .addr
= (uintptr_t)&val64
280 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &cp0reg
);
287 static inline int kvm_mips_get_one_ulreg(CPUState
*cs
, uint64 reg_id
,
292 struct kvm_one_reg cp0reg
= {
294 .addr
= (uintptr_t)&val64
297 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &cp0reg
);
304 static inline int kvm_mips_get_one_reg64(CPUState
*cs
, uint64 reg_id
,
307 struct kvm_one_reg cp0reg
= {
309 .addr
= (uintptr_t)addr
312 return kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, &cp0reg
);
316 * We freeze the KVM timer when either the VM clock is stopped or the state is
317 * saved (the state is dirty).
321 * Save the state of the KVM timer when VM clock is stopped or state is synced
324 static int kvm_mips_save_count(CPUState
*cs
)
326 MIPSCPU
*cpu
= MIPS_CPU(cs
);
327 CPUMIPSState
*env
= &cpu
->env
;
331 /* freeze KVM timer */
332 err
= kvm_mips_get_one_reg64(cs
, KVM_REG_MIPS_COUNT_CTL
, &count_ctl
);
334 DPRINTF("%s: Failed to get COUNT_CTL (%d)\n", __func__
, err
);
336 } else if (!(count_ctl
& KVM_REG_MIPS_COUNT_CTL_DC
)) {
337 count_ctl
|= KVM_REG_MIPS_COUNT_CTL_DC
;
338 err
= kvm_mips_put_one_reg64(cs
, KVM_REG_MIPS_COUNT_CTL
, &count_ctl
);
340 DPRINTF("%s: Failed to set COUNT_CTL.DC=1 (%d)\n", __func__
, err
);
346 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_CAUSE
, &env
->CP0_Cause
);
348 DPRINTF("%s: Failed to get CP0_CAUSE (%d)\n", __func__
, err
);
353 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_COUNT
, &env
->CP0_Count
);
355 DPRINTF("%s: Failed to get CP0_COUNT (%d)\n", __func__
, err
);
363 * Restore the state of the KVM timer when VM clock is restarted or state is
366 static int kvm_mips_restore_count(CPUState
*cs
)
368 MIPSCPU
*cpu
= MIPS_CPU(cs
);
369 CPUMIPSState
*env
= &cpu
->env
;
371 int err_dc
, err
, ret
= 0;
373 /* check the timer is frozen */
374 err_dc
= kvm_mips_get_one_reg64(cs
, KVM_REG_MIPS_COUNT_CTL
, &count_ctl
);
376 DPRINTF("%s: Failed to get COUNT_CTL (%d)\n", __func__
, err_dc
);
378 } else if (!(count_ctl
& KVM_REG_MIPS_COUNT_CTL_DC
)) {
379 /* freeze timer (sets COUNT_RESUME for us) */
380 count_ctl
|= KVM_REG_MIPS_COUNT_CTL_DC
;
381 err
= kvm_mips_put_one_reg64(cs
, KVM_REG_MIPS_COUNT_CTL
, &count_ctl
);
383 DPRINTF("%s: Failed to set COUNT_CTL.DC=1 (%d)\n", __func__
, err
);
389 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_CAUSE
, &env
->CP0_Cause
);
391 DPRINTF("%s: Failed to put CP0_CAUSE (%d)\n", __func__
, err
);
396 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_COUNT
, &env
->CP0_Count
);
398 DPRINTF("%s: Failed to put CP0_COUNT (%d)\n", __func__
, err
);
402 /* resume KVM timer */
404 count_ctl
&= ~KVM_REG_MIPS_COUNT_CTL_DC
;
405 err
= kvm_mips_put_one_reg64(cs
, KVM_REG_MIPS_COUNT_CTL
, &count_ctl
);
407 DPRINTF("%s: Failed to set COUNT_CTL.DC=0 (%d)\n", __func__
, err
);
416 * Handle the VM clock being started or stopped
418 static void kvm_mips_update_state(void *opaque
, int running
, RunState state
)
420 CPUState
*cs
= opaque
;
422 uint64_t count_resume
;
425 * If state is already dirty (synced to QEMU) then the KVM timer state is
426 * already saved and can be restored when it is synced back to KVM.
429 if (!cs
->kvm_vcpu_dirty
) {
430 ret
= kvm_mips_save_count(cs
);
432 fprintf(stderr
, "Failed saving count\n");
436 /* Set clock restore time to now */
437 count_resume
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
438 ret
= kvm_mips_put_one_reg64(cs
, KVM_REG_MIPS_COUNT_RESUME
,
441 fprintf(stderr
, "Failed setting COUNT_RESUME\n");
445 if (!cs
->kvm_vcpu_dirty
) {
446 ret
= kvm_mips_restore_count(cs
);
448 fprintf(stderr
, "Failed restoring count\n");
454 static int kvm_mips_put_cp0_registers(CPUState
*cs
, int level
)
456 MIPSCPU
*cpu
= MIPS_CPU(cs
);
457 CPUMIPSState
*env
= &cpu
->env
;
462 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_INDEX
, &env
->CP0_Index
);
464 DPRINTF("%s: Failed to put CP0_INDEX (%d)\n", __func__
, err
);
467 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_CONTEXT
,
470 DPRINTF("%s: Failed to put CP0_CONTEXT (%d)\n", __func__
, err
);
473 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_USERLOCAL
,
474 &env
->active_tc
.CP0_UserLocal
);
476 DPRINTF("%s: Failed to put CP0_USERLOCAL (%d)\n", __func__
, err
);
479 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_PAGEMASK
,
482 DPRINTF("%s: Failed to put CP0_PAGEMASK (%d)\n", __func__
, err
);
485 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_WIRED
, &env
->CP0_Wired
);
487 DPRINTF("%s: Failed to put CP0_WIRED (%d)\n", __func__
, err
);
490 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_HWRENA
, &env
->CP0_HWREna
);
492 DPRINTF("%s: Failed to put CP0_HWRENA (%d)\n", __func__
, err
);
495 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_BADVADDR
,
498 DPRINTF("%s: Failed to put CP0_BADVADDR (%d)\n", __func__
, err
);
502 /* If VM clock stopped then state will be restored when it is restarted */
503 if (runstate_is_running()) {
504 err
= kvm_mips_restore_count(cs
);
510 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_ENTRYHI
,
513 DPRINTF("%s: Failed to put CP0_ENTRYHI (%d)\n", __func__
, err
);
516 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_COMPARE
,
519 DPRINTF("%s: Failed to put CP0_COMPARE (%d)\n", __func__
, err
);
522 err
= kvm_mips_put_one_reg(cs
, KVM_REG_MIPS_CP0_STATUS
, &env
->CP0_Status
);
524 DPRINTF("%s: Failed to put CP0_STATUS (%d)\n", __func__
, err
);
527 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_EPC
, &env
->CP0_EPC
);
529 DPRINTF("%s: Failed to put CP0_EPC (%d)\n", __func__
, err
);
532 err
= kvm_mips_put_one_ulreg(cs
, KVM_REG_MIPS_CP0_ERROREPC
,
535 DPRINTF("%s: Failed to put CP0_ERROREPC (%d)\n", __func__
, err
);
542 static int kvm_mips_get_cp0_registers(CPUState
*cs
)
544 MIPSCPU
*cpu
= MIPS_CPU(cs
);
545 CPUMIPSState
*env
= &cpu
->env
;
548 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_INDEX
, &env
->CP0_Index
);
550 DPRINTF("%s: Failed to get CP0_INDEX (%d)\n", __func__
, err
);
553 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_CONTEXT
,
556 DPRINTF("%s: Failed to get CP0_CONTEXT (%d)\n", __func__
, err
);
559 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_USERLOCAL
,
560 &env
->active_tc
.CP0_UserLocal
);
562 DPRINTF("%s: Failed to get CP0_USERLOCAL (%d)\n", __func__
, err
);
565 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_PAGEMASK
,
568 DPRINTF("%s: Failed to get CP0_PAGEMASK (%d)\n", __func__
, err
);
571 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_WIRED
, &env
->CP0_Wired
);
573 DPRINTF("%s: Failed to get CP0_WIRED (%d)\n", __func__
, err
);
576 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_HWRENA
, &env
->CP0_HWREna
);
578 DPRINTF("%s: Failed to get CP0_HWRENA (%d)\n", __func__
, err
);
581 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_BADVADDR
,
584 DPRINTF("%s: Failed to get CP0_BADVADDR (%d)\n", __func__
, err
);
587 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_ENTRYHI
,
590 DPRINTF("%s: Failed to get CP0_ENTRYHI (%d)\n", __func__
, err
);
593 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_COMPARE
,
596 DPRINTF("%s: Failed to get CP0_COMPARE (%d)\n", __func__
, err
);
599 err
= kvm_mips_get_one_reg(cs
, KVM_REG_MIPS_CP0_STATUS
, &env
->CP0_Status
);
601 DPRINTF("%s: Failed to get CP0_STATUS (%d)\n", __func__
, err
);
605 /* If VM clock stopped then state was already saved when it was stopped */
606 if (runstate_is_running()) {
607 err
= kvm_mips_save_count(cs
);
613 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_EPC
, &env
->CP0_EPC
);
615 DPRINTF("%s: Failed to get CP0_EPC (%d)\n", __func__
, err
);
618 err
= kvm_mips_get_one_ulreg(cs
, KVM_REG_MIPS_CP0_ERROREPC
,
621 DPRINTF("%s: Failed to get CP0_ERROREPC (%d)\n", __func__
, err
);
628 int kvm_arch_put_registers(CPUState
*cs
, int level
)
630 MIPSCPU
*cpu
= MIPS_CPU(cs
);
631 CPUMIPSState
*env
= &cpu
->env
;
632 struct kvm_regs regs
;
636 /* Set the registers based on QEMU's view of things */
637 for (i
= 0; i
< 32; i
++) {
638 regs
.gpr
[i
] = env
->active_tc
.gpr
[i
];
641 regs
.hi
= env
->active_tc
.HI
[0];
642 regs
.lo
= env
->active_tc
.LO
[0];
643 regs
.pc
= env
->active_tc
.PC
;
645 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_REGS
, ®s
);
651 ret
= kvm_mips_put_cp0_registers(cs
, level
);
659 int kvm_arch_get_registers(CPUState
*cs
)
661 MIPSCPU
*cpu
= MIPS_CPU(cs
);
662 CPUMIPSState
*env
= &cpu
->env
;
664 struct kvm_regs regs
;
667 /* Get the current register set as KVM seems it */
668 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_REGS
, ®s
);
674 for (i
= 0; i
< 32; i
++) {
675 env
->active_tc
.gpr
[i
] = regs
.gpr
[i
];
678 env
->active_tc
.HI
[0] = regs
.hi
;
679 env
->active_tc
.LO
[0] = regs
.lo
;
680 env
->active_tc
.PC
= regs
.pc
;
682 kvm_mips_get_cp0_registers(cs
);
687 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route
,
688 uint64_t address
, uint32_t data
)
693 int kvm_arch_msi_data_to_gsi(uint32_t data
)