target-unicore32/cpu.c

   1 /*
   2  * QEMU UniCore32 CPU
   3  *
   4  * Copyright (c) 2010-2012 Guan Xuetao
   5  * Copyright (c) 2012 SUSE LINUX Products GmbH
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Contributions from 2012-04-01 on are considered under GPL version 2,
  12  * or (at your option) any later version.
  13  */
  14
  15 #include "cpu.h"
  16 #include "qemu-common.h"
  17 #include "migration/vmstate.h"
  18
  19 static void uc32_cpu_set_pc(CPUState *cs, vaddr value)
  20 {
  21     UniCore32CPU *cpu = UNICORE32_CPU(cs);
  22
  23     cpu->env.regs[31] = value;
  24 }
  25
  26 static bool uc32_cpu_has_work(CPUState *cs)
  27 {
  28     return cs->interrupt_request &
  29         (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
  30 }
  31
  32 static inline void set_feature(CPUUniCore32State *env, int feature)
  33 {
  34     env->features |= feature;
  35 }
  36
  37 /* CPU models */
  38
  39 static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
  40 {
  41     ObjectClass *oc;
  42     char *typename;
  43
  44     if (cpu_model == NULL) {
  45         return NULL;
  46     }
  47
  48     typename = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, cpu_model);
  49     oc = object_class_by_name(typename);
  50     g_free(typename);
  51     if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
  52                        object_class_is_abstract(oc))) {
  53         oc = NULL;
  54     }
  55     return oc;
  56 }
  57
  58 typedef struct UniCore32CPUInfo {
  59     const char *name;
  60     void (*instance_init)(Object *obj);
  61 } UniCore32CPUInfo;
  62
  63 static void unicore_ii_cpu_initfn(Object *obj)
  64 {
  65     UniCore32CPU *cpu = UNICORE32_CPU(obj);
  66     CPUUniCore32State *env = &cpu->env;
  67
  68     env->cp0.c0_cpuid = 0x4d000863;
  69     env->cp0.c0_cachetype = 0x0d152152;
  70     env->cp0.c1_sys = 0x2000;
  71     env->cp0.c2_base = 0x0;
  72     env->cp0.c3_faultstatus = 0x0;
  73     env->cp0.c4_faultaddr = 0x0;
  74     env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
  75
  76     set_feature(env, UC32_HWCAP_CMOV);
  77     set_feature(env, UC32_HWCAP_UCF64);
  78 }
  79
  80 static void uc32_any_cpu_initfn(Object *obj)
  81 {
  82     UniCore32CPU *cpu = UNICORE32_CPU(obj);
  83     CPUUniCore32State *env = &cpu->env;
  84
  85     env->cp0.c0_cpuid = 0xffffffff;
  86     env->ucf64.xregs[UC32_UCF64_FPSCR] = 0;
  87
  88     set_feature(env, UC32_HWCAP_CMOV);
  89     set_feature(env, UC32_HWCAP_UCF64);
  90 }
  91
  92 static const UniCore32CPUInfo uc32_cpus[] = {
  93     { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn },
  94     { .name = "any",        .instance_init = uc32_any_cpu_initfn },
  95 };
  96
  97 static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
  98 {
  99     UniCore32CPUClass *ucc = UNICORE32_CPU_GET_CLASS(dev);
 100
 101     qemu_init_vcpu(CPU(dev));
 102
 103     ucc->parent_realize(dev, errp);
 104 }
 105
 106 static void uc32_cpu_initfn(Object *obj)
 107 {
 108     CPUState *cs = CPU(obj);
 109     UniCore32CPU *cpu = UNICORE32_CPU(obj);
 110     CPUUniCore32State *env = &cpu->env;
 111     static bool inited;
 112
 113     cs->env_ptr = env;
 114     cpu_exec_init(env);
 115
 116 #ifdef CONFIG_USER_ONLY
 117     env->uncached_asr = ASR_MODE_USER;
 118     env->regs[31] = 0;
 119 #else
 120     env->uncached_asr = ASR_MODE_PRIV;
 121     env->regs[31] = 0x03000000;
 122 #endif
 123
 124     tlb_flush(cs, 1);
 125
 126     if (tcg_enabled() && !inited) {
 127         inited = true;
 128         uc32_translate_init();
 129     }
 130 }
 131
 132 static const VMStateDescription vmstate_uc32_cpu = {
 133     .name = "cpu",
 134     .unmigratable = 1,
 135 };
 136
 137 static void uc32_cpu_class_init(ObjectClass *oc, void *data)
 138 {
 139     DeviceClass *dc = DEVICE_CLASS(oc);
 140     CPUClass *cc = CPU_CLASS(oc);
 141     UniCore32CPUClass *ucc = UNICORE32_CPU_CLASS(oc);
 142
 143     ucc->parent_realize = dc->realize;
 144     dc->realize = uc32_cpu_realizefn;
 145
 146     cc->class_by_name = uc32_cpu_class_by_name;
 147     cc->has_work = uc32_cpu_has_work;
 148     cc->do_interrupt = uc32_cpu_do_interrupt;
 149     cc->dump_state = uc32_cpu_dump_state;
 150     cc->set_pc = uc32_cpu_set_pc;
 151 #ifdef CONFIG_USER_ONLY
 152     cc->handle_mmu_fault = uc32_cpu_handle_mmu_fault;
 153 #else
 154     cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug;
 155 #endif
 156     dc->vmsd = &vmstate_uc32_cpu;
 157 }
 158
 159 static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
 160 {
 161     TypeInfo type_info = {
 162         .parent = TYPE_UNICORE32_CPU,
 163         .instance_init = info->instance_init,
 164     };
 165
 166     type_info.name = g_strdup_printf("%s-" TYPE_UNICORE32_CPU, info->name);
 167     type_register(&type_info);
 168     g_free((void *)type_info.name);
 169 }
 170
 171 static const TypeInfo uc32_cpu_type_info = {
 172     .name = TYPE_UNICORE32_CPU,
 173     .parent = TYPE_CPU,
 174     .instance_size = sizeof(UniCore32CPU),
 175     .instance_init = uc32_cpu_initfn,
 176     .abstract = true,
 177     .class_size = sizeof(UniCore32CPUClass),
 178     .class_init = uc32_cpu_class_init,
 179 };
 180
 181 static void uc32_cpu_register_types(void)
 182 {
 183     int i;
 184
 185     type_register_static(&uc32_cpu_type_info);
 186     for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) {
 187         uc32_register_cpu_type(&uc32_cpus[i]);
 188     }
 189 }
 190
 191 type_init(uc32_cpu_register_types)