2 # RISC-V translation routines for the RVXI Base Integer Instruction Set.
4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5 # Bastian Koppelmann, kbastian@mail.uni-paderborn.de
7 # This program is free software; you can redistribute it and/or modify it
8 # under the terms and conditions of the GNU General Public License,
9 # version 2 or later, as published by the Free Software Foundation.
11 # This program is distributed in the hope it will be useful, but WITHOUT
12 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 # You should have received a copy of the GNU General Public License along with
17 # this program. If not, see <http://www.gnu.org/licenses/>.
28 %nf 29:3 !function=ex_plus_1
33 %imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1
34 %imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1
35 %imm_u 12:s20 !function=ex_shift_12
46 &atomic aq rl rs2 rs1 rd
48 &rwdvm vm wd rd rs1 rs2
50 &rnfvm vm rd rs1 rs2 nf
53 @r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd
54 @i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd
55 @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1
56 @s ....... ..... ..... ... ..... ....... &s imm=%imm_s %rs2 %rs1
57 @u .................... ..... ....... &u imm=%imm_u %rd
58 @j .................... ..... ....... &j imm=%imm_j %rd
60 @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd
61 @csr ............ ..... ... ..... ....... %csr %rs1 %rd
63 @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd
64 @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd
66 @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd
67 @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd
68 @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd
69 @r2 ....... ..... ..... ... ..... ....... %rs1 %rd
70 @r2_nfvm ... ... vm:1 ..... ..... ... ..... ....... &r2nfvm %nf %rs1 %rd
71 @r_nfvm ... ... vm:1 ..... ..... ... ..... ....... &rnfvm %nf %rs2 %rs1 %rd
72 @r_vm ...... vm:1 ..... ..... ... ..... ....... &rmrr %rs2 %rs1 %rd
73 @r_vm_1 ...... . ..... ..... ... ..... ....... &rmrr vm=1 %rs2 %rs1 %rd
74 @r_vm_0 ...... . ..... ..... ... ..... ....... &rmrr vm=0 %rs2 %rs1 %rd
75 @r_wdvm ..... wd:1 vm:1 ..... ..... ... ..... ....... &rwdvm %rs2 %rs1 %rd
76 @r2_zimm . zimm:11 ..... ... ..... ....... %rs1 %rd
78 @hfence_gvma ....... ..... ..... ... ..... ....... %rs2 %rs1
79 @hfence_vvma ....... ..... ..... ... ..... ....... %rs2 %rs1
81 @sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1
82 @sfence_vm ....... ..... ..... ... ..... ....... %rs1
85 # *** Privileged Instructions ***
86 ecall 000000000000 00000 000 00000 1110011
87 ebreak 000000000001 00000 000 00000 1110011
88 uret 0000000 00010 00000 000 00000 1110011
89 sret 0001000 00010 00000 000 00000 1110011
90 mret 0011000 00010 00000 000 00000 1110011
91 wfi 0001000 00101 00000 000 00000 1110011
92 sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma
93 sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm
95 # *** RV32I Base Instruction Set ***
96 lui .................... ..... 0110111 @u
97 auipc .................... ..... 0010111 @u
98 jal .................... ..... 1101111 @j
99 jalr ............ ..... 000 ..... 1100111 @i
100 beq ....... ..... ..... 000 ..... 1100011 @b
101 bne ....... ..... ..... 001 ..... 1100011 @b
102 blt ....... ..... ..... 100 ..... 1100011 @b
103 bge ....... ..... ..... 101 ..... 1100011 @b
104 bltu ....... ..... ..... 110 ..... 1100011 @b
105 bgeu ....... ..... ..... 111 ..... 1100011 @b
106 lb ............ ..... 000 ..... 0000011 @i
107 lh ............ ..... 001 ..... 0000011 @i
108 lw ............ ..... 010 ..... 0000011 @i
109 lbu ............ ..... 100 ..... 0000011 @i
110 lhu ............ ..... 101 ..... 0000011 @i
111 sb ....... ..... ..... 000 ..... 0100011 @s
112 sh ....... ..... ..... 001 ..... 0100011 @s
113 sw ....... ..... ..... 010 ..... 0100011 @s
114 addi ............ ..... 000 ..... 0010011 @i
115 slti ............ ..... 010 ..... 0010011 @i
116 sltiu ............ ..... 011 ..... 0010011 @i
117 xori ............ ..... 100 ..... 0010011 @i
118 ori ............ ..... 110 ..... 0010011 @i
119 andi ............ ..... 111 ..... 0010011 @i
120 slli 00.... ...... ..... 001 ..... 0010011 @sh
121 srli 00.... ...... ..... 101 ..... 0010011 @sh
122 srai 01.... ...... ..... 101 ..... 0010011 @sh
123 add 0000000 ..... ..... 000 ..... 0110011 @r
124 sub 0100000 ..... ..... 000 ..... 0110011 @r
125 sll 0000000 ..... ..... 001 ..... 0110011 @r
126 slt 0000000 ..... ..... 010 ..... 0110011 @r
127 sltu 0000000 ..... ..... 011 ..... 0110011 @r
128 xor 0000000 ..... ..... 100 ..... 0110011 @r
129 srl 0000000 ..... ..... 101 ..... 0110011 @r
130 sra 0100000 ..... ..... 101 ..... 0110011 @r
131 or 0000000 ..... ..... 110 ..... 0110011 @r
132 and 0000000 ..... ..... 111 ..... 0110011 @r
133 fence ---- pred:4 succ:4 ----- 000 ----- 0001111
134 fence_i ---- ---- ---- ----- 001 ----- 0001111
135 csrrw ............ ..... 001 ..... 1110011 @csr
136 csrrs ............ ..... 010 ..... 1110011 @csr
137 csrrc ............ ..... 011 ..... 1110011 @csr
138 csrrwi ............ ..... 101 ..... 1110011 @csr
139 csrrsi ............ ..... 110 ..... 1110011 @csr
140 csrrci ............ ..... 111 ..... 1110011 @csr
142 # *** RV32M Standard Extension ***
143 mul 0000001 ..... ..... 000 ..... 0110011 @r
144 mulh 0000001 ..... ..... 001 ..... 0110011 @r
145 mulhsu 0000001 ..... ..... 010 ..... 0110011 @r
146 mulhu 0000001 ..... ..... 011 ..... 0110011 @r
147 div 0000001 ..... ..... 100 ..... 0110011 @r
148 divu 0000001 ..... ..... 101 ..... 0110011 @r
149 rem 0000001 ..... ..... 110 ..... 0110011 @r
150 remu 0000001 ..... ..... 111 ..... 0110011 @r
152 # *** RV32A Standard Extension ***
153 lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld
154 sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st
155 amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st
156 amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st
157 amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st
158 amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st
159 amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st
160 amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st
161 amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st
162 amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st
163 amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st
165 # *** RV32F Standard Extension ***
166 flw ............ ..... 010 ..... 0000111 @i
167 fsw ....... ..... ..... 010 ..... 0100111 @s
168 fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm
169 fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm
170 fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm
171 fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm
172 fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm
173 fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm
174 fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm
175 fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm
176 fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm
177 fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r
178 fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r
179 fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r
180 fmin_s 0010100 ..... ..... 000 ..... 1010011 @r
181 fmax_s 0010100 ..... ..... 001 ..... 1010011 @r
182 fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm
183 fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm
184 fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2
185 feq_s 1010000 ..... ..... 010 ..... 1010011 @r
186 flt_s 1010000 ..... ..... 001 ..... 1010011 @r
187 fle_s 1010000 ..... ..... 000 ..... 1010011 @r
188 fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2
189 fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm
190 fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm
191 fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2
193 # *** RV32D Standard Extension ***
194 fld ............ ..... 011 ..... 0000111 @i
195 fsd ....... ..... ..... 011 ..... 0100111 @s
196 fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm
197 fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm
198 fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm
199 fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm
200 fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm
201 fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm
202 fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm
203 fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm
204 fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm
205 fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r
206 fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r
207 fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r
208 fmin_d 0010101 ..... ..... 000 ..... 1010011 @r
209 fmax_d 0010101 ..... ..... 001 ..... 1010011 @r
210 fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm
211 fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm
212 feq_d 1010001 ..... ..... 010 ..... 1010011 @r
213 flt_d 1010001 ..... ..... 001 ..... 1010011 @r
214 fle_d 1010001 ..... ..... 000 ..... 1010011 @r
215 fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2
216 fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm
217 fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm
218 fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm
219 fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm
221 # *** RV32H Base Instruction Set ***
222 hfence_gvma 0110001 ..... ..... 000 00000 1110011 @hfence_gvma
223 hfence_vvma 0010001 ..... ..... 000 00000 1110011 @hfence_vvma
225 # *** RV32V Extension ***
227 # *** Vector loads and stores are encoded within LOADFP/STORE-FP ***
228 vlb_v ... 100 . 00000 ..... 000 ..... 0000111 @r2_nfvm
229 vlh_v ... 100 . 00000 ..... 101 ..... 0000111 @r2_nfvm
230 vlw_v ... 100 . 00000 ..... 110 ..... 0000111 @r2_nfvm
231 vle_v ... 000 . 00000 ..... 111 ..... 0000111 @r2_nfvm
232 vlbu_v ... 000 . 00000 ..... 000 ..... 0000111 @r2_nfvm
233 vlhu_v ... 000 . 00000 ..... 101 ..... 0000111 @r2_nfvm
234 vlwu_v ... 000 . 00000 ..... 110 ..... 0000111 @r2_nfvm
235 vlbff_v ... 100 . 10000 ..... 000 ..... 0000111 @r2_nfvm
236 vlhff_v ... 100 . 10000 ..... 101 ..... 0000111 @r2_nfvm
237 vlwff_v ... 100 . 10000 ..... 110 ..... 0000111 @r2_nfvm
238 vleff_v ... 000 . 10000 ..... 111 ..... 0000111 @r2_nfvm
239 vlbuff_v ... 000 . 10000 ..... 000 ..... 0000111 @r2_nfvm
240 vlhuff_v ... 000 . 10000 ..... 101 ..... 0000111 @r2_nfvm
241 vlwuff_v ... 000 . 10000 ..... 110 ..... 0000111 @r2_nfvm
242 vsb_v ... 000 . 00000 ..... 000 ..... 0100111 @r2_nfvm
243 vsh_v ... 000 . 00000 ..... 101 ..... 0100111 @r2_nfvm
244 vsw_v ... 000 . 00000 ..... 110 ..... 0100111 @r2_nfvm
245 vse_v ... 000 . 00000 ..... 111 ..... 0100111 @r2_nfvm
247 vlsb_v ... 110 . ..... ..... 000 ..... 0000111 @r_nfvm
248 vlsh_v ... 110 . ..... ..... 101 ..... 0000111 @r_nfvm
249 vlsw_v ... 110 . ..... ..... 110 ..... 0000111 @r_nfvm
250 vlse_v ... 010 . ..... ..... 111 ..... 0000111 @r_nfvm
251 vlsbu_v ... 010 . ..... ..... 000 ..... 0000111 @r_nfvm
252 vlshu_v ... 010 . ..... ..... 101 ..... 0000111 @r_nfvm
253 vlswu_v ... 010 . ..... ..... 110 ..... 0000111 @r_nfvm
254 vssb_v ... 010 . ..... ..... 000 ..... 0100111 @r_nfvm
255 vssh_v ... 010 . ..... ..... 101 ..... 0100111 @r_nfvm
256 vssw_v ... 010 . ..... ..... 110 ..... 0100111 @r_nfvm
257 vsse_v ... 010 . ..... ..... 111 ..... 0100111 @r_nfvm
259 vlxb_v ... 111 . ..... ..... 000 ..... 0000111 @r_nfvm
260 vlxh_v ... 111 . ..... ..... 101 ..... 0000111 @r_nfvm
261 vlxw_v ... 111 . ..... ..... 110 ..... 0000111 @r_nfvm
262 vlxe_v ... 011 . ..... ..... 111 ..... 0000111 @r_nfvm
263 vlxbu_v ... 011 . ..... ..... 000 ..... 0000111 @r_nfvm
264 vlxhu_v ... 011 . ..... ..... 101 ..... 0000111 @r_nfvm
265 vlxwu_v ... 011 . ..... ..... 110 ..... 0000111 @r_nfvm
266 # Vector ordered-indexed and unordered-indexed store insns.
267 vsxb_v ... -11 . ..... ..... 000 ..... 0100111 @r_nfvm
268 vsxh_v ... -11 . ..... ..... 101 ..... 0100111 @r_nfvm
269 vsxw_v ... -11 . ..... ..... 110 ..... 0100111 @r_nfvm
270 vsxe_v ... -11 . ..... ..... 111 ..... 0100111 @r_nfvm
272 #*** Vector AMO operations are encoded under the standard AMO major opcode ***
273 vamoswapw_v 00001 . . ..... ..... 110 ..... 0101111 @r_wdvm
274 vamoaddw_v 00000 . . ..... ..... 110 ..... 0101111 @r_wdvm
275 vamoxorw_v 00100 . . ..... ..... 110 ..... 0101111 @r_wdvm
276 vamoandw_v 01100 . . ..... ..... 110 ..... 0101111 @r_wdvm
277 vamoorw_v 01000 . . ..... ..... 110 ..... 0101111 @r_wdvm
278 vamominw_v 10000 . . ..... ..... 110 ..... 0101111 @r_wdvm
279 vamomaxw_v 10100 . . ..... ..... 110 ..... 0101111 @r_wdvm
280 vamominuw_v 11000 . . ..... ..... 110 ..... 0101111 @r_wdvm
281 vamomaxuw_v 11100 . . ..... ..... 110 ..... 0101111 @r_wdvm
283 # *** new major opcode OP-V ***
284 vadd_vv 000000 . ..... ..... 000 ..... 1010111 @r_vm
285 vadd_vx 000000 . ..... ..... 100 ..... 1010111 @r_vm
286 vadd_vi 000000 . ..... ..... 011 ..... 1010111 @r_vm
287 vsub_vv 000010 . ..... ..... 000 ..... 1010111 @r_vm
288 vsub_vx 000010 . ..... ..... 100 ..... 1010111 @r_vm
289 vrsub_vx 000011 . ..... ..... 100 ..... 1010111 @r_vm
290 vrsub_vi 000011 . ..... ..... 011 ..... 1010111 @r_vm
291 vwaddu_vv 110000 . ..... ..... 010 ..... 1010111 @r_vm
292 vwaddu_vx 110000 . ..... ..... 110 ..... 1010111 @r_vm
293 vwadd_vv 110001 . ..... ..... 010 ..... 1010111 @r_vm
294 vwadd_vx 110001 . ..... ..... 110 ..... 1010111 @r_vm
295 vwsubu_vv 110010 . ..... ..... 010 ..... 1010111 @r_vm
296 vwsubu_vx 110010 . ..... ..... 110 ..... 1010111 @r_vm
297 vwsub_vv 110011 . ..... ..... 010 ..... 1010111 @r_vm
298 vwsub_vx 110011 . ..... ..... 110 ..... 1010111 @r_vm
299 vwaddu_wv 110100 . ..... ..... 010 ..... 1010111 @r_vm
300 vwaddu_wx 110100 . ..... ..... 110 ..... 1010111 @r_vm
301 vwadd_wv 110101 . ..... ..... 010 ..... 1010111 @r_vm
302 vwadd_wx 110101 . ..... ..... 110 ..... 1010111 @r_vm
303 vwsubu_wv 110110 . ..... ..... 010 ..... 1010111 @r_vm
304 vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm
305 vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm
306 vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm
307 vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1
308 vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1
309 vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1
310 vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1
311 vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1
312 vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1
313 vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1
314 vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1
315 vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1
316 vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1
317 vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm
318 vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm
319 vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm
320 vor_vv 001010 . ..... ..... 000 ..... 1010111 @r_vm
321 vor_vx 001010 . ..... ..... 100 ..... 1010111 @r_vm
322 vor_vi 001010 . ..... ..... 011 ..... 1010111 @r_vm
323 vxor_vv 001011 . ..... ..... 000 ..... 1010111 @r_vm
324 vxor_vx 001011 . ..... ..... 100 ..... 1010111 @r_vm
325 vxor_vi 001011 . ..... ..... 011 ..... 1010111 @r_vm
326 vsll_vv 100101 . ..... ..... 000 ..... 1010111 @r_vm
327 vsll_vx 100101 . ..... ..... 100 ..... 1010111 @r_vm
328 vsll_vi 100101 . ..... ..... 011 ..... 1010111 @r_vm
329 vsrl_vv 101000 . ..... ..... 000 ..... 1010111 @r_vm
330 vsrl_vx 101000 . ..... ..... 100 ..... 1010111 @r_vm
331 vsrl_vi 101000 . ..... ..... 011 ..... 1010111 @r_vm
332 vsra_vv 101001 . ..... ..... 000 ..... 1010111 @r_vm
333 vsra_vx 101001 . ..... ..... 100 ..... 1010111 @r_vm
334 vsra_vi 101001 . ..... ..... 011 ..... 1010111 @r_vm
335 vnsrl_vv 101100 . ..... ..... 000 ..... 1010111 @r_vm
336 vnsrl_vx 101100 . ..... ..... 100 ..... 1010111 @r_vm
337 vnsrl_vi 101100 . ..... ..... 011 ..... 1010111 @r_vm
338 vnsra_vv 101101 . ..... ..... 000 ..... 1010111 @r_vm
339 vnsra_vx 101101 . ..... ..... 100 ..... 1010111 @r_vm
340 vnsra_vi 101101 . ..... ..... 011 ..... 1010111 @r_vm
341 vmseq_vv 011000 . ..... ..... 000 ..... 1010111 @r_vm
342 vmseq_vx 011000 . ..... ..... 100 ..... 1010111 @r_vm
343 vmseq_vi 011000 . ..... ..... 011 ..... 1010111 @r_vm
344 vmsne_vv 011001 . ..... ..... 000 ..... 1010111 @r_vm
345 vmsne_vx 011001 . ..... ..... 100 ..... 1010111 @r_vm
346 vmsne_vi 011001 . ..... ..... 011 ..... 1010111 @r_vm
347 vmsltu_vv 011010 . ..... ..... 000 ..... 1010111 @r_vm
348 vmsltu_vx 011010 . ..... ..... 100 ..... 1010111 @r_vm
349 vmslt_vv 011011 . ..... ..... 000 ..... 1010111 @r_vm
350 vmslt_vx 011011 . ..... ..... 100 ..... 1010111 @r_vm
351 vmsleu_vv 011100 . ..... ..... 000 ..... 1010111 @r_vm
352 vmsleu_vx 011100 . ..... ..... 100 ..... 1010111 @r_vm
353 vmsleu_vi 011100 . ..... ..... 011 ..... 1010111 @r_vm
354 vmsle_vv 011101 . ..... ..... 000 ..... 1010111 @r_vm
355 vmsle_vx 011101 . ..... ..... 100 ..... 1010111 @r_vm
356 vmsle_vi 011101 . ..... ..... 011 ..... 1010111 @r_vm
357 vmsgtu_vx 011110 . ..... ..... 100 ..... 1010111 @r_vm
358 vmsgtu_vi 011110 . ..... ..... 011 ..... 1010111 @r_vm
359 vmsgt_vx 011111 . ..... ..... 100 ..... 1010111 @r_vm
360 vmsgt_vi 011111 . ..... ..... 011 ..... 1010111 @r_vm
361 vminu_vv 000100 . ..... ..... 000 ..... 1010111 @r_vm
362 vminu_vx 000100 . ..... ..... 100 ..... 1010111 @r_vm
363 vmin_vv 000101 . ..... ..... 000 ..... 1010111 @r_vm
364 vmin_vx 000101 . ..... ..... 100 ..... 1010111 @r_vm
365 vmaxu_vv 000110 . ..... ..... 000 ..... 1010111 @r_vm
366 vmaxu_vx 000110 . ..... ..... 100 ..... 1010111 @r_vm
367 vmax_vv 000111 . ..... ..... 000 ..... 1010111 @r_vm
368 vmax_vx 000111 . ..... ..... 100 ..... 1010111 @r_vm
369 vmul_vv 100101 . ..... ..... 010 ..... 1010111 @r_vm
370 vmul_vx 100101 . ..... ..... 110 ..... 1010111 @r_vm
371 vmulh_vv 100111 . ..... ..... 010 ..... 1010111 @r_vm
372 vmulh_vx 100111 . ..... ..... 110 ..... 1010111 @r_vm
373 vmulhu_vv 100100 . ..... ..... 010 ..... 1010111 @r_vm
374 vmulhu_vx 100100 . ..... ..... 110 ..... 1010111 @r_vm
375 vmulhsu_vv 100110 . ..... ..... 010 ..... 1010111 @r_vm
376 vmulhsu_vx 100110 . ..... ..... 110 ..... 1010111 @r_vm
377 vdivu_vv 100000 . ..... ..... 010 ..... 1010111 @r_vm
378 vdivu_vx 100000 . ..... ..... 110 ..... 1010111 @r_vm
379 vdiv_vv 100001 . ..... ..... 010 ..... 1010111 @r_vm
380 vdiv_vx 100001 . ..... ..... 110 ..... 1010111 @r_vm
381 vremu_vv 100010 . ..... ..... 010 ..... 1010111 @r_vm
382 vremu_vx 100010 . ..... ..... 110 ..... 1010111 @r_vm
383 vrem_vv 100011 . ..... ..... 010 ..... 1010111 @r_vm
384 vrem_vx 100011 . ..... ..... 110 ..... 1010111 @r_vm
385 vwmulu_vv 111000 . ..... ..... 010 ..... 1010111 @r_vm
386 vwmulu_vx 111000 . ..... ..... 110 ..... 1010111 @r_vm
387 vwmulsu_vv 111010 . ..... ..... 010 ..... 1010111 @r_vm
388 vwmulsu_vx 111010 . ..... ..... 110 ..... 1010111 @r_vm
389 vwmul_vv 111011 . ..... ..... 010 ..... 1010111 @r_vm
390 vwmul_vx 111011 . ..... ..... 110 ..... 1010111 @r_vm
391 vmacc_vv 101101 . ..... ..... 010 ..... 1010111 @r_vm
392 vmacc_vx 101101 . ..... ..... 110 ..... 1010111 @r_vm
393 vnmsac_vv 101111 . ..... ..... 010 ..... 1010111 @r_vm
394 vnmsac_vx 101111 . ..... ..... 110 ..... 1010111 @r_vm
395 vmadd_vv 101001 . ..... ..... 010 ..... 1010111 @r_vm
396 vmadd_vx 101001 . ..... ..... 110 ..... 1010111 @r_vm
397 vnmsub_vv 101011 . ..... ..... 010 ..... 1010111 @r_vm
398 vnmsub_vx 101011 . ..... ..... 110 ..... 1010111 @r_vm
399 vwmaccu_vv 111100 . ..... ..... 010 ..... 1010111 @r_vm
400 vwmaccu_vx 111100 . ..... ..... 110 ..... 1010111 @r_vm
401 vwmacc_vv 111101 . ..... ..... 010 ..... 1010111 @r_vm
402 vwmacc_vx 111101 . ..... ..... 110 ..... 1010111 @r_vm
403 vwmaccsu_vv 111110 . ..... ..... 010 ..... 1010111 @r_vm
404 vwmaccsu_vx 111110 . ..... ..... 110 ..... 1010111 @r_vm
405 vwmaccus_vx 111111 . ..... ..... 110 ..... 1010111 @r_vm
406 vmv_v_v 010111 1 00000 ..... 000 ..... 1010111 @r2
407 vmv_v_x 010111 1 00000 ..... 100 ..... 1010111 @r2
408 vmv_v_i 010111 1 00000 ..... 011 ..... 1010111 @r2
409 vmerge_vvm 010111 0 ..... ..... 000 ..... 1010111 @r_vm_0
410 vmerge_vxm 010111 0 ..... ..... 100 ..... 1010111 @r_vm_0
411 vmerge_vim 010111 0 ..... ..... 011 ..... 1010111 @r_vm_0
413 vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
414 vsetvl 1000000 ..... ..... 111 ..... 1010111 @r