hw/ppce500_mpc8544ds.c

   1 /*
   2  * Qemu PowerPC MPC8544DS board emualtion
   3  *
   4  * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Yu Liu,     <yu.liu@freescale.com>
   7  *
   8  * This file is derived from hw/ppc440_bamboo.c,
   9  * the copyright for that material belongs to the original owners.
  10  *
  11  * This is free software; you can redistribute it and/or modify
  12  * it under the terms of  the GNU General  Public License as published by
  13  * the Free Software Foundation;  either version 2 of the  License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #include <dirent.h>
  18
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #include "net.h"
  22 #include "hw.h"
  23 #include "pc.h"
  24 #include "pci.h"
  25 #include "boards.h"
  26 #include "sysemu.h"
  27 #include "kvm.h"
  28 #include "kvm_ppc.h"
  29 #include "device_tree.h"
  30 #include "openpic.h"
  31 #include "ppc.h"
  32 #include "loader.h"
  33 #include "elf.h"
  34 #include "sysbus.h"
  35
  36 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
  37 #define UIMAGE_LOAD_BASE           0
  38 #define DTC_LOAD_PAD               0x500000
  39 #define DTC_PAD_MASK               0xFFFFF
  40 #define INITRD_LOAD_PAD            0x2000000
  41 #define INITRD_PAD_MASK            0xFFFFFF
  42
  43 #define RAM_SIZES_ALIGN            (64UL << 20)
  44
  45 #define MPC8544_CCSRBAR_BASE       0xE0000000
  46 #define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000)
  47 #define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500)
  48 #define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600)
  49 #define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000)
  50 #define MPC8544_PCI_REGS_SIZE      0x1000
  51 #define MPC8544_PCI_IO             0xE1000000
  52 #define MPC8544_PCI_IOLEN          0x10000
  53
  54 struct boot_info
  55 {
  56     uint32_t dt_base;
  57     uint32_t entry;
  58 };
  59
  60 #ifdef CONFIG_FDT
  61 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
  62 {
  63     uint32_t cell;
  64     int ret;
  65
  66     ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
  67     if (ret < 0) {
  68         fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
  69         goto out;
  70     }
  71
  72     ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
  73                                 prop, cell);
  74     if (ret < 0) {
  75         fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
  76         goto out;
  77     }
  78
  79 out:
  80     return ret;
  81 }
  82 #endif
  83
  84 static int mpc8544_load_device_tree(target_phys_addr_t addr,
  85                                      uint32_t ramsize,
  86                                      target_phys_addr_t initrd_base,
  87                                      target_phys_addr_t initrd_size,
  88                                      const char *kernel_cmdline)
  89 {
  90     int ret = -1;
  91 #ifdef CONFIG_FDT
  92     uint32_t mem_reg_property[] = {0, cpu_to_be32(ramsize)};
  93     char *filename;
  94     int fdt_size;
  95     void *fdt;
  96
  97     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  98     if (!filename) {
  99         goto out;
 100     }
 101     fdt = load_device_tree(filename, &fdt_size);
 102     qemu_free(filename);
 103     if (fdt == NULL) {
 104         goto out;
 105     }
 106
 107     /* Manipulate device tree in memory. */
 108     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
 109                                sizeof(mem_reg_property));
 110     if (ret < 0)
 111         fprintf(stderr, "couldn't set /memory/reg\n");
 112
 113     if (initrd_size) {
 114         ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 115                                         initrd_base);
 116         if (ret < 0) {
 117             fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 118         }
 119
 120         ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 121                                         (initrd_base + initrd_size));
 122         if (ret < 0) {
 123             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 124         }
 125     }
 126
 127     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 128                                       kernel_cmdline);
 129     if (ret < 0)
 130         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 131
 132     if (kvm_enabled()) {
 133         struct dirent *dirp;
 134         DIR *dp;
 135         char buf[128];
 136
 137         if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
 138             printf("Can't open directory /proc/device-tree/cpus/\n");
 139             ret = -1;
 140             goto out;
 141         }
 142
 143         buf[0] = '\0';
 144         while ((dirp = readdir(dp)) != NULL) {
 145             if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
 146                 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
 147                 break;
 148             }
 149         }
 150         closedir(dp);
 151         if (buf[0] == '\0') {
 152             printf("Unknow host!\n");
 153             ret = -1;
 154             goto out;
 155         }
 156
 157         mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
 158         mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
 159     } else {
 160         const uint32_t freq = 400000000;
 161
 162         qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
 163                                   "clock-frequency", freq);
 164         qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
 165                                   "timebase-frequency", freq);
 166     }
 167
 168     ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
 169     qemu_free(fdt);
 170
 171 out:
 172 #endif
 173
 174     return ret;
 175 }
 176
 177 /* Create -kernel TLB entries for BookE, linearly spanning 256MB.  */
 178 static void mmubooke_create_initial_mapping(CPUState *env,
 179                                      target_ulong va,
 180                                      target_phys_addr_t pa)
 181 {
 182     ppcemb_tlb_t *tlb = booke206_get_tlbe(env, 1, 0, 0);
 183
 184     tlb->attr = 0;
 185     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
 186     tlb->size = 256 * 1024 * 1024;
 187     tlb->EPN = va & TARGET_PAGE_MASK;
 188     tlb->RPN = pa & TARGET_PAGE_MASK;
 189     tlb->PID = 0;
 190 }
 191
 192 static void mpc8544ds_cpu_reset(void *opaque)
 193 {
 194     CPUState *env = opaque;
 195     struct boot_info *bi = env->load_info;
 196
 197     cpu_reset(env);
 198
 199     /* Set initial guest state. */
 200     env->gpr[1] = (16<<20) - 8;
 201     env->gpr[3] = bi->dt_base;
 202     env->nip = bi->entry;
 203     mmubooke_create_initial_mapping(env, 0, 0);
 204 }
 205
 206 static void mpc8544ds_init(ram_addr_t ram_size,
 207                          const char *boot_device,
 208                          const char *kernel_filename,
 209                          const char *kernel_cmdline,
 210                          const char *initrd_filename,
 211                          const char *cpu_model)
 212 {
 213     PCIBus *pci_bus;
 214     CPUState *env;
 215     uint64_t elf_entry;
 216     uint64_t elf_lowaddr;
 217     target_phys_addr_t entry=0;
 218     target_phys_addr_t loadaddr=UIMAGE_LOAD_BASE;
 219     target_long kernel_size=0;
 220     target_ulong dt_base = 0;
 221     target_ulong initrd_base = 0;
 222     target_long initrd_size=0;
 223     int i=0;
 224     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
 225     qemu_irq *irqs, *mpic;
 226     DeviceState *dev;
 227     struct boot_info *boot_info;
 228
 229     /* Setup CPU */
 230     if (cpu_model == NULL) {
 231         cpu_model = "e500v2_v30";
 232     }
 233
 234     env = cpu_ppc_init(cpu_model);
 235     if (!env) {
 236         fprintf(stderr, "Unable to initialize CPU!\n");
 237         exit(1);
 238     }
 239
 240     /* XXX register timer? */
 241     ppc_emb_timers_init(env, 400000000, PPC_INTERRUPT_DECR);
 242     ppc_dcr_init(env, NULL, NULL);
 243
 244     /* Register reset handler */
 245     qemu_register_reset(mpc8544ds_cpu_reset, env);
 246
 247     /* Fixup Memory size on a alignment boundary */
 248     ram_size &= ~(RAM_SIZES_ALIGN - 1);
 249
 250     /* Register Memory */
 251     cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL,
 252                                  "mpc8544ds.ram", ram_size));
 253
 254     /* MPIC */
 255     irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 256     irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
 257     irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
 258     mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
 259
 260     /* Serial */
 261     if (serial_hds[0]) {
 262         serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
 263                        0, mpic[12+26], 399193,
 264                        serial_hds[0], 1, 1);
 265     }
 266
 267     if (serial_hds[1]) {
 268         serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
 269                        0, mpic[12+26], 399193,
 270                        serial_hds[0], 1, 1);
 271     }
 272
 273     /* PCI */
 274     dev = sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE,
 275                                 mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
 276                                 mpic[pci_irq_nrs[2]], mpic[pci_irq_nrs[3]],
 277                                 NULL);
 278     pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
 279     if (!pci_bus)
 280         printf("couldn't create PCI controller!\n");
 281
 282     isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
 283
 284     if (pci_bus) {
 285         /* Register network interfaces. */
 286         for (i = 0; i < nb_nics; i++) {
 287             pci_nic_init_nofail(&nd_table[i], "virtio", NULL);
 288         }
 289     }
 290
 291     /* Load kernel. */
 292     if (kernel_filename) {
 293         kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 294         if (kernel_size < 0) {
 295             kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
 296                                    &elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
 297             entry = elf_entry;
 298             loadaddr = elf_lowaddr;
 299         }
 300         /* XXX try again as binary */
 301         if (kernel_size < 0) {
 302             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 303                     kernel_filename);
 304             exit(1);
 305         }
 306     }
 307
 308     /* Load initrd. */
 309     if (initrd_filename) {
 310         initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
 311         initrd_size = load_image_targphys(initrd_filename, initrd_base,
 312                                           ram_size - initrd_base);
 313
 314         if (initrd_size < 0) {
 315             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 316                     initrd_filename);
 317             exit(1);
 318         }
 319     }
 320
 321     boot_info = qemu_mallocz(sizeof(struct boot_info));
 322
 323     /* If we're loading a kernel directly, we must load the device tree too. */
 324     if (kernel_filename) {
 325 #ifndef CONFIG_FDT
 326         cpu_abort(env, "Compiled without FDT support - can't load kernel\n");
 327 #endif
 328         dt_base = (kernel_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
 329         if (mpc8544_load_device_tree(dt_base, ram_size,
 330                     initrd_base, initrd_size, kernel_cmdline) < 0) {
 331             fprintf(stderr, "couldn't load device tree\n");
 332             exit(1);
 333         }
 334
 335         boot_info->entry = entry;
 336         boot_info->dt_base = dt_base;
 337     }
 338     env->load_info = boot_info;
 339
 340     if (kvm_enabled()) {
 341         kvmppc_init();
 342     }
 343 }
 344
 345 static QEMUMachine mpc8544ds_machine = {
 346     .name = "mpc8544ds",
 347     .desc = "mpc8544ds",
 348     .init = mpc8544ds_init,
 349 };
 350
 351 static void mpc8544ds_machine_init(void)
 352 {
 353     qemu_register_machine(&mpc8544ds_machine);
 354 }
 355
 356 machine_init(mpc8544ds_machine_init);