2 * ARM Versatile/PB PCI host controller
4 * Copyright (c) 2006-2009 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the LGPL.
13 #include "exec-memory.h"
19 MemoryRegion mem_config
;
20 MemoryRegion mem_config2
;
24 static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr
)
26 return addr
& 0xffffff;
29 static void pci_vpb_config_write(void *opaque
, target_phys_addr_t addr
,
30 uint64_t val
, unsigned size
)
32 pci_data_write(opaque
, vpb_pci_config_addr(addr
), val
, size
);
35 static uint64_t pci_vpb_config_read(void *opaque
, target_phys_addr_t addr
,
39 val
= pci_data_read(opaque
, vpb_pci_config_addr(addr
), size
);
43 static const MemoryRegionOps pci_vpb_config_ops
= {
44 .read
= pci_vpb_config_read
,
45 .write
= pci_vpb_config_write
,
46 .endianness
= DEVICE_NATIVE_ENDIAN
,
49 static int pci_vpb_map_irq(PCIDevice
*d
, int irq_num
)
54 static void pci_vpb_set_irq(void *opaque
, int irq_num
, int level
)
56 qemu_irq
*pic
= opaque
;
58 qemu_set_irq(pic
[irq_num
], level
);
61 static int pci_vpb_init(SysBusDevice
*dev
)
63 PCIVPBState
*s
= FROM_SYSBUS(PCIVPBState
, dev
);
67 for (i
= 0; i
< 4; i
++) {
68 sysbus_init_irq(dev
, &s
->irq
[i
]);
70 bus
= pci_register_bus(&dev
->qdev
, "pci",
71 pci_vpb_set_irq
, pci_vpb_map_irq
, s
->irq
,
72 get_system_memory(), get_system_io(),
75 /* ??? Register memory space. */
77 /* Our memory regions are:
78 * 0 : PCI self config window
79 * 1 : PCI config window
80 * 2 : PCI IO window (realview_pci only)
82 memory_region_init_io(&s
->mem_config
, &pci_vpb_config_ops
, bus
,
83 "pci-vpb-selfconfig", 0x1000000);
84 sysbus_init_mmio_region(dev
, &s
->mem_config
);
85 memory_region_init_io(&s
->mem_config2
, &pci_vpb_config_ops
, bus
,
86 "pci-vpb-config", 0x1000000);
87 sysbus_init_mmio_region(dev
, &s
->mem_config2
);
89 isa_mmio_setup(&s
->isa
, 0x0100000);
90 sysbus_init_mmio_region(dev
, &s
->isa
);
93 pci_create_simple(bus
, -1, "versatile_pci_host");
97 static int pci_realview_init(SysBusDevice
*dev
)
99 PCIVPBState
*s
= FROM_SYSBUS(PCIVPBState
, dev
);
101 return pci_vpb_init(dev
);
104 static int versatile_pci_host_init(PCIDevice
*d
)
106 pci_set_word(d
->config
+ PCI_STATUS
,
107 PCI_STATUS_66MHZ
| PCI_STATUS_DEVSEL_MEDIUM
);
108 pci_set_byte(d
->config
+ PCI_LATENCY_TIMER
, 0x10);
112 static PCIDeviceInfo versatile_pci_host_info
= {
113 .qdev
.name
= "versatile_pci_host",
114 .qdev
.size
= sizeof(PCIDevice
),
115 .init
= versatile_pci_host_init
,
116 .vendor_id
= PCI_VENDOR_ID_XILINX
,
117 /* Both boards have the same device ID. Oh well. */
118 .device_id
= PCI_DEVICE_ID_XILINX_XC2VP30
,
119 .class_id
= PCI_CLASS_PROCESSOR_CO
,
122 static void versatile_pci_register_devices(void)
124 sysbus_register_dev("versatile_pci", sizeof(PCIVPBState
), pci_vpb_init
);
125 sysbus_register_dev("realview_pci", sizeof(PCIVPBState
),
127 pci_qdev_register(&versatile_pci_host_info
);
130 device_init(versatile_pci_register_devices
)