2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "qemu/osdep.h"
29 #include "sysemu/sysemu.h"
30 #include "hw/boards.h"
31 #include "hw/loader.h"
33 #include "exec/memory.h"
34 #include "exec/address-spaces.h"
35 #include "hw/char/serial.h"
37 #include "hw/sysbus.h"
38 #include "hw/block/flash.h"
39 #include "sysemu/block-backend.h"
40 #include "sysemu/char.h"
41 #include "sysemu/device_tree.h"
42 #include "qemu/error-report.h"
43 #include "bootparam.h"
45 typedef struct LxBoardDesc
{
48 size_t flash_boot_base
;
49 size_t flash_sector_size
;
53 typedef struct Lx60FpgaState
{
59 static void lx60_fpga_reset(void *opaque
)
61 Lx60FpgaState
*s
= opaque
;
67 static uint64_t lx60_fpga_read(void *opaque
, hwaddr addr
,
70 Lx60FpgaState
*s
= opaque
;
73 case 0x0: /*build date code*/
76 case 0x4: /*processor clock frequency, Hz*/
79 case 0x8: /*LEDs (off = 0, on = 1)*/
82 case 0xc: /*DIP switches (off = 0, on = 1)*/
88 static void lx60_fpga_write(void *opaque
, hwaddr addr
,
89 uint64_t val
, unsigned size
)
91 Lx60FpgaState
*s
= opaque
;
94 case 0x8: /*LEDs (off = 0, on = 1)*/
98 case 0x10: /*board reset*/
100 qemu_system_reset_request();
106 static const MemoryRegionOps lx60_fpga_ops
= {
107 .read
= lx60_fpga_read
,
108 .write
= lx60_fpga_write
,
109 .endianness
= DEVICE_NATIVE_ENDIAN
,
112 static Lx60FpgaState
*lx60_fpga_init(MemoryRegion
*address_space
,
115 Lx60FpgaState
*s
= g_malloc(sizeof(Lx60FpgaState
));
117 memory_region_init_io(&s
->iomem
, NULL
, &lx60_fpga_ops
, s
,
118 "lx60.fpga", 0x10000);
119 memory_region_add_subregion(address_space
, base
, &s
->iomem
);
121 qemu_register_reset(lx60_fpga_reset
, s
);
125 static void lx60_net_init(MemoryRegion
*address_space
,
129 qemu_irq irq
, NICInfo
*nd
)
135 dev
= qdev_create(NULL
, "open_eth");
136 qdev_set_nic_properties(dev
, nd
);
137 qdev_init_nofail(dev
);
139 s
= SYS_BUS_DEVICE(dev
);
140 sysbus_connect_irq(s
, 0, irq
);
141 memory_region_add_subregion(address_space
, base
,
142 sysbus_mmio_get_region(s
, 0));
143 memory_region_add_subregion(address_space
, descriptors
,
144 sysbus_mmio_get_region(s
, 1));
146 ram
= g_malloc(sizeof(*ram
));
147 memory_region_init_ram(ram
, OBJECT(s
), "open_eth.ram", 16384,
149 vmstate_register_ram_global(ram
);
150 memory_region_add_subregion(address_space
, buffers
, ram
);
153 static pflash_t
*xtfpga_flash_init(MemoryRegion
*address_space
,
154 const LxBoardDesc
*board
,
155 DriveInfo
*dinfo
, int be
)
158 DeviceState
*dev
= qdev_create(NULL
, "cfi.pflash01");
160 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
162 qdev_prop_set_uint32(dev
, "num-blocks",
163 board
->flash_size
/ board
->flash_sector_size
);
164 qdev_prop_set_uint64(dev
, "sector-length", board
->flash_sector_size
);
165 qdev_prop_set_uint8(dev
, "width", 4);
166 qdev_prop_set_bit(dev
, "big-endian", be
);
167 qdev_prop_set_string(dev
, "name", "lx60.io.flash");
168 qdev_init_nofail(dev
);
169 s
= SYS_BUS_DEVICE(dev
);
170 memory_region_add_subregion(address_space
, board
->flash_base
,
171 sysbus_mmio_get_region(s
, 0));
172 return OBJECT_CHECK(pflash_t
, (dev
), "cfi.pflash01");
175 static uint64_t translate_phys_addr(void *opaque
, uint64_t addr
)
177 XtensaCPU
*cpu
= opaque
;
179 return cpu_get_phys_page_debug(CPU(cpu
), addr
);
182 static void lx60_reset(void *opaque
)
184 XtensaCPU
*cpu
= opaque
;
189 static uint64_t lx60_io_read(void *opaque
, hwaddr addr
,
195 static void lx60_io_write(void *opaque
, hwaddr addr
,
196 uint64_t val
, unsigned size
)
200 static const MemoryRegionOps lx60_io_ops
= {
201 .read
= lx60_io_read
,
202 .write
= lx60_io_write
,
203 .endianness
= DEVICE_NATIVE_ENDIAN
,
206 static void lx_init(const LxBoardDesc
*board
, MachineState
*machine
)
208 #ifdef TARGET_WORDS_BIGENDIAN
213 MemoryRegion
*system_memory
= get_system_memory();
214 XtensaCPU
*cpu
= NULL
;
215 CPUXtensaState
*env
= NULL
;
216 MemoryRegion
*ram
, *rom
, *system_io
;
218 pflash_t
*flash
= NULL
;
219 QemuOpts
*machine_opts
= qemu_get_machine_opts();
220 const char *cpu_model
= machine
->cpu_model
;
221 const char *kernel_filename
= qemu_opt_get(machine_opts
, "kernel");
222 const char *kernel_cmdline
= qemu_opt_get(machine_opts
, "append");
223 const char *dtb_filename
= qemu_opt_get(machine_opts
, "dtb");
224 const char *initrd_filename
= qemu_opt_get(machine_opts
, "initrd");
228 cpu_model
= XTENSA_DEFAULT_CPU_MODEL
;
231 for (n
= 0; n
< smp_cpus
; n
++) {
232 cpu
= cpu_xtensa_init(cpu_model
);
234 error_report("unable to find CPU definition '%s'",
240 env
->sregs
[PRID
] = n
;
241 qemu_register_reset(lx60_reset
, cpu
);
242 /* Need MMU initialized prior to ELF loading,
243 * so that ELF gets loaded into virtual addresses
248 ram
= g_malloc(sizeof(*ram
));
249 memory_region_init_ram(ram
, NULL
, "lx60.dram", machine
->ram_size
,
251 vmstate_register_ram_global(ram
);
252 memory_region_add_subregion(system_memory
, 0, ram
);
254 system_io
= g_malloc(sizeof(*system_io
));
255 memory_region_init_io(system_io
, NULL
, &lx60_io_ops
, NULL
, "lx60.io",
257 memory_region_add_subregion(system_memory
, 0xf0000000, system_io
);
258 lx60_fpga_init(system_io
, 0x0d020000);
259 if (nd_table
[0].used
) {
260 lx60_net_init(system_io
, 0x0d030000, 0x0d030400, 0x0d800000,
261 xtensa_get_extint(env
, 1), nd_table
);
264 if (!serial_hds
[0]) {
265 serial_hds
[0] = qemu_chr_new("serial0", "null", NULL
);
268 serial_mm_init(system_io
, 0x0d050020, 2, xtensa_get_extint(env
, 0),
269 115200, serial_hds
[0], DEVICE_NATIVE_ENDIAN
);
271 dinfo
= drive_get(IF_PFLASH
, 0, 0);
273 flash
= xtfpga_flash_init(system_io
, board
, dinfo
, be
);
276 /* Use presence of kernel file name as 'boot from SRAM' switch. */
277 if (kernel_filename
) {
278 uint32_t entry_point
= env
->pc
;
279 size_t bp_size
= 3 * get_tag_size(0); /* first/last and memory tags */
280 uint32_t tagptr
= 0xfe000000 + board
->sram_size
;
282 BpMemInfo memory_location
= {
283 .type
= tswap32(MEMORY_TYPE_CONVENTIONAL
),
285 .end
= tswap32(machine
->ram_size
),
287 uint32_t lowmem_end
= machine
->ram_size
< 0x08000000 ?
288 machine
->ram_size
: 0x08000000;
289 uint32_t cur_lowmem
= QEMU_ALIGN_UP(lowmem_end
/ 2, 4096);
291 rom
= g_malloc(sizeof(*rom
));
292 memory_region_init_ram(rom
, NULL
, "lx60.sram", board
->sram_size
,
294 vmstate_register_ram_global(rom
);
295 memory_region_add_subregion(system_memory
, 0xfe000000, rom
);
297 if (kernel_cmdline
) {
298 bp_size
+= get_tag_size(strlen(kernel_cmdline
) + 1);
301 bp_size
+= get_tag_size(sizeof(uint32_t));
303 if (initrd_filename
) {
304 bp_size
+= get_tag_size(sizeof(BpMemInfo
));
307 /* Put kernel bootparameters to the end of that SRAM */
308 tagptr
= (tagptr
- bp_size
) & ~0xff;
309 cur_tagptr
= put_tag(tagptr
, BP_TAG_FIRST
, 0, NULL
);
310 cur_tagptr
= put_tag(cur_tagptr
, BP_TAG_MEMORY
,
311 sizeof(memory_location
), &memory_location
);
313 if (kernel_cmdline
) {
314 cur_tagptr
= put_tag(cur_tagptr
, BP_TAG_COMMAND_LINE
,
315 strlen(kernel_cmdline
) + 1, kernel_cmdline
);
319 void *fdt
= load_device_tree(dtb_filename
, &fdt_size
);
320 uint32_t dtb_addr
= tswap32(cur_lowmem
);
323 error_report("could not load DTB '%s'", dtb_filename
);
327 cpu_physical_memory_write(cur_lowmem
, fdt
, fdt_size
);
328 cur_tagptr
= put_tag(cur_tagptr
, BP_TAG_FDT
,
329 sizeof(dtb_addr
), &dtb_addr
);
330 cur_lowmem
= QEMU_ALIGN_UP(cur_lowmem
+ fdt_size
, 4096);
332 if (initrd_filename
) {
333 BpMemInfo initrd_location
= { 0 };
334 int initrd_size
= load_ramdisk(initrd_filename
, cur_lowmem
,
335 lowmem_end
- cur_lowmem
);
337 if (initrd_size
< 0) {
338 initrd_size
= load_image_targphys(initrd_filename
,
340 lowmem_end
- cur_lowmem
);
342 if (initrd_size
< 0) {
343 error_report("could not load initrd '%s'", initrd_filename
);
346 initrd_location
.start
= tswap32(cur_lowmem
);
347 initrd_location
.end
= tswap32(cur_lowmem
+ initrd_size
);
348 cur_tagptr
= put_tag(cur_tagptr
, BP_TAG_INITRD
,
349 sizeof(initrd_location
), &initrd_location
);
350 cur_lowmem
= QEMU_ALIGN_UP(cur_lowmem
+ initrd_size
, 4096);
352 cur_tagptr
= put_tag(cur_tagptr
, BP_TAG_LAST
, 0, NULL
);
353 env
->regs
[2] = tagptr
;
356 uint64_t elf_lowaddr
;
357 int success
= load_elf(kernel_filename
, translate_phys_addr
, cpu
,
358 &elf_entry
, &elf_lowaddr
, NULL
, be
, EM_XTENSA
, 0);
360 entry_point
= elf_entry
;
364 success
= load_uimage(kernel_filename
, &ep
, NULL
, &is_linux
,
365 translate_phys_addr
, cpu
);
366 if (success
> 0 && is_linux
) {
369 error_report("could not load kernel '%s'",
374 if (entry_point
!= env
->pc
) {
375 static const uint8_t jx_a0
[] = {
376 #ifdef TARGET_WORDS_BIGENDIAN
382 env
->regs
[0] = entry_point
;
383 cpu_physical_memory_write(env
->pc
, jx_a0
, sizeof(jx_a0
));
387 MemoryRegion
*flash_mr
= pflash_cfi01_get_memory(flash
);
388 MemoryRegion
*flash_io
= g_malloc(sizeof(*flash_io
));
390 memory_region_init_alias(flash_io
, NULL
, "lx60.flash",
391 flash_mr
, board
->flash_boot_base
,
392 board
->flash_size
- board
->flash_boot_base
< 0x02000000 ?
393 board
->flash_size
- board
->flash_boot_base
: 0x02000000);
394 memory_region_add_subregion(system_memory
, 0xfe000000,
400 static void xtensa_lx60_init(MachineState
*machine
)
402 static const LxBoardDesc lx60_board
= {
403 .flash_base
= 0x08000000,
404 .flash_size
= 0x00400000,
405 .flash_sector_size
= 0x10000,
406 .sram_size
= 0x20000,
408 lx_init(&lx60_board
, machine
);
411 static void xtensa_lx200_init(MachineState
*machine
)
413 static const LxBoardDesc lx200_board
= {
414 .flash_base
= 0x08000000,
415 .flash_size
= 0x01000000,
416 .flash_sector_size
= 0x20000,
417 .sram_size
= 0x2000000,
419 lx_init(&lx200_board
, machine
);
422 static void xtensa_ml605_init(MachineState
*machine
)
424 static const LxBoardDesc ml605_board
= {
425 .flash_base
= 0x08000000,
426 .flash_size
= 0x01000000,
427 .flash_sector_size
= 0x20000,
428 .sram_size
= 0x2000000,
430 lx_init(&ml605_board
, machine
);
433 static void xtensa_kc705_init(MachineState
*machine
)
435 static const LxBoardDesc kc705_board
= {
436 .flash_base
= 0x00000000,
437 .flash_size
= 0x08000000,
438 .flash_boot_base
= 0x06000000,
439 .flash_sector_size
= 0x20000,
440 .sram_size
= 0x2000000,
442 lx_init(&kc705_board
, machine
);
445 static void xtensa_lx60_class_init(ObjectClass
*oc
, void *data
)
447 MachineClass
*mc
= MACHINE_CLASS(oc
);
449 mc
->desc
= "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL
")";
450 mc
->init
= xtensa_lx60_init
;
454 static const TypeInfo xtensa_lx60_type
= {
455 .name
= MACHINE_TYPE_NAME("lx60"),
456 .parent
= TYPE_MACHINE
,
457 .class_init
= xtensa_lx60_class_init
,
460 static void xtensa_lx200_class_init(ObjectClass
*oc
, void *data
)
462 MachineClass
*mc
= MACHINE_CLASS(oc
);
464 mc
->desc
= "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL
")";
465 mc
->init
= xtensa_lx200_init
;
469 static const TypeInfo xtensa_lx200_type
= {
470 .name
= MACHINE_TYPE_NAME("lx200"),
471 .parent
= TYPE_MACHINE
,
472 .class_init
= xtensa_lx200_class_init
,
475 static void xtensa_ml605_class_init(ObjectClass
*oc
, void *data
)
477 MachineClass
*mc
= MACHINE_CLASS(oc
);
479 mc
->desc
= "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL
")";
480 mc
->init
= xtensa_ml605_init
;
484 static const TypeInfo xtensa_ml605_type
= {
485 .name
= MACHINE_TYPE_NAME("ml605"),
486 .parent
= TYPE_MACHINE
,
487 .class_init
= xtensa_ml605_class_init
,
490 static void xtensa_kc705_class_init(ObjectClass
*oc
, void *data
)
492 MachineClass
*mc
= MACHINE_CLASS(oc
);
494 mc
->desc
= "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL
")";
495 mc
->init
= xtensa_kc705_init
;
499 static const TypeInfo xtensa_kc705_type
= {
500 .name
= MACHINE_TYPE_NAME("kc705"),
501 .parent
= TYPE_MACHINE
,
502 .class_init
= xtensa_kc705_class_init
,
505 static void xtensa_lx_machines_init(void)
507 type_register_static(&xtensa_lx60_type
);
508 type_register_static(&xtensa_lx200_type
);
509 type_register_static(&xtensa_ml605_type
);
510 type_register_static(&xtensa_kc705_type
);
513 machine_init(xtensa_lx_machines_init
)