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target-m68k: Implement CPUClass::set_pc()
[qemu.git] / memory.c
blob01846c97682b7388f466b61ae7d88bc7876ae175
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "sysemu/kvm.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 //#define DEBUG_UNASSIGNED
27
28 static unsigned memory_region_transaction_depth;
29 static bool memory_region_update_pending;
30 static bool global_dirty_log = false;
31
32 /* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39 static QemuMutex flat_view_mutex;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 static void memory_init(void)
48 {
49 qemu_mutex_init(&flat_view_mutex);
50 }
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108 {
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111 }
112
113 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
138 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
165 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
166 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
168 .mr = (fr)->mr, \
169 .address_space = (as), \
170 .offset_within_region = (fr)->offset_in_region, \
171 .size = (fr)->addr.size, \
172 .offset_within_address_space = int128_get64((fr)->addr.start), \
173 .readonly = (fr)->readonly, \
174 }))
175
176 struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179 };
180
181 struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
185 EventNotifier *e;
186 };
187
188 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190 {
191 if (int128_lt(a.addr.start, b.addr.start)) {
192 return true;
193 } else if (int128_gt(a.addr.start, b.addr.start)) {
194 return false;
195 } else if (int128_lt(a.addr.size, b.addr.size)) {
196 return true;
197 } else if (int128_gt(a.addr.size, b.addr.size)) {
198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
210 if (a.e < b.e) {
211 return true;
212 } else if (a.e > b.e) {
213 return false;
214 }
215 return false;
216 }
217
218 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220 {
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223 }
224
225 typedef struct FlatRange FlatRange;
226 typedef struct FlatView FlatView;
227
228 /* Range of memory in the global map. Addresses are absolute. */
229 struct FlatRange {
230 MemoryRegion *mr;
231 hwaddr offset_in_region;
232 AddrRange addr;
233 uint8_t dirty_log_mask;
234 bool romd_mode;
235 bool readonly;
236 };
237
238 /* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241 struct FlatView {
242 unsigned ref;
243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246 };
247
248 typedef struct AddressSpaceOps AddressSpaceOps;
249
250 #define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
253 static bool flatrange_equal(FlatRange *a, FlatRange *b)
254 {
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
257 && a->offset_in_region == b->offset_in_region
258 && a->romd_mode == b->romd_mode
259 && a->readonly == b->readonly;
260 }
261
262 static void flatview_init(FlatView *view)
263 {
264 view->ref = 1;
265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268 }
269
270 /* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274 {
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
277 view->ranges = g_realloc(view->ranges,
278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
283 memory_region_ref(range->mr);
284 ++view->nr;
285 }
286
287 static void flatview_destroy(FlatView *view)
288 {
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
294 g_free(view->ranges);
295 g_free(view);
296 }
297
298 static void flatview_ref(FlatView *view)
299 {
300 atomic_inc(&view->ref);
301 }
302
303 static void flatview_unref(FlatView *view)
304 {
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340 }
341
342 static void memory_region_oldmmio_read_accessor(void *opaque,
343 hwaddr addr,
344 uint64_t *value,
345 unsigned size,
346 unsigned shift,
347 uint64_t mask)
348 {
349 MemoryRegion *mr = opaque;
350 uint64_t tmp;
351
352 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
353 *value |= (tmp & mask) << shift;
354 }
355
356 static void memory_region_read_accessor(void *opaque,
357 hwaddr addr,
358 uint64_t *value,
359 unsigned size,
360 unsigned shift,
361 uint64_t mask)
362 {
363 MemoryRegion *mr = opaque;
364 uint64_t tmp;
365
366 if (mr->flush_coalesced_mmio) {
367 qemu_flush_coalesced_mmio_buffer();
368 }
369 tmp = mr->ops->read(mr->opaque, addr, size);
370 *value |= (tmp & mask) << shift;
371 }
372
373 static void memory_region_oldmmio_write_accessor(void *opaque,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask)
379 {
380 MemoryRegion *mr = opaque;
381 uint64_t tmp;
382
383 tmp = (*value >> shift) & mask;
384 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
385 }
386
387 static void memory_region_write_accessor(void *opaque,
388 hwaddr addr,
389 uint64_t *value,
390 unsigned size,
391 unsigned shift,
392 uint64_t mask)
393 {
394 MemoryRegion *mr = opaque;
395 uint64_t tmp;
396
397 if (mr->flush_coalesced_mmio) {
398 qemu_flush_coalesced_mmio_buffer();
399 }
400 tmp = (*value >> shift) & mask;
401 mr->ops->write(mr->opaque, addr, tmp, size);
402 }
403
404 static void access_with_adjusted_size(hwaddr addr,
405 uint64_t *value,
406 unsigned size,
407 unsigned access_size_min,
408 unsigned access_size_max,
409 void (*access)(void *opaque,
410 hwaddr addr,
411 uint64_t *value,
412 unsigned size,
413 unsigned shift,
414 uint64_t mask),
415 void *opaque)
416 {
417 uint64_t access_mask;
418 unsigned access_size;
419 unsigned i;
420
421 if (!access_size_min) {
422 access_size_min = 1;
423 }
424 if (!access_size_max) {
425 access_size_max = 4;
426 }
427
428 /* FIXME: support unaligned access? */
429 access_size = MAX(MIN(size, access_size_max), access_size_min);
430 access_mask = -1ULL >> (64 - access_size * 8);
431 for (i = 0; i < size; i += access_size) {
432 #ifdef TARGET_WORDS_BIGENDIAN
433 access(opaque, addr + i, value, access_size,
434 (size - access_size - i) * 8, access_mask);
435 #else
436 access(opaque, addr + i, value, access_size, i * 8, access_mask);
437 #endif
438 }
439 }
440
441 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
442 {
443 AddressSpace *as;
444
445 while (mr->parent) {
446 mr = mr->parent;
447 }
448 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
449 if (mr == as->root) {
450 return as;
451 }
452 }
453 abort();
454 }
455
456 /* Render a memory region into the global view. Ranges in @view obscure
457 * ranges in @mr.
458 */
459 static void render_memory_region(FlatView *view,
460 MemoryRegion *mr,
461 Int128 base,
462 AddrRange clip,
463 bool readonly)
464 {
465 MemoryRegion *subregion;
466 unsigned i;
467 hwaddr offset_in_region;
468 Int128 remain;
469 Int128 now;
470 FlatRange fr;
471 AddrRange tmp;
472
473 if (!mr->enabled) {
474 return;
475 }
476
477 int128_addto(&base, int128_make64(mr->addr));
478 readonly |= mr->readonly;
479
480 tmp = addrrange_make(base, mr->size);
481
482 if (!addrrange_intersects(tmp, clip)) {
483 return;
484 }
485
486 clip = addrrange_intersection(tmp, clip);
487
488 if (mr->alias) {
489 int128_subfrom(&base, int128_make64(mr->alias->addr));
490 int128_subfrom(&base, int128_make64(mr->alias_offset));
491 render_memory_region(view, mr->alias, base, clip, readonly);
492 return;
493 }
494
495 /* Render subregions in priority order. */
496 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
497 render_memory_region(view, subregion, base, clip, readonly);
498 }
499
500 if (!mr->terminates) {
501 return;
502 }
503
504 offset_in_region = int128_get64(int128_sub(clip.start, base));
505 base = clip.start;
506 remain = clip.size;
507
508 fr.mr = mr;
509 fr.dirty_log_mask = mr->dirty_log_mask;
510 fr.romd_mode = mr->romd_mode;
511 fr.readonly = readonly;
512
513 /* Render the region itself into any gaps left by the current view. */
514 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
515 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
516 continue;
517 }
518 if (int128_lt(base, view->ranges[i].addr.start)) {
519 now = int128_min(remain,
520 int128_sub(view->ranges[i].addr.start, base));
521 fr.offset_in_region = offset_in_region;
522 fr.addr = addrrange_make(base, now);
523 flatview_insert(view, i, &fr);
524 ++i;
525 int128_addto(&base, now);
526 offset_in_region += int128_get64(now);
527 int128_subfrom(&remain, now);
528 }
529 now = int128_sub(int128_min(int128_add(base, remain),
530 addrrange_end(view->ranges[i].addr)),
531 base);
532 int128_addto(&base, now);
533 offset_in_region += int128_get64(now);
534 int128_subfrom(&remain, now);
535 }
536 if (int128_nz(remain)) {
537 fr.offset_in_region = offset_in_region;
538 fr.addr = addrrange_make(base, remain);
539 flatview_insert(view, i, &fr);
540 }
541 }
542
543 /* Render a memory topology into a list of disjoint absolute ranges. */
544 static FlatView *generate_memory_topology(MemoryRegion *mr)
545 {
546 FlatView *view;
547
548 view = g_new(FlatView, 1);
549 flatview_init(view);
550
551 if (mr) {
552 render_memory_region(view, mr, int128_zero(),
553 addrrange_make(int128_zero(), int128_2_64()), false);
554 }
555 flatview_simplify(view);
556
557 return view;
558 }
559
560 static void address_space_add_del_ioeventfds(AddressSpace *as,
561 MemoryRegionIoeventfd *fds_new,
562 unsigned fds_new_nb,
563 MemoryRegionIoeventfd *fds_old,
564 unsigned fds_old_nb)
565 {
566 unsigned iold, inew;
567 MemoryRegionIoeventfd *fd;
568 MemoryRegionSection section;
569
570 /* Generate a symmetric difference of the old and new fd sets, adding
571 * and deleting as necessary.
572 */
573
574 iold = inew = 0;
575 while (iold < fds_old_nb || inew < fds_new_nb) {
576 if (iold < fds_old_nb
577 && (inew == fds_new_nb
578 || memory_region_ioeventfd_before(fds_old[iold],
579 fds_new[inew]))) {
580 fd = &fds_old[iold];
581 section = (MemoryRegionSection) {
582 .address_space = as,
583 .offset_within_address_space = int128_get64(fd->addr.start),
584 .size = fd->addr.size,
585 };
586 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
587 fd->match_data, fd->data, fd->e);
588 ++iold;
589 } else if (inew < fds_new_nb
590 && (iold == fds_old_nb
591 || memory_region_ioeventfd_before(fds_new[inew],
592 fds_old[iold]))) {
593 fd = &fds_new[inew];
594 section = (MemoryRegionSection) {
595 .address_space = as,
596 .offset_within_address_space = int128_get64(fd->addr.start),
597 .size = fd->addr.size,
598 };
599 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
600 fd->match_data, fd->data, fd->e);
601 ++inew;
602 } else {
603 ++iold;
604 ++inew;
605 }
606 }
607 }
608
609 static FlatView *address_space_get_flatview(AddressSpace *as)
610 {
611 FlatView *view;
612
613 qemu_mutex_lock(&flat_view_mutex);
614 view = as->current_map;
615 flatview_ref(view);
616 qemu_mutex_unlock(&flat_view_mutex);
617 return view;
618 }
619
620 static void address_space_update_ioeventfds(AddressSpace *as)
621 {
622 FlatView *view;
623 FlatRange *fr;
624 unsigned ioeventfd_nb = 0;
625 MemoryRegionIoeventfd *ioeventfds = NULL;
626 AddrRange tmp;
627 unsigned i;
628
629 view = address_space_get_flatview(as);
630 FOR_EACH_FLAT_RANGE(fr, view) {
631 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
632 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
633 int128_sub(fr->addr.start,
634 int128_make64(fr->offset_in_region)));
635 if (addrrange_intersects(fr->addr, tmp)) {
636 ++ioeventfd_nb;
637 ioeventfds = g_realloc(ioeventfds,
638 ioeventfd_nb * sizeof(*ioeventfds));
639 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
640 ioeventfds[ioeventfd_nb-1].addr = tmp;
641 }
642 }
643 }
644
645 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
646 as->ioeventfds, as->ioeventfd_nb);
647
648 g_free(as->ioeventfds);
649 as->ioeventfds = ioeventfds;
650 as->ioeventfd_nb = ioeventfd_nb;
651 flatview_unref(view);
652 }
653
654 static void address_space_update_topology_pass(AddressSpace *as,
655 const FlatView *old_view,
656 const FlatView *new_view,
657 bool adding)
658 {
659 unsigned iold, inew;
660 FlatRange *frold, *frnew;
661
662 /* Generate a symmetric difference of the old and new memory maps.
663 * Kill ranges in the old map, and instantiate ranges in the new map.
664 */
665 iold = inew = 0;
666 while (iold < old_view->nr || inew < new_view->nr) {
667 if (iold < old_view->nr) {
668 frold = &old_view->ranges[iold];
669 } else {
670 frold = NULL;
671 }
672 if (inew < new_view->nr) {
673 frnew = &new_view->ranges[inew];
674 } else {
675 frnew = NULL;
676 }
677
678 if (frold
679 && (!frnew
680 || int128_lt(frold->addr.start, frnew->addr.start)
681 || (int128_eq(frold->addr.start, frnew->addr.start)
682 && !flatrange_equal(frold, frnew)))) {
683 /* In old but not in new, or in both but attributes changed. */
684
685 if (!adding) {
686 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
687 }
688
689 ++iold;
690 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
691 /* In both and unchanged (except logging may have changed) */
692
693 if (adding) {
694 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
695 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
696 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
697 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
698 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
699 }
700 }
701
702 ++iold;
703 ++inew;
704 } else {
705 /* In new */
706
707 if (adding) {
708 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
709 }
710
711 ++inew;
712 }
713 }
714 }
715
716
717 static void address_space_update_topology(AddressSpace *as)
718 {
719 FlatView *old_view = address_space_get_flatview(as);
720 FlatView *new_view = generate_memory_topology(as->root);
721
722 address_space_update_topology_pass(as, old_view, new_view, false);
723 address_space_update_topology_pass(as, old_view, new_view, true);
724
725 qemu_mutex_lock(&flat_view_mutex);
726 flatview_unref(as->current_map);
727 as->current_map = new_view;
728 qemu_mutex_unlock(&flat_view_mutex);
729
730 /* Note that all the old MemoryRegions are still alive up to this
731 * point. This relieves most MemoryListeners from the need to
732 * ref/unref the MemoryRegions they get---unless they use them
733 * outside the iothread mutex, in which case precise reference
734 * counting is necessary.
735 */
736 flatview_unref(old_view);
737
738 address_space_update_ioeventfds(as);
739 }
740
741 void memory_region_transaction_begin(void)
742 {
743 qemu_flush_coalesced_mmio_buffer();
744 ++memory_region_transaction_depth;
745 }
746
747 void memory_region_transaction_commit(void)
748 {
749 AddressSpace *as;
750
751 assert(memory_region_transaction_depth);
752 --memory_region_transaction_depth;
753 if (!memory_region_transaction_depth && memory_region_update_pending) {
754 memory_region_update_pending = false;
755 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
756
757 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
758 address_space_update_topology(as);
759 }
760
761 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
762 }
763 }
764
765 static void memory_region_destructor_none(MemoryRegion *mr)
766 {
767 }
768
769 static void memory_region_destructor_ram(MemoryRegion *mr)
770 {
771 qemu_ram_free(mr->ram_addr);
772 }
773
774 static void memory_region_destructor_alias(MemoryRegion *mr)
775 {
776 memory_region_unref(mr->alias);
777 }
778
779 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
780 {
781 qemu_ram_free_from_ptr(mr->ram_addr);
782 }
783
784 static void memory_region_destructor_rom_device(MemoryRegion *mr)
785 {
786 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
787 }
788
789 static bool memory_region_wrong_endianness(MemoryRegion *mr)
790 {
791 #ifdef TARGET_WORDS_BIGENDIAN
792 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
793 #else
794 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
795 #endif
796 }
797
798 void memory_region_init(MemoryRegion *mr,
799 Object *owner,
800 const char *name,
801 uint64_t size)
802 {
803 mr->ops = &unassigned_mem_ops;
804 mr->opaque = NULL;
805 mr->owner = owner;
806 mr->iommu_ops = NULL;
807 mr->parent = NULL;
808 mr->size = int128_make64(size);
809 if (size == UINT64_MAX) {
810 mr->size = int128_2_64();
811 }
812 mr->addr = 0;
813 mr->subpage = false;
814 mr->enabled = true;
815 mr->terminates = false;
816 mr->ram = false;
817 mr->romd_mode = true;
818 mr->readonly = false;
819 mr->rom_device = false;
820 mr->destructor = memory_region_destructor_none;
821 mr->priority = 0;
822 mr->may_overlap = false;
823 mr->alias = NULL;
824 QTAILQ_INIT(&mr->subregions);
825 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
826 QTAILQ_INIT(&mr->coalesced);
827 mr->name = g_strdup(name);
828 mr->dirty_log_mask = 0;
829 mr->ioeventfd_nb = 0;
830 mr->ioeventfds = NULL;
831 mr->flush_coalesced_mmio = false;
832 }
833
834 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
835 unsigned size)
836 {
837 #ifdef DEBUG_UNASSIGNED
838 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
839 #endif
840 if (current_cpu != NULL) {
841 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
842 }
843 return -1ULL;
844 }
845
846 static void unassigned_mem_write(void *opaque, hwaddr addr,
847 uint64_t val, unsigned size)
848 {
849 #ifdef DEBUG_UNASSIGNED
850 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
851 #endif
852 if (current_cpu != NULL) {
853 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
854 }
855 }
856
857 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
858 unsigned size, bool is_write)
859 {
860 return false;
861 }
862
863 const MemoryRegionOps unassigned_mem_ops = {
864 .valid.accepts = unassigned_mem_accepts,
865 .endianness = DEVICE_NATIVE_ENDIAN,
866 };
867
868 bool memory_region_access_valid(MemoryRegion *mr,
869 hwaddr addr,
870 unsigned size,
871 bool is_write)
872 {
873 int access_size_min, access_size_max;
874 int access_size, i;
875
876 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
877 return false;
878 }
879
880 if (!mr->ops->valid.accepts) {
881 return true;
882 }
883
884 access_size_min = mr->ops->valid.min_access_size;
885 if (!mr->ops->valid.min_access_size) {
886 access_size_min = 1;
887 }
888
889 access_size_max = mr->ops->valid.max_access_size;
890 if (!mr->ops->valid.max_access_size) {
891 access_size_max = 4;
892 }
893
894 access_size = MAX(MIN(size, access_size_max), access_size_min);
895 for (i = 0; i < size; i += access_size) {
896 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
897 is_write)) {
898 return false;
899 }
900 }
901
902 return true;
903 }
904
905 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
906 hwaddr addr,
907 unsigned size)
908 {
909 uint64_t data = 0;
910
911 if (mr->ops->read) {
912 access_with_adjusted_size(addr, &data, size,
913 mr->ops->impl.min_access_size,
914 mr->ops->impl.max_access_size,
915 memory_region_read_accessor, mr);
916 } else {
917 access_with_adjusted_size(addr, &data, size, 1, 4,
918 memory_region_oldmmio_read_accessor, mr);
919 }
920
921 return data;
922 }
923
924 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
925 {
926 if (memory_region_wrong_endianness(mr)) {
927 switch (size) {
928 case 1:
929 break;
930 case 2:
931 *data = bswap16(*data);
932 break;
933 case 4:
934 *data = bswap32(*data);
935 break;
936 case 8:
937 *data = bswap64(*data);
938 break;
939 default:
940 abort();
941 }
942 }
943 }
944
945 static bool memory_region_dispatch_read(MemoryRegion *mr,
946 hwaddr addr,
947 uint64_t *pval,
948 unsigned size)
949 {
950 if (!memory_region_access_valid(mr, addr, size, false)) {
951 *pval = unassigned_mem_read(mr, addr, size);
952 return true;
953 }
954
955 *pval = memory_region_dispatch_read1(mr, addr, size);
956 adjust_endianness(mr, pval, size);
957 return false;
958 }
959
960 static bool memory_region_dispatch_write(MemoryRegion *mr,
961 hwaddr addr,
962 uint64_t data,
963 unsigned size)
964 {
965 if (!memory_region_access_valid(mr, addr, size, true)) {
966 unassigned_mem_write(mr, addr, data, size);
967 return true;
968 }
969
970 adjust_endianness(mr, &data, size);
971
972 if (mr->ops->write) {
973 access_with_adjusted_size(addr, &data, size,
974 mr->ops->impl.min_access_size,
975 mr->ops->impl.max_access_size,
976 memory_region_write_accessor, mr);
977 } else {
978 access_with_adjusted_size(addr, &data, size, 1, 4,
979 memory_region_oldmmio_write_accessor, mr);
980 }
981 return false;
982 }
983
984 void memory_region_init_io(MemoryRegion *mr,
985 Object *owner,
986 const MemoryRegionOps *ops,
987 void *opaque,
988 const char *name,
989 uint64_t size)
990 {
991 memory_region_init(mr, owner, name, size);
992 mr->ops = ops;
993 mr->opaque = opaque;
994 mr->terminates = true;
995 mr->ram_addr = ~(ram_addr_t)0;
996 }
997
998 void memory_region_init_ram(MemoryRegion *mr,
999 Object *owner,
1000 const char *name,
1001 uint64_t size)
1002 {
1003 memory_region_init(mr, owner, name, size);
1004 mr->ram = true;
1005 mr->terminates = true;
1006 mr->destructor = memory_region_destructor_ram;
1007 mr->ram_addr = qemu_ram_alloc(size, mr);
1008 }
1009
1010 void memory_region_init_ram_ptr(MemoryRegion *mr,
1011 Object *owner,
1012 const char *name,
1013 uint64_t size,
1014 void *ptr)
1015 {
1016 memory_region_init(mr, owner, name, size);
1017 mr->ram = true;
1018 mr->terminates = true;
1019 mr->destructor = memory_region_destructor_ram_from_ptr;
1020 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1021 }
1022
1023 void memory_region_init_alias(MemoryRegion *mr,
1024 Object *owner,
1025 const char *name,
1026 MemoryRegion *orig,
1027 hwaddr offset,
1028 uint64_t size)
1029 {
1030 memory_region_init(mr, owner, name, size);
1031 memory_region_ref(orig);
1032 mr->destructor = memory_region_destructor_alias;
1033 mr->alias = orig;
1034 mr->alias_offset = offset;
1035 }
1036
1037 void memory_region_init_rom_device(MemoryRegion *mr,
1038 Object *owner,
1039 const MemoryRegionOps *ops,
1040 void *opaque,
1041 const char *name,
1042 uint64_t size)
1043 {
1044 memory_region_init(mr, owner, name, size);
1045 mr->ops = ops;
1046 mr->opaque = opaque;
1047 mr->terminates = true;
1048 mr->rom_device = true;
1049 mr->destructor = memory_region_destructor_rom_device;
1050 mr->ram_addr = qemu_ram_alloc(size, mr);
1051 }
1052
1053 void memory_region_init_iommu(MemoryRegion *mr,
1054 Object *owner,
1055 const MemoryRegionIOMMUOps *ops,
1056 const char *name,
1057 uint64_t size)
1058 {
1059 memory_region_init(mr, owner, name, size);
1060 mr->iommu_ops = ops,
1061 mr->terminates = true; /* then re-forwards */
1062 notifier_list_init(&mr->iommu_notify);
1063 }
1064
1065 void memory_region_init_reservation(MemoryRegion *mr,
1066 Object *owner,
1067 const char *name,
1068 uint64_t size)
1069 {
1070 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1071 }
1072
1073 void memory_region_destroy(MemoryRegion *mr)
1074 {
1075 assert(QTAILQ_EMPTY(&mr->subregions));
1076 assert(memory_region_transaction_depth == 0);
1077 mr->destructor(mr);
1078 memory_region_clear_coalescing(mr);
1079 g_free((char *)mr->name);
1080 g_free(mr->ioeventfds);
1081 }
1082
1083 Object *memory_region_owner(MemoryRegion *mr)
1084 {
1085 return mr->owner;
1086 }
1087
1088 void memory_region_ref(MemoryRegion *mr)
1089 {
1090 if (mr && mr->owner) {
1091 object_ref(mr->owner);
1092 }
1093 }
1094
1095 void memory_region_unref(MemoryRegion *mr)
1096 {
1097 if (mr && mr->owner) {
1098 object_unref(mr->owner);
1099 }
1100 }
1101
1102 uint64_t memory_region_size(MemoryRegion *mr)
1103 {
1104 if (int128_eq(mr->size, int128_2_64())) {
1105 return UINT64_MAX;
1106 }
1107 return int128_get64(mr->size);
1108 }
1109
1110 const char *memory_region_name(MemoryRegion *mr)
1111 {
1112 return mr->name;
1113 }
1114
1115 bool memory_region_is_ram(MemoryRegion *mr)
1116 {
1117 return mr->ram;
1118 }
1119
1120 bool memory_region_is_logging(MemoryRegion *mr)
1121 {
1122 return mr->dirty_log_mask;
1123 }
1124
1125 bool memory_region_is_rom(MemoryRegion *mr)
1126 {
1127 return mr->ram && mr->readonly;
1128 }
1129
1130 bool memory_region_is_iommu(MemoryRegion *mr)
1131 {
1132 return mr->iommu_ops;
1133 }
1134
1135 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1136 {
1137 notifier_list_add(&mr->iommu_notify, n);
1138 }
1139
1140 void memory_region_unregister_iommu_notifier(Notifier *n)
1141 {
1142 notifier_remove(n);
1143 }
1144
1145 void memory_region_notify_iommu(MemoryRegion *mr,
1146 IOMMUTLBEntry entry)
1147 {
1148 assert(memory_region_is_iommu(mr));
1149 notifier_list_notify(&mr->iommu_notify, &entry);
1150 }
1151
1152 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1153 {
1154 uint8_t mask = 1 << client;
1155
1156 memory_region_transaction_begin();
1157 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1158 memory_region_update_pending |= mr->enabled;
1159 memory_region_transaction_commit();
1160 }
1161
1162 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1163 hwaddr size, unsigned client)
1164 {
1165 assert(mr->terminates);
1166 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1167 1 << client);
1168 }
1169
1170 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1171 hwaddr size)
1172 {
1173 assert(mr->terminates);
1174 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1175 }
1176
1177 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1178 hwaddr size, unsigned client)
1179 {
1180 bool ret;
1181 assert(mr->terminates);
1182 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1183 1 << client);
1184 if (ret) {
1185 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1186 mr->ram_addr + addr + size,
1187 1 << client);
1188 }
1189 return ret;
1190 }
1191
1192
1193 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1194 {
1195 AddressSpace *as;
1196 FlatRange *fr;
1197
1198 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1199 FlatView *view = address_space_get_flatview(as);
1200 FOR_EACH_FLAT_RANGE(fr, view) {
1201 if (fr->mr == mr) {
1202 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1203 }
1204 }
1205 flatview_unref(view);
1206 }
1207 }
1208
1209 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1210 {
1211 if (mr->readonly != readonly) {
1212 memory_region_transaction_begin();
1213 mr->readonly = readonly;
1214 memory_region_update_pending |= mr->enabled;
1215 memory_region_transaction_commit();
1216 }
1217 }
1218
1219 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1220 {
1221 if (mr->romd_mode != romd_mode) {
1222 memory_region_transaction_begin();
1223 mr->romd_mode = romd_mode;
1224 memory_region_update_pending |= mr->enabled;
1225 memory_region_transaction_commit();
1226 }
1227 }
1228
1229 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1230 hwaddr size, unsigned client)
1231 {
1232 assert(mr->terminates);
1233 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1234 mr->ram_addr + addr + size,
1235 1 << client);
1236 }
1237
1238 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1239 {
1240 if (mr->alias) {
1241 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1242 }
1243
1244 assert(mr->terminates);
1245
1246 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1247 }
1248
1249 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1250 {
1251 FlatView *view;
1252 FlatRange *fr;
1253 CoalescedMemoryRange *cmr;
1254 AddrRange tmp;
1255 MemoryRegionSection section;
1256
1257 view = address_space_get_flatview(as);
1258 FOR_EACH_FLAT_RANGE(fr, view) {
1259 if (fr->mr == mr) {
1260 section = (MemoryRegionSection) {
1261 .address_space = as,
1262 .offset_within_address_space = int128_get64(fr->addr.start),
1263 .size = fr->addr.size,
1264 };
1265
1266 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1267 int128_get64(fr->addr.start),
1268 int128_get64(fr->addr.size));
1269 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1270 tmp = addrrange_shift(cmr->addr,
1271 int128_sub(fr->addr.start,
1272 int128_make64(fr->offset_in_region)));
1273 if (!addrrange_intersects(tmp, fr->addr)) {
1274 continue;
1275 }
1276 tmp = addrrange_intersection(tmp, fr->addr);
1277 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1278 int128_get64(tmp.start),
1279 int128_get64(tmp.size));
1280 }
1281 }
1282 }
1283 flatview_unref(view);
1284 }
1285
1286 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1287 {
1288 AddressSpace *as;
1289
1290 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1291 memory_region_update_coalesced_range_as(mr, as);
1292 }
1293 }
1294
1295 void memory_region_set_coalescing(MemoryRegion *mr)
1296 {
1297 memory_region_clear_coalescing(mr);
1298 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1299 }
1300
1301 void memory_region_add_coalescing(MemoryRegion *mr,
1302 hwaddr offset,
1303 uint64_t size)
1304 {
1305 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1306
1307 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1308 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1309 memory_region_update_coalesced_range(mr);
1310 memory_region_set_flush_coalesced(mr);
1311 }
1312
1313 void memory_region_clear_coalescing(MemoryRegion *mr)
1314 {
1315 CoalescedMemoryRange *cmr;
1316
1317 qemu_flush_coalesced_mmio_buffer();
1318 mr->flush_coalesced_mmio = false;
1319
1320 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1321 cmr = QTAILQ_FIRST(&mr->coalesced);
1322 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1323 g_free(cmr);
1324 }
1325 memory_region_update_coalesced_range(mr);
1326 }
1327
1328 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1329 {
1330 mr->flush_coalesced_mmio = true;
1331 }
1332
1333 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1334 {
1335 qemu_flush_coalesced_mmio_buffer();
1336 if (QTAILQ_EMPTY(&mr->coalesced)) {
1337 mr->flush_coalesced_mmio = false;
1338 }
1339 }
1340
1341 void memory_region_add_eventfd(MemoryRegion *mr,
1342 hwaddr addr,
1343 unsigned size,
1344 bool match_data,
1345 uint64_t data,
1346 EventNotifier *e)
1347 {
1348 MemoryRegionIoeventfd mrfd = {
1349 .addr.start = int128_make64(addr),
1350 .addr.size = int128_make64(size),
1351 .match_data = match_data,
1352 .data = data,
1353 .e = e,
1354 };
1355 unsigned i;
1356
1357 adjust_endianness(mr, &mrfd.data, size);
1358 memory_region_transaction_begin();
1359 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1360 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1361 break;
1362 }
1363 }
1364 ++mr->ioeventfd_nb;
1365 mr->ioeventfds = g_realloc(mr->ioeventfds,
1366 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1367 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1368 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1369 mr->ioeventfds[i] = mrfd;
1370 memory_region_update_pending |= mr->enabled;
1371 memory_region_transaction_commit();
1372 }
1373
1374 void memory_region_del_eventfd(MemoryRegion *mr,
1375 hwaddr addr,
1376 unsigned size,
1377 bool match_data,
1378 uint64_t data,
1379 EventNotifier *e)
1380 {
1381 MemoryRegionIoeventfd mrfd = {
1382 .addr.start = int128_make64(addr),
1383 .addr.size = int128_make64(size),
1384 .match_data = match_data,
1385 .data = data,
1386 .e = e,
1387 };
1388 unsigned i;
1389
1390 adjust_endianness(mr, &mrfd.data, size);
1391 memory_region_transaction_begin();
1392 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1393 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1394 break;
1395 }
1396 }
1397 assert(i != mr->ioeventfd_nb);
1398 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1399 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1400 --mr->ioeventfd_nb;
1401 mr->ioeventfds = g_realloc(mr->ioeventfds,
1402 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1403 memory_region_update_pending |= mr->enabled;
1404 memory_region_transaction_commit();
1405 }
1406
1407 static void memory_region_add_subregion_common(MemoryRegion *mr,
1408 hwaddr offset,
1409 MemoryRegion *subregion)
1410 {
1411 MemoryRegion *other;
1412
1413 memory_region_transaction_begin();
1414
1415 assert(!subregion->parent);
1416 memory_region_ref(subregion);
1417 subregion->parent = mr;
1418 subregion->addr = offset;
1419 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1420 if (subregion->may_overlap || other->may_overlap) {
1421 continue;
1422 }
1423 if (int128_ge(int128_make64(offset),
1424 int128_add(int128_make64(other->addr), other->size))
1425 || int128_le(int128_add(int128_make64(offset), subregion->size),
1426 int128_make64(other->addr))) {
1427 continue;
1428 }
1429 #if 0
1430 printf("warning: subregion collision %llx/%llx (%s) "
1431 "vs %llx/%llx (%s)\n",
1432 (unsigned long long)offset,
1433 (unsigned long long)int128_get64(subregion->size),
1434 subregion->name,
1435 (unsigned long long)other->addr,
1436 (unsigned long long)int128_get64(other->size),
1437 other->name);
1438 #endif
1439 }
1440 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1441 if (subregion->priority >= other->priority) {
1442 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1443 goto done;
1444 }
1445 }
1446 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1447 done:
1448 memory_region_update_pending |= mr->enabled && subregion->enabled;
1449 memory_region_transaction_commit();
1450 }
1451
1452
1453 void memory_region_add_subregion(MemoryRegion *mr,
1454 hwaddr offset,
1455 MemoryRegion *subregion)
1456 {
1457 subregion->may_overlap = false;
1458 subregion->priority = 0;
1459 memory_region_add_subregion_common(mr, offset, subregion);
1460 }
1461
1462 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1463 hwaddr offset,
1464 MemoryRegion *subregion,
1465 unsigned priority)
1466 {
1467 subregion->may_overlap = true;
1468 subregion->priority = priority;
1469 memory_region_add_subregion_common(mr, offset, subregion);
1470 }
1471
1472 void memory_region_del_subregion(MemoryRegion *mr,
1473 MemoryRegion *subregion)
1474 {
1475 memory_region_transaction_begin();
1476 assert(subregion->parent == mr);
1477 subregion->parent = NULL;
1478 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1479 memory_region_unref(subregion);
1480 memory_region_update_pending |= mr->enabled && subregion->enabled;
1481 memory_region_transaction_commit();
1482 }
1483
1484 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1485 {
1486 if (enabled == mr->enabled) {
1487 return;
1488 }
1489 memory_region_transaction_begin();
1490 mr->enabled = enabled;
1491 memory_region_update_pending = true;
1492 memory_region_transaction_commit();
1493 }
1494
1495 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1496 {
1497 MemoryRegion *parent = mr->parent;
1498 unsigned priority = mr->priority;
1499 bool may_overlap = mr->may_overlap;
1500
1501 if (addr == mr->addr || !parent) {
1502 mr->addr = addr;
1503 return;
1504 }
1505
1506 memory_region_transaction_begin();
1507 memory_region_ref(mr);
1508 memory_region_del_subregion(parent, mr);
1509 if (may_overlap) {
1510 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1511 } else {
1512 memory_region_add_subregion(parent, addr, mr);
1513 }
1514 memory_region_unref(mr);
1515 memory_region_transaction_commit();
1516 }
1517
1518 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1519 {
1520 assert(mr->alias);
1521
1522 if (offset == mr->alias_offset) {
1523 return;
1524 }
1525
1526 memory_region_transaction_begin();
1527 mr->alias_offset = offset;
1528 memory_region_update_pending |= mr->enabled;
1529 memory_region_transaction_commit();
1530 }
1531
1532 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1533 {
1534 return mr->ram_addr;
1535 }
1536
1537 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1538 {
1539 const AddrRange *addr = addr_;
1540 const FlatRange *fr = fr_;
1541
1542 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1543 return -1;
1544 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1545 return 1;
1546 }
1547 return 0;
1548 }
1549
1550 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1551 {
1552 return bsearch(&addr, view->ranges, view->nr,
1553 sizeof(FlatRange), cmp_flatrange_addr);
1554 }
1555
1556 bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1557 {
1558 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1559 if (!mr) {
1560 return false;
1561 }
1562 memory_region_unref(mr);
1563 return true;
1564 }
1565
1566 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1567 hwaddr addr, uint64_t size)
1568 {
1569 MemoryRegionSection ret = { .mr = NULL };
1570 MemoryRegion *root;
1571 AddressSpace *as;
1572 AddrRange range;
1573 FlatView *view;
1574 FlatRange *fr;
1575
1576 addr += mr->addr;
1577 for (root = mr; root->parent; ) {
1578 root = root->parent;
1579 addr += root->addr;
1580 }
1581
1582 as = memory_region_to_address_space(root);
1583 range = addrrange_make(int128_make64(addr), int128_make64(size));
1584
1585 view = address_space_get_flatview(as);
1586 fr = flatview_lookup(view, range);
1587 if (!fr) {
1588 return ret;
1589 }
1590
1591 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1592 --fr;
1593 }
1594
1595 ret.mr = fr->mr;
1596 ret.address_space = as;
1597 range = addrrange_intersection(range, fr->addr);
1598 ret.offset_within_region = fr->offset_in_region;
1599 ret.offset_within_region += int128_get64(int128_sub(range.start,
1600 fr->addr.start));
1601 ret.size = range.size;
1602 ret.offset_within_address_space = int128_get64(range.start);
1603 ret.readonly = fr->readonly;
1604 memory_region_ref(ret.mr);
1605
1606 flatview_unref(view);
1607 return ret;
1608 }
1609
1610 void address_space_sync_dirty_bitmap(AddressSpace *as)
1611 {
1612 FlatView *view;
1613 FlatRange *fr;
1614
1615 view = address_space_get_flatview(as);
1616 FOR_EACH_FLAT_RANGE(fr, view) {
1617 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1618 }
1619 flatview_unref(view);
1620 }
1621
1622 void memory_global_dirty_log_start(void)
1623 {
1624 global_dirty_log = true;
1625 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1626 }
1627
1628 void memory_global_dirty_log_stop(void)
1629 {
1630 global_dirty_log = false;
1631 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1632 }
1633
1634 static void listener_add_address_space(MemoryListener *listener,
1635 AddressSpace *as)
1636 {
1637 FlatView *view;
1638 FlatRange *fr;
1639
1640 if (listener->address_space_filter
1641 && listener->address_space_filter != as) {
1642 return;
1643 }
1644
1645 if (global_dirty_log) {
1646 if (listener->log_global_start) {
1647 listener->log_global_start(listener);
1648 }
1649 }
1650
1651 view = address_space_get_flatview(as);
1652 FOR_EACH_FLAT_RANGE(fr, view) {
1653 MemoryRegionSection section = {
1654 .mr = fr->mr,
1655 .address_space = as,
1656 .offset_within_region = fr->offset_in_region,
1657 .size = fr->addr.size,
1658 .offset_within_address_space = int128_get64(fr->addr.start),
1659 .readonly = fr->readonly,
1660 };
1661 if (listener->region_add) {
1662 listener->region_add(listener, &section);
1663 }
1664 }
1665 flatview_unref(view);
1666 }
1667
1668 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1669 {
1670 MemoryListener *other = NULL;
1671 AddressSpace *as;
1672
1673 listener->address_space_filter = filter;
1674 if (QTAILQ_EMPTY(&memory_listeners)
1675 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1676 memory_listeners)->priority) {
1677 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1678 } else {
1679 QTAILQ_FOREACH(other, &memory_listeners, link) {
1680 if (listener->priority < other->priority) {
1681 break;
1682 }
1683 }
1684 QTAILQ_INSERT_BEFORE(other, listener, link);
1685 }
1686
1687 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1688 listener_add_address_space(listener, as);
1689 }
1690 }
1691
1692 void memory_listener_unregister(MemoryListener *listener)
1693 {
1694 QTAILQ_REMOVE(&memory_listeners, listener, link);
1695 }
1696
1697 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1698 {
1699 if (QTAILQ_EMPTY(&address_spaces)) {
1700 memory_init();
1701 }
1702
1703 memory_region_transaction_begin();
1704 as->root = root;
1705 as->current_map = g_new(FlatView, 1);
1706 flatview_init(as->current_map);
1707 as->ioeventfd_nb = 0;
1708 as->ioeventfds = NULL;
1709 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1710 as->name = g_strdup(name ? name : "anonymous");
1711 address_space_init_dispatch(as);
1712 memory_region_update_pending |= root->enabled;
1713 memory_region_transaction_commit();
1714 }
1715
1716 void address_space_destroy(AddressSpace *as)
1717 {
1718 /* Flush out anything from MemoryListeners listening in on this */
1719 memory_region_transaction_begin();
1720 as->root = NULL;
1721 memory_region_transaction_commit();
1722 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1723 address_space_destroy_dispatch(as);
1724 flatview_unref(as->current_map);
1725 g_free(as->name);
1726 g_free(as->ioeventfds);
1727 }
1728
1729 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1730 {
1731 return memory_region_dispatch_read(mr, addr, pval, size);
1732 }
1733
1734 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1735 uint64_t val, unsigned size)
1736 {
1737 return memory_region_dispatch_write(mr, addr, val, size);
1738 }
1739
1740 typedef struct MemoryRegionList MemoryRegionList;
1741
1742 struct MemoryRegionList {
1743 const MemoryRegion *mr;
1744 bool printed;
1745 QTAILQ_ENTRY(MemoryRegionList) queue;
1746 };
1747
1748 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1749
1750 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1751 const MemoryRegion *mr, unsigned int level,
1752 hwaddr base,
1753 MemoryRegionListHead *alias_print_queue)
1754 {
1755 MemoryRegionList *new_ml, *ml, *next_ml;
1756 MemoryRegionListHead submr_print_queue;
1757 const MemoryRegion *submr;
1758 unsigned int i;
1759
1760 if (!mr || !mr->enabled) {
1761 return;
1762 }
1763
1764 for (i = 0; i < level; i++) {
1765 mon_printf(f, " ");
1766 }
1767
1768 if (mr->alias) {
1769 MemoryRegionList *ml;
1770 bool found = false;
1771
1772 /* check if the alias is already in the queue */
1773 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1774 if (ml->mr == mr->alias && !ml->printed) {
1775 found = true;
1776 }
1777 }
1778
1779 if (!found) {
1780 ml = g_new(MemoryRegionList, 1);
1781 ml->mr = mr->alias;
1782 ml->printed = false;
1783 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1784 }
1785 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1786 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1787 "-" TARGET_FMT_plx "\n",
1788 base + mr->addr,
1789 base + mr->addr
1790 + (int128_nz(mr->size) ?
1791 (hwaddr)int128_get64(int128_sub(mr->size,
1792 int128_one())) : 0),
1793 mr->priority,
1794 mr->romd_mode ? 'R' : '-',
1795 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1796 : '-',
1797 mr->name,
1798 mr->alias->name,
1799 mr->alias_offset,
1800 mr->alias_offset
1801 + (hwaddr)int128_get64(mr->size) - 1);
1802 } else {
1803 mon_printf(f,
1804 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1805 base + mr->addr,
1806 base + mr->addr
1807 + (int128_nz(mr->size) ?
1808 (hwaddr)int128_get64(int128_sub(mr->size,
1809 int128_one())) : 0),
1810 mr->priority,
1811 mr->romd_mode ? 'R' : '-',
1812 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1813 : '-',
1814 mr->name);
1815 }
1816
1817 QTAILQ_INIT(&submr_print_queue);
1818
1819 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1820 new_ml = g_new(MemoryRegionList, 1);
1821 new_ml->mr = submr;
1822 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1823 if (new_ml->mr->addr < ml->mr->addr ||
1824 (new_ml->mr->addr == ml->mr->addr &&
1825 new_ml->mr->priority > ml->mr->priority)) {
1826 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1827 new_ml = NULL;
1828 break;
1829 }
1830 }
1831 if (new_ml) {
1832 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1833 }
1834 }
1835
1836 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1837 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1838 alias_print_queue);
1839 }
1840
1841 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1842 g_free(ml);
1843 }
1844 }
1845
1846 void mtree_info(fprintf_function mon_printf, void *f)
1847 {
1848 MemoryRegionListHead ml_head;
1849 MemoryRegionList *ml, *ml2;
1850 AddressSpace *as;
1851
1852 QTAILQ_INIT(&ml_head);
1853
1854 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1855 mon_printf(f, "%s\n", as->name);
1856 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1857 }
1858
1859 mon_printf(f, "aliases\n");
1860 /* print aliased regions */
1861 QTAILQ_FOREACH(ml, &ml_head, queue) {
1862 if (!ml->printed) {
1863 mon_printf(f, "%s\n", ml->mr->name);
1864 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1865 }
1866 }
1867
1868 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1869 g_free(ml);
1870 }
1871 }
QEmu