fpu/softfloat-specialize.h

   1 /*
   2  * QEMU float support
   3  *
   4  * The code in this source file is derived from release 2a of the SoftFloat
   5  * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
   6  * some later contributions) are provided under that license, as detailed below.
   7  * It has subsequently been modified by contributors to the QEMU Project,
   8  * so some portions are provided under:
   9  *  the SoftFloat-2a license
  10  *  the BSD license
  11  *  GPL-v2-or-later
  12  *
  13  * Any future contributions to this file after December 1st 2014 will be
  14  * taken to be licensed under the Softfloat-2a license unless specifically
  15  * indicated otherwise.
  16  */
  17
  18 /*
  19 ===============================================================================
  20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  21 Arithmetic Package, Release 2a.
  22
  23 Written by John R. Hauser.  This work was made possible in part by the
  24 International Computer Science Institute, located at Suite 600, 1947 Center
  25 Street, Berkeley, California 94704.  Funding was partially provided by the
  26 National Science Foundation under grant MIP-9311980.  The original version
  27 of this code was written as part of a project to build a fixed-point vector
  28 processor in collaboration with the University of California at Berkeley,
  29 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  31 arithmetic/SoftFloat.html'.
  32
  33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  35 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  38
  39 Derivative works are acceptable, even for commercial purposes, so long as
  40 (1) they include prominent notice that the work is derivative, and (2) they
  41 include prominent notice akin to these four paragraphs for those parts of
  42 this code that are retained.
  43
  44 ===============================================================================
  45 */
  46
  47 /* BSD licensing:
  48  * Copyright (c) 2006, Fabrice Bellard
  49  * All rights reserved.
  50  *
  51  * Redistribution and use in source and binary forms, with or without
  52  * modification, are permitted provided that the following conditions are met:
  53  *
  54  * 1. Redistributions of source code must retain the above copyright notice,
  55  * this list of conditions and the following disclaimer.
  56  *
  57  * 2. Redistributions in binary form must reproduce the above copyright notice,
  58  * this list of conditions and the following disclaimer in the documentation
  59  * and/or other materials provided with the distribution.
  60  *
  61  * 3. Neither the name of the copyright holder nor the names of its contributors
  62  * may be used to endorse or promote products derived from this software without
  63  * specific prior written permission.
  64  *
  65  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  66  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  68  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  69  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  70  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  71  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  72  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  73  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  74  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  75  * THE POSSIBILITY OF SUCH DAMAGE.
  76  */
  77
  78 /* Portions of this work are licensed under the terms of the GNU GPL,
  79  * version 2 or later. See the COPYING file in the top-level directory.
  80  */
  81
  82 /* Does the target distinguish signaling NaNs from non-signaling NaNs
  83  * by setting the most significant bit of the mantissa for a signaling NaN?
  84  * (The more common choice is to have it be zero for SNaN and one for QNaN.)
  85  */
  86 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
  87 #define SNAN_BIT_IS_ONE 1
  88 #else
  89 #define SNAN_BIT_IS_ONE 0
  90 #endif
  91
  92 #if defined(TARGET_XTENSA)
  93 /* Define for architectures which deviate from IEEE in not supporting
  94  * signaling NaNs (so all NaNs are treated as quiet).
  95  */
  96 #define NO_SIGNALING_NANS 1
  97 #endif
  98
  99 /*----------------------------------------------------------------------------
 100 | The pattern for a default generated half-precision NaN.
 101 *----------------------------------------------------------------------------*/
 102 #if defined(TARGET_ARM)
 103 const float16 float16_default_nan = const_float16(0x7E00);
 104 #elif SNAN_BIT_IS_ONE
 105 const float16 float16_default_nan = const_float16(0x7DFF);
 106 #else
 107 const float16 float16_default_nan = const_float16(0xFE00);
 108 #endif
 109
 110 /*----------------------------------------------------------------------------
 111 | The pattern for a default generated single-precision NaN.
 112 *----------------------------------------------------------------------------*/
 113 #if defined(TARGET_SPARC)
 114 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
 115 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
 116       defined(TARGET_XTENSA)
 117 const float32 float32_default_nan = const_float32(0x7FC00000);
 118 #elif SNAN_BIT_IS_ONE
 119 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
 120 #else
 121 const float32 float32_default_nan = const_float32(0xFFC00000);
 122 #endif
 123
 124 /*----------------------------------------------------------------------------
 125 | The pattern for a default generated double-precision NaN.
 126 *----------------------------------------------------------------------------*/
 127 #if defined(TARGET_SPARC)
 128 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
 129 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
 130 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
 131 #elif SNAN_BIT_IS_ONE
 132 const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
 133 #else
 134 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
 135 #endif
 136
 137 /*----------------------------------------------------------------------------
 138 | The pattern for a default generated extended double-precision NaN.
 139 *----------------------------------------------------------------------------*/
 140 #if SNAN_BIT_IS_ONE
 141 #define floatx80_default_nan_high 0x7FFF
 142 #define floatx80_default_nan_low  LIT64(0xBFFFFFFFFFFFFFFF)
 143 #else
 144 #define floatx80_default_nan_high 0xFFFF
 145 #define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
 146 #endif
 147
 148 const floatx80 floatx80_default_nan
 149     = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
 150
 151 /*----------------------------------------------------------------------------
 152 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 153 | `low' values hold the most- and least-significant bits, respectively.
 154 *----------------------------------------------------------------------------*/
 155 #if SNAN_BIT_IS_ONE
 156 #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
 157 #define float128_default_nan_low  LIT64(0xFFFFFFFFFFFFFFFF)
 158 #else
 159 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
 160 #define float128_default_nan_low  LIT64( 0x0000000000000000 )
 161 #endif
 162
 163 const float128 float128_default_nan
 164     = make_float128_init(float128_default_nan_high, float128_default_nan_low);
 165
 166 /*----------------------------------------------------------------------------
 167 | Raises the exceptions specified by `flags'.  Floating-point traps can be
 168 | defined here if desired.  It is currently not possible for such a trap
 169 | to substitute a result value.  If traps are not implemented, this routine
 170 | should be simply `float_exception_flags |= flags;'.
 171 *----------------------------------------------------------------------------*/
 172
 173 void float_raise(int8 flags, float_status *status)
 174 {
 175     status->float_exception_flags |= flags;
 176 }
 177
 178 /*----------------------------------------------------------------------------
 179 | Internal canonical NaN format.
 180 *----------------------------------------------------------------------------*/
 181 typedef struct {
 182     flag sign;
 183     uint64_t high, low;
 184 } commonNaNT;
 185
 186 #ifdef NO_SIGNALING_NANS
 187 int float16_is_quiet_nan(float16 a_)
 188 {
 189     return float16_is_any_nan(a_);
 190 }
 191
 192 int float16_is_signaling_nan(float16 a_)
 193 {
 194     return 0;
 195 }
 196 #else
 197 /*----------------------------------------------------------------------------
 198 | Returns 1 if the half-precision floating-point value `a' is a quiet
 199 | NaN; otherwise returns 0.
 200 *----------------------------------------------------------------------------*/
 201
 202 int float16_is_quiet_nan(float16 a_)
 203 {
 204     uint16_t a = float16_val(a_);
 205 #if SNAN_BIT_IS_ONE
 206     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 207 #else
 208     return ((a & ~0x8000) >= 0x7c80);
 209 #endif
 210 }
 211
 212 /*----------------------------------------------------------------------------
 213 | Returns 1 if the half-precision floating-point value `a' is a signaling
 214 | NaN; otherwise returns 0.
 215 *----------------------------------------------------------------------------*/
 216
 217 int float16_is_signaling_nan(float16 a_)
 218 {
 219     uint16_t a = float16_val(a_);
 220 #if SNAN_BIT_IS_ONE
 221     return ((a & ~0x8000) >= 0x7c80);
 222 #else
 223     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 224 #endif
 225 }
 226 #endif
 227
 228 /*----------------------------------------------------------------------------
 229 | Returns a quiet NaN if the half-precision floating point value `a' is a
 230 | signaling NaN; otherwise returns `a'.
 231 *----------------------------------------------------------------------------*/
 232 float16 float16_maybe_silence_nan(float16 a_)
 233 {
 234     if (float16_is_signaling_nan(a_)) {
 235 #if SNAN_BIT_IS_ONE
 236 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 237         return float16_default_nan;
 238 #  else
 239 #    error Rules for silencing a signaling NaN are target-specific
 240 #  endif
 241 #else
 242         uint16_t a = float16_val(a_);
 243         a |= (1 << 9);
 244         return make_float16(a);
 245 #endif
 246     }
 247     return a_;
 248 }
 249
 250 /*----------------------------------------------------------------------------
 251 | Returns the result of converting the half-precision floating-point NaN
 252 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 253 | exception is raised.
 254 *----------------------------------------------------------------------------*/
 255
 256 static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
 257 {
 258     commonNaNT z;
 259
 260     if (float16_is_signaling_nan(a)) {
 261         float_raise(float_flag_invalid, status);
 262     }
 263     z.sign = float16_val(a) >> 15;
 264     z.low = 0;
 265     z.high = ((uint64_t) float16_val(a))<<54;
 266     return z;
 267 }
 268
 269 /*----------------------------------------------------------------------------
 270 | Returns the result of converting the canonical NaN `a' to the half-
 271 | precision floating-point format.
 272 *----------------------------------------------------------------------------*/
 273
 274 static float16 commonNaNToFloat16(commonNaNT a, float_status *status)
 275 {
 276     uint16_t mantissa = a.high>>54;
 277
 278     if (status->default_nan_mode) {
 279         return float16_default_nan;
 280     }
 281
 282     if (mantissa) {
 283         return make_float16(((((uint16_t) a.sign) << 15)
 284                              | (0x1F << 10) | mantissa));
 285     } else {
 286         return float16_default_nan;
 287     }
 288 }
 289
 290 #ifdef NO_SIGNALING_NANS
 291 int float32_is_quiet_nan(float32 a_)
 292 {
 293     return float32_is_any_nan(a_);
 294 }
 295
 296 int float32_is_signaling_nan(float32 a_)
 297 {
 298     return 0;
 299 }
 300 #else
 301 /*----------------------------------------------------------------------------
 302 | Returns 1 if the single-precision floating-point value `a' is a quiet
 303 | NaN; otherwise returns 0.
 304 *----------------------------------------------------------------------------*/
 305
 306 int float32_is_quiet_nan( float32 a_ )
 307 {
 308     uint32_t a = float32_val(a_);
 309 #if SNAN_BIT_IS_ONE
 310     return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
 311 #else
 312     return ((uint32_t)(a << 1) >= 0xff800000);
 313 #endif
 314 }
 315
 316 /*----------------------------------------------------------------------------
 317 | Returns 1 if the single-precision floating-point value `a' is a signaling
 318 | NaN; otherwise returns 0.
 319 *----------------------------------------------------------------------------*/
 320
 321 int float32_is_signaling_nan( float32 a_ )
 322 {
 323     uint32_t a = float32_val(a_);
 324 #if SNAN_BIT_IS_ONE
 325     return ((uint32_t)(a << 1) >= 0xff800000);
 326 #else
 327     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 328 #endif
 329 }
 330 #endif
 331
 332 /*----------------------------------------------------------------------------
 333 | Returns a quiet NaN if the single-precision floating point value `a' is a
 334 | signaling NaN; otherwise returns `a'.
 335 *----------------------------------------------------------------------------*/
 336
 337 float32 float32_maybe_silence_nan( float32 a_ )
 338 {
 339     if (float32_is_signaling_nan(a_)) {
 340 #if SNAN_BIT_IS_ONE
 341 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 342         return float32_default_nan;
 343 #  else
 344 #    error Rules for silencing a signaling NaN are target-specific
 345 #  endif
 346 #else
 347         uint32_t a = float32_val(a_);
 348         a |= (1 << 22);
 349         return make_float32(a);
 350 #endif
 351     }
 352     return a_;
 353 }
 354
 355 /*----------------------------------------------------------------------------
 356 | Returns the result of converting the single-precision floating-point NaN
 357 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 358 | exception is raised.
 359 *----------------------------------------------------------------------------*/
 360
 361 static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
 362 {
 363     commonNaNT z;
 364
 365     if (float32_is_signaling_nan(a)) {
 366         float_raise(float_flag_invalid, status);
 367     }
 368     z.sign = float32_val(a)>>31;
 369     z.low = 0;
 370     z.high = ( (uint64_t) float32_val(a) )<<41;
 371     return z;
 372 }
 373
 374 /*----------------------------------------------------------------------------
 375 | Returns the result of converting the canonical NaN `a' to the single-
 376 | precision floating-point format.
 377 *----------------------------------------------------------------------------*/
 378
 379 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 380 {
 381     uint32_t mantissa = a.high>>41;
 382
 383     if (status->default_nan_mode) {
 384         return float32_default_nan;
 385     }
 386
 387     if ( mantissa )
 388         return make_float32(
 389             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
 390     else
 391         return float32_default_nan;
 392 }
 393
 394 /*----------------------------------------------------------------------------
 395 | Select which NaN to propagate for a two-input operation.
 396 | IEEE754 doesn't specify all the details of this, so the
 397 | algorithm is target-specific.
 398 | The routine is passed various bits of information about the
 399 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 400 | Note that signalling NaNs are always squashed to quiet NaNs
 401 | by the caller, by calling floatXX_maybe_silence_nan() before
 402 | returning them.
 403 |
 404 | aIsLargerSignificand is only valid if both a and b are NaNs
 405 | of some kind, and is true if a has the larger significand,
 406 | or if both a and b have the same significand but a is
 407 | positive but b is negative. It is only needed for the x87
 408 | tie-break rule.
 409 *----------------------------------------------------------------------------*/
 410
 411 #if defined(TARGET_ARM)
 412 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 413                     flag aIsLargerSignificand)
 414 {
 415     /* ARM mandated NaN propagation rules: take the first of:
 416      *  1. A if it is signaling
 417      *  2. B if it is signaling
 418      *  3. A (quiet)
 419      *  4. B (quiet)
 420      * A signaling NaN is always quietened before returning it.
 421      */
 422     if (aIsSNaN) {
 423         return 0;
 424     } else if (bIsSNaN) {
 425         return 1;
 426     } else if (aIsQNaN) {
 427         return 0;
 428     } else {
 429         return 1;
 430     }
 431 }
 432 #elif defined(TARGET_MIPS)
 433 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 434                     flag aIsLargerSignificand)
 435 {
 436     /* According to MIPS specifications, if one of the two operands is
 437      * a sNaN, a new qNaN has to be generated. This is done in
 438      * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
 439      * says: "When possible, this QNaN result is one of the operand QNaN
 440      * values." In practice it seems that most implementations choose
 441      * the first operand if both operands are qNaN. In short this gives
 442      * the following rules:
 443      *  1. A if it is signaling
 444      *  2. B if it is signaling
 445      *  3. A (quiet)
 446      *  4. B (quiet)
 447      * A signaling NaN is always silenced before returning it.
 448      */
 449     if (aIsSNaN) {
 450         return 0;
 451     } else if (bIsSNaN) {
 452         return 1;
 453     } else if (aIsQNaN) {
 454         return 0;
 455     } else {
 456         return 1;
 457     }
 458 }
 459 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 460 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 461                    flag aIsLargerSignificand)
 462 {
 463     /* PowerPC propagation rules:
 464      *  1. A if it sNaN or qNaN
 465      *  2. B if it sNaN or qNaN
 466      * A signaling NaN is always silenced before returning it.
 467      */
 468     if (aIsSNaN || aIsQNaN) {
 469         return 0;
 470     } else {
 471         return 1;
 472     }
 473 }
 474 #else
 475 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 476                     flag aIsLargerSignificand)
 477 {
 478     /* This implements x87 NaN propagation rules:
 479      * SNaN + QNaN => return the QNaN
 480      * two SNaNs => return the one with the larger significand, silenced
 481      * two QNaNs => return the one with the larger significand
 482      * SNaN and a non-NaN => return the SNaN, silenced
 483      * QNaN and a non-NaN => return the QNaN
 484      *
 485      * If we get down to comparing significands and they are the same,
 486      * return the NaN with the positive sign bit (if any).
 487      */
 488     if (aIsSNaN) {
 489         if (bIsSNaN) {
 490             return aIsLargerSignificand ? 0 : 1;
 491         }
 492         return bIsQNaN ? 1 : 0;
 493     }
 494     else if (aIsQNaN) {
 495         if (bIsSNaN || !bIsQNaN)
 496             return 0;
 497         else {
 498             return aIsLargerSignificand ? 0 : 1;
 499         }
 500     } else {
 501         return 1;
 502     }
 503 }
 504 #endif
 505
 506 /*----------------------------------------------------------------------------
 507 | Select which NaN to propagate for a three-input operation.
 508 | For the moment we assume that no CPU needs the 'larger significand'
 509 | information.
 510 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 511 *----------------------------------------------------------------------------*/
 512 #if defined(TARGET_ARM)
 513 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 514                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 515                          float_status *status)
 516 {
 517     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 518      * the default NaN
 519      */
 520     if (infzero && cIsQNaN) {
 521         float_raise(float_flag_invalid, status);
 522         return 3;
 523     }
 524
 525     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 526      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 527      */
 528     if (cIsSNaN) {
 529         return 2;
 530     } else if (aIsSNaN) {
 531         return 0;
 532     } else if (bIsSNaN) {
 533         return 1;
 534     } else if (cIsQNaN) {
 535         return 2;
 536     } else if (aIsQNaN) {
 537         return 0;
 538     } else {
 539         return 1;
 540     }
 541 }
 542 #elif defined(TARGET_MIPS)
 543 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 544                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 545                          float_status *status)
 546 {
 547     /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
 548      * the default NaN
 549      */
 550     if (infzero) {
 551         float_raise(float_flag_invalid, status);
 552         return 3;
 553     }
 554
 555     /* Prefer sNaN over qNaN, in the a, b, c order. */
 556     if (aIsSNaN) {
 557         return 0;
 558     } else if (bIsSNaN) {
 559         return 1;
 560     } else if (cIsSNaN) {
 561         return 2;
 562     } else if (aIsQNaN) {
 563         return 0;
 564     } else if (bIsQNaN) {
 565         return 1;
 566     } else {
 567         return 2;
 568     }
 569 }
 570 #elif defined(TARGET_PPC)
 571 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 572                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 573                          float_status *status)
 574 {
 575     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 576      * to return an input NaN if we have one (ie c) rather than generating
 577      * a default NaN
 578      */
 579     if (infzero) {
 580         float_raise(float_flag_invalid, status);
 581         return 2;
 582     }
 583
 584     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 585      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 586      */
 587     if (aIsSNaN || aIsQNaN) {
 588         return 0;
 589     } else if (cIsSNaN || cIsQNaN) {
 590         return 2;
 591     } else {
 592         return 1;
 593     }
 594 }
 595 #else
 596 /* A default implementation: prefer a to b to c.
 597  * This is unlikely to actually match any real implementation.
 598  */
 599 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 600                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 601                          float_status *status)
 602 {
 603     if (aIsSNaN || aIsQNaN) {
 604         return 0;
 605     } else if (bIsSNaN || bIsQNaN) {
 606         return 1;
 607     } else {
 608         return 2;
 609     }
 610 }
 611 #endif
 612
 613 /*----------------------------------------------------------------------------
 614 | Takes two single-precision floating-point values `a' and `b', one of which
 615 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 616 | signaling NaN, the invalid exception is raised.
 617 *----------------------------------------------------------------------------*/
 618
 619 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
 620 {
 621     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 622     flag aIsLargerSignificand;
 623     uint32_t av, bv;
 624
 625     aIsQuietNaN = float32_is_quiet_nan( a );
 626     aIsSignalingNaN = float32_is_signaling_nan( a );
 627     bIsQuietNaN = float32_is_quiet_nan( b );
 628     bIsSignalingNaN = float32_is_signaling_nan( b );
 629     av = float32_val(a);
 630     bv = float32_val(b);
 631
 632     if (aIsSignalingNaN | bIsSignalingNaN) {
 633         float_raise(float_flag_invalid, status);
 634     }
 635
 636     if (status->default_nan_mode)
 637         return float32_default_nan;
 638
 639     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
 640         aIsLargerSignificand = 0;
 641     } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
 642         aIsLargerSignificand = 1;
 643     } else {
 644         aIsLargerSignificand = (av < bv) ? 1 : 0;
 645     }
 646
 647     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 648                 aIsLargerSignificand)) {
 649         return float32_maybe_silence_nan(b);
 650     } else {
 651         return float32_maybe_silence_nan(a);
 652     }
 653 }
 654
 655 /*----------------------------------------------------------------------------
 656 | Takes three single-precision floating-point values `a', `b' and `c', one of
 657 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 658 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 659 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 660 | obviously c is a NaN, and whether to propagate c or some other NaN is
 661 | implementation defined).
 662 *----------------------------------------------------------------------------*/
 663
 664 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
 665                                          float32 c, flag infzero,
 666                                          float_status *status)
 667 {
 668     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 669         cIsQuietNaN, cIsSignalingNaN;
 670     int which;
 671
 672     aIsQuietNaN = float32_is_quiet_nan(a);
 673     aIsSignalingNaN = float32_is_signaling_nan(a);
 674     bIsQuietNaN = float32_is_quiet_nan(b);
 675     bIsSignalingNaN = float32_is_signaling_nan(b);
 676     cIsQuietNaN = float32_is_quiet_nan(c);
 677     cIsSignalingNaN = float32_is_signaling_nan(c);
 678
 679     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 680         float_raise(float_flag_invalid, status);
 681     }
 682
 683     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 684                           bIsQuietNaN, bIsSignalingNaN,
 685                           cIsQuietNaN, cIsSignalingNaN, infzero, status);
 686
 687     if (status->default_nan_mode) {
 688         /* Note that this check is after pickNaNMulAdd so that function
 689          * has an opportunity to set the Invalid flag.
 690          */
 691         return float32_default_nan;
 692     }
 693
 694     switch (which) {
 695     case 0:
 696         return float32_maybe_silence_nan(a);
 697     case 1:
 698         return float32_maybe_silence_nan(b);
 699     case 2:
 700         return float32_maybe_silence_nan(c);
 701     case 3:
 702     default:
 703         return float32_default_nan;
 704     }
 705 }
 706
 707 #ifdef NO_SIGNALING_NANS
 708 int float64_is_quiet_nan(float64 a_)
 709 {
 710     return float64_is_any_nan(a_);
 711 }
 712
 713 int float64_is_signaling_nan(float64 a_)
 714 {
 715     return 0;
 716 }
 717 #else
 718 /*----------------------------------------------------------------------------
 719 | Returns 1 if the double-precision floating-point value `a' is a quiet
 720 | NaN; otherwise returns 0.
 721 *----------------------------------------------------------------------------*/
 722
 723 int float64_is_quiet_nan( float64 a_ )
 724 {
 725     uint64_t a = float64_val(a_);
 726 #if SNAN_BIT_IS_ONE
 727     return (((a >> 51) & 0xfff) == 0xffe)
 728            && (a & 0x0007ffffffffffffULL);
 729 #else
 730     return ((a << 1) >= 0xfff0000000000000ULL);
 731 #endif
 732 }
 733
 734 /*----------------------------------------------------------------------------
 735 | Returns 1 if the double-precision floating-point value `a' is a signaling
 736 | NaN; otherwise returns 0.
 737 *----------------------------------------------------------------------------*/
 738
 739 int float64_is_signaling_nan( float64 a_ )
 740 {
 741     uint64_t a = float64_val(a_);
 742 #if SNAN_BIT_IS_ONE
 743     return ((a << 1) >= 0xfff0000000000000ULL);
 744 #else
 745     return
 746            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 747         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 748 #endif
 749 }
 750 #endif
 751
 752 /*----------------------------------------------------------------------------
 753 | Returns a quiet NaN if the double-precision floating point value `a' is a
 754 | signaling NaN; otherwise returns `a'.
 755 *----------------------------------------------------------------------------*/
 756
 757 float64 float64_maybe_silence_nan( float64 a_ )
 758 {
 759     if (float64_is_signaling_nan(a_)) {
 760 #if SNAN_BIT_IS_ONE
 761 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 762         return float64_default_nan;
 763 #  else
 764 #    error Rules for silencing a signaling NaN are target-specific
 765 #  endif
 766 #else
 767         uint64_t a = float64_val(a_);
 768         a |= LIT64( 0x0008000000000000 );
 769         return make_float64(a);
 770 #endif
 771     }
 772     return a_;
 773 }
 774
 775 /*----------------------------------------------------------------------------
 776 | Returns the result of converting the double-precision floating-point NaN
 777 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 778 | exception is raised.
 779 *----------------------------------------------------------------------------*/
 780
 781 static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
 782 {
 783     commonNaNT z;
 784
 785     if (float64_is_signaling_nan(a)) {
 786         float_raise(float_flag_invalid, status);
 787     }
 788     z.sign = float64_val(a)>>63;
 789     z.low = 0;
 790     z.high = float64_val(a)<<12;
 791     return z;
 792 }
 793
 794 /*----------------------------------------------------------------------------
 795 | Returns the result of converting the canonical NaN `a' to the double-
 796 | precision floating-point format.
 797 *----------------------------------------------------------------------------*/
 798
 799 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
 800 {
 801     uint64_t mantissa = a.high>>12;
 802
 803     if (status->default_nan_mode) {
 804         return float64_default_nan;
 805     }
 806
 807     if ( mantissa )
 808         return make_float64(
 809               ( ( (uint64_t) a.sign )<<63 )
 810             | LIT64( 0x7FF0000000000000 )
 811             | ( a.high>>12 ));
 812     else
 813         return float64_default_nan;
 814 }
 815
 816 /*----------------------------------------------------------------------------
 817 | Takes two double-precision floating-point values `a' and `b', one of which
 818 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 819 | signaling NaN, the invalid exception is raised.
 820 *----------------------------------------------------------------------------*/
 821
 822 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
 823 {
 824     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 825     flag aIsLargerSignificand;
 826     uint64_t av, bv;
 827
 828     aIsQuietNaN = float64_is_quiet_nan( a );
 829     aIsSignalingNaN = float64_is_signaling_nan( a );
 830     bIsQuietNaN = float64_is_quiet_nan( b );
 831     bIsSignalingNaN = float64_is_signaling_nan( b );
 832     av = float64_val(a);
 833     bv = float64_val(b);
 834
 835     if (aIsSignalingNaN | bIsSignalingNaN) {
 836         float_raise(float_flag_invalid, status);
 837     }
 838
 839     if (status->default_nan_mode)
 840         return float64_default_nan;
 841
 842     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
 843         aIsLargerSignificand = 0;
 844     } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
 845         aIsLargerSignificand = 1;
 846     } else {
 847         aIsLargerSignificand = (av < bv) ? 1 : 0;
 848     }
 849
 850     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 851                 aIsLargerSignificand)) {
 852         return float64_maybe_silence_nan(b);
 853     } else {
 854         return float64_maybe_silence_nan(a);
 855     }
 856 }
 857
 858 /*----------------------------------------------------------------------------
 859 | Takes three double-precision floating-point values `a', `b' and `c', one of
 860 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 861 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 862 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 863 | obviously c is a NaN, and whether to propagate c or some other NaN is
 864 | implementation defined).
 865 *----------------------------------------------------------------------------*/
 866
 867 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
 868                                          float64 c, flag infzero,
 869                                          float_status *status)
 870 {
 871     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 872         cIsQuietNaN, cIsSignalingNaN;
 873     int which;
 874
 875     aIsQuietNaN = float64_is_quiet_nan(a);
 876     aIsSignalingNaN = float64_is_signaling_nan(a);
 877     bIsQuietNaN = float64_is_quiet_nan(b);
 878     bIsSignalingNaN = float64_is_signaling_nan(b);
 879     cIsQuietNaN = float64_is_quiet_nan(c);
 880     cIsSignalingNaN = float64_is_signaling_nan(c);
 881
 882     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 883         float_raise(float_flag_invalid, status);
 884     }
 885
 886     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 887                           bIsQuietNaN, bIsSignalingNaN,
 888                           cIsQuietNaN, cIsSignalingNaN, infzero, status);
 889
 890     if (status->default_nan_mode) {
 891         /* Note that this check is after pickNaNMulAdd so that function
 892          * has an opportunity to set the Invalid flag.
 893          */
 894         return float64_default_nan;
 895     }
 896
 897     switch (which) {
 898     case 0:
 899         return float64_maybe_silence_nan(a);
 900     case 1:
 901         return float64_maybe_silence_nan(b);
 902     case 2:
 903         return float64_maybe_silence_nan(c);
 904     case 3:
 905     default:
 906         return float64_default_nan;
 907     }
 908 }
 909
 910 #ifdef NO_SIGNALING_NANS
 911 int floatx80_is_quiet_nan(floatx80 a_)
 912 {
 913     return floatx80_is_any_nan(a_);
 914 }
 915
 916 int floatx80_is_signaling_nan(floatx80 a_)
 917 {
 918     return 0;
 919 }
 920 #else
 921 /*----------------------------------------------------------------------------
 922 | Returns 1 if the extended double-precision floating-point value `a' is a
 923 | quiet NaN; otherwise returns 0. This slightly differs from the same
 924 | function for other types as floatx80 has an explicit bit.
 925 *----------------------------------------------------------------------------*/
 926
 927 int floatx80_is_quiet_nan( floatx80 a )
 928 {
 929 #if SNAN_BIT_IS_ONE
 930     uint64_t aLow;
 931
 932     aLow = a.low & ~0x4000000000000000ULL;
 933     return ((a.high & 0x7fff) == 0x7fff)
 934         && (aLow << 1)
 935         && (a.low == aLow);
 936 #else
 937     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 938         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 939 #endif
 940 }
 941
 942 /*----------------------------------------------------------------------------
 943 | Returns 1 if the extended double-precision floating-point value `a' is a
 944 | signaling NaN; otherwise returns 0. This slightly differs from the same
 945 | function for other types as floatx80 has an explicit bit.
 946 *----------------------------------------------------------------------------*/
 947
 948 int floatx80_is_signaling_nan( floatx80 a )
 949 {
 950 #if SNAN_BIT_IS_ONE
 951     return ((a.high & 0x7fff) == 0x7fff)
 952         && ((a.low << 1) >= 0x8000000000000000ULL);
 953 #else
 954     uint64_t aLow;
 955
 956     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 957     return
 958            ( ( a.high & 0x7FFF ) == 0x7FFF )
 959         && (uint64_t) ( aLow<<1 )
 960         && ( a.low == aLow );
 961 #endif
 962 }
 963 #endif
 964
 965 /*----------------------------------------------------------------------------
 966 | Returns a quiet NaN if the extended double-precision floating point value
 967 | `a' is a signaling NaN; otherwise returns `a'.
 968 *----------------------------------------------------------------------------*/
 969
 970 floatx80 floatx80_maybe_silence_nan( floatx80 a )
 971 {
 972     if (floatx80_is_signaling_nan(a)) {
 973 #if SNAN_BIT_IS_ONE
 974 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 975         a.low = floatx80_default_nan_low;
 976         a.high = floatx80_default_nan_high;
 977 #  else
 978 #    error Rules for silencing a signaling NaN are target-specific
 979 #  endif
 980 #else
 981         a.low |= LIT64( 0xC000000000000000 );
 982         return a;
 983 #endif
 984     }
 985     return a;
 986 }
 987
 988 /*----------------------------------------------------------------------------
 989 | Returns the result of converting the extended double-precision floating-
 990 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 991 | invalid exception is raised.
 992 *----------------------------------------------------------------------------*/
 993
 994 static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
 995 {
 996     commonNaNT z;
 997
 998     if (floatx80_is_signaling_nan(a)) {
 999         float_raise(float_flag_invalid, status);
1000     }
1001     if ( a.low >> 63 ) {
1002         z.sign = a.high >> 15;
1003         z.low = 0;
1004         z.high = a.low << 1;
1005     } else {
1006         z.sign = floatx80_default_nan_high >> 15;
1007         z.low = 0;
1008         z.high = floatx80_default_nan_low << 1;
1009     }
1010     return z;
1011 }
1012
1013 /*----------------------------------------------------------------------------
1014 | Returns the result of converting the canonical NaN `a' to the extended
1015 | double-precision floating-point format.
1016 *----------------------------------------------------------------------------*/
1017
1018 static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
1019 {
1020     floatx80 z;
1021
1022     if (status->default_nan_mode) {
1023         z.low = floatx80_default_nan_low;
1024         z.high = floatx80_default_nan_high;
1025         return z;
1026     }
1027
1028     if (a.high >> 1) {
1029         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
1030         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
1031     } else {
1032         z.low = floatx80_default_nan_low;
1033         z.high = floatx80_default_nan_high;
1034     }
1035
1036     return z;
1037 }
1038
1039 /*----------------------------------------------------------------------------
1040 | Takes two extended double-precision floating-point values `a' and `b', one
1041 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
1042 | `b' is a signaling NaN, the invalid exception is raised.
1043 *----------------------------------------------------------------------------*/
1044
1045 static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b,
1046                                      float_status *status)
1047 {
1048     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1049     flag aIsLargerSignificand;
1050
1051     aIsQuietNaN = floatx80_is_quiet_nan( a );
1052     aIsSignalingNaN = floatx80_is_signaling_nan( a );
1053     bIsQuietNaN = floatx80_is_quiet_nan( b );
1054     bIsSignalingNaN = floatx80_is_signaling_nan( b );
1055
1056     if (aIsSignalingNaN | bIsSignalingNaN) {
1057         float_raise(float_flag_invalid, status);
1058     }
1059
1060     if (status->default_nan_mode) {
1061         a.low = floatx80_default_nan_low;
1062         a.high = floatx80_default_nan_high;
1063         return a;
1064     }
1065
1066     if (a.low < b.low) {
1067         aIsLargerSignificand = 0;
1068     } else if (b.low < a.low) {
1069         aIsLargerSignificand = 1;
1070     } else {
1071         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1072     }
1073
1074     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1075                 aIsLargerSignificand)) {
1076         return floatx80_maybe_silence_nan(b);
1077     } else {
1078         return floatx80_maybe_silence_nan(a);
1079     }
1080 }
1081
1082 #ifdef NO_SIGNALING_NANS
1083 int float128_is_quiet_nan(float128 a_)
1084 {
1085     return float128_is_any_nan(a_);
1086 }
1087
1088 int float128_is_signaling_nan(float128 a_)
1089 {
1090     return 0;
1091 }
1092 #else
1093 /*----------------------------------------------------------------------------
1094 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1095 | NaN; otherwise returns 0.
1096 *----------------------------------------------------------------------------*/
1097
1098 int float128_is_quiet_nan( float128 a )
1099 {
1100 #if SNAN_BIT_IS_ONE
1101     return (((a.high >> 47) & 0xffff) == 0xfffe)
1102         && (a.low || (a.high & 0x00007fffffffffffULL));
1103 #else
1104     return
1105         ((a.high << 1) >= 0xffff000000000000ULL)
1106         && (a.low || (a.high & 0x0000ffffffffffffULL));
1107 #endif
1108 }
1109
1110 /*----------------------------------------------------------------------------
1111 | Returns 1 if the quadruple-precision floating-point value `a' is a
1112 | signaling NaN; otherwise returns 0.
1113 *----------------------------------------------------------------------------*/
1114
1115 int float128_is_signaling_nan( float128 a )
1116 {
1117 #if SNAN_BIT_IS_ONE
1118     return
1119         ((a.high << 1) >= 0xffff000000000000ULL)
1120         && (a.low || (a.high & 0x0000ffffffffffffULL));
1121 #else
1122     return
1123            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1124         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1125 #endif
1126 }
1127 #endif
1128
1129 /*----------------------------------------------------------------------------
1130 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1131 | a signaling NaN; otherwise returns `a'.
1132 *----------------------------------------------------------------------------*/
1133
1134 float128 float128_maybe_silence_nan( float128 a )
1135 {
1136     if (float128_is_signaling_nan(a)) {
1137 #if SNAN_BIT_IS_ONE
1138 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1139         a.low = float128_default_nan_low;
1140         a.high = float128_default_nan_high;
1141 #  else
1142 #    error Rules for silencing a signaling NaN are target-specific
1143 #  endif
1144 #else
1145         a.high |= LIT64( 0x0000800000000000 );
1146         return a;
1147 #endif
1148     }
1149     return a;
1150 }
1151
1152 /*----------------------------------------------------------------------------
1153 | Returns the result of converting the quadruple-precision floating-point NaN
1154 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1155 | exception is raised.
1156 *----------------------------------------------------------------------------*/
1157
1158 static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
1159 {
1160     commonNaNT z;
1161
1162     if (float128_is_signaling_nan(a)) {
1163         float_raise(float_flag_invalid, status);
1164     }
1165     z.sign = a.high>>63;
1166     shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1167     return z;
1168 }
1169
1170 /*----------------------------------------------------------------------------
1171 | Returns the result of converting the canonical NaN `a' to the quadruple-
1172 | precision floating-point format.
1173 *----------------------------------------------------------------------------*/
1174
1175 static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
1176 {
1177     float128 z;
1178
1179     if (status->default_nan_mode) {
1180         z.low = float128_default_nan_low;
1181         z.high = float128_default_nan_high;
1182         return z;
1183     }
1184
1185     shift128Right( a.high, a.low, 16, &z.high, &z.low );
1186     z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1187     return z;
1188 }
1189
1190 /*----------------------------------------------------------------------------
1191 | Takes two quadruple-precision floating-point values `a' and `b', one of
1192 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1193 | `b' is a signaling NaN, the invalid exception is raised.
1194 *----------------------------------------------------------------------------*/
1195
1196 static float128 propagateFloat128NaN(float128 a, float128 b,
1197                                      float_status *status)
1198 {
1199     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1200     flag aIsLargerSignificand;
1201
1202     aIsQuietNaN = float128_is_quiet_nan( a );
1203     aIsSignalingNaN = float128_is_signaling_nan( a );
1204     bIsQuietNaN = float128_is_quiet_nan( b );
1205     bIsSignalingNaN = float128_is_signaling_nan( b );
1206
1207     if (aIsSignalingNaN | bIsSignalingNaN) {
1208         float_raise(float_flag_invalid, status);
1209     }
1210
1211     if (status->default_nan_mode) {
1212         a.low = float128_default_nan_low;
1213         a.high = float128_default_nan_high;
1214         return a;
1215     }
1216
1217     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1218         aIsLargerSignificand = 0;
1219     } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1220         aIsLargerSignificand = 1;
1221     } else {
1222         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1223     }
1224
1225     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1226                 aIsLargerSignificand)) {
1227         return float128_maybe_silence_nan(b);
1228     } else {
1229         return float128_maybe_silence_nan(a);
1230     }
1231 }
1232