fpu/softfloat-specialize.h

   1 /*
   2  * QEMU float support
   3  *
   4  * The code in this source file is derived from release 2a of the SoftFloat
   5  * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
   6  * some later contributions) are provided under that license, as detailed below.
   7  * It has subsequently been modified by contributors to the QEMU Project,
   8  * so some portions are provided under:
   9  *  the SoftFloat-2a license
  10  *  the BSD license
  11  *  GPL-v2-or-later
  12  *
  13  * Any future contributions to this file after December 1st 2014 will be
  14  * taken to be licensed under the Softfloat-2a license unless specifically
  15  * indicated otherwise.
  16  */
  17
  18 /*
  19 ===============================================================================
  20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  21 Arithmetic Package, Release 2a.
  22
  23 Written by John R. Hauser.  This work was made possible in part by the
  24 International Computer Science Institute, located at Suite 600, 1947 Center
  25 Street, Berkeley, California 94704.  Funding was partially provided by the
  26 National Science Foundation under grant MIP-9311980.  The original version
  27 of this code was written as part of a project to build a fixed-point vector
  28 processor in collaboration with the University of California at Berkeley,
  29 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  31 arithmetic/SoftFloat.html'.
  32
  33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  35 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  38
  39 Derivative works are acceptable, even for commercial purposes, so long as
  40 (1) they include prominent notice that the work is derivative, and (2) they
  41 include prominent notice akin to these four paragraphs for those parts of
  42 this code that are retained.
  43
  44 ===============================================================================
  45 */
  46
  47 /* BSD licensing:
  48  * Copyright (c) 2006, Fabrice Bellard
  49  * All rights reserved.
  50  *
  51  * Redistribution and use in source and binary forms, with or without
  52  * modification, are permitted provided that the following conditions are met:
  53  *
  54  * 1. Redistributions of source code must retain the above copyright notice,
  55  * this list of conditions and the following disclaimer.
  56  *
  57  * 2. Redistributions in binary form must reproduce the above copyright notice,
  58  * this list of conditions and the following disclaimer in the documentation
  59  * and/or other materials provided with the distribution.
  60  *
  61  * 3. Neither the name of the copyright holder nor the names of its contributors
  62  * may be used to endorse or promote products derived from this software without
  63  * specific prior written permission.
  64  *
  65  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  66  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  68  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  69  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  70  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  71  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  72  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  73  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  74  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  75  * THE POSSIBILITY OF SUCH DAMAGE.
  76  */
  77
  78 /* Portions of this work are licensed under the terms of the GNU GPL,
  79  * version 2 or later. See the COPYING file in the top-level directory.
  80  */
  81
  82 /* Does the target distinguish signaling NaNs from non-signaling NaNs
  83  * by setting the most significant bit of the mantissa for a signaling NaN?
  84  * (The more common choice is to have it be zero for SNaN and one for QNaN.)
  85  */
  86 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
  87 #define SNAN_BIT_IS_ONE 1
  88 #else
  89 #define SNAN_BIT_IS_ONE 0
  90 #endif
  91
  92 #if defined(TARGET_XTENSA)
  93 /* Define for architectures which deviate from IEEE in not supporting
  94  * signaling NaNs (so all NaNs are treated as quiet).
  95  */
  96 #define NO_SIGNALING_NANS 1
  97 #endif
  98
  99 /*----------------------------------------------------------------------------
 100 | The pattern for a default generated half-precision NaN.
 101 *----------------------------------------------------------------------------*/
 102 #if defined(TARGET_ARM)
 103 const float16 float16_default_nan = const_float16(0x7E00);
 104 #elif SNAN_BIT_IS_ONE
 105 const float16 float16_default_nan = const_float16(0x7DFF);
 106 #else
 107 const float16 float16_default_nan = const_float16(0xFE00);
 108 #endif
 109
 110 /*----------------------------------------------------------------------------
 111 | The pattern for a default generated single-precision NaN.
 112 *----------------------------------------------------------------------------*/
 113 #if defined(TARGET_SPARC)
 114 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
 115 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
 116       defined(TARGET_XTENSA)
 117 const float32 float32_default_nan = const_float32(0x7FC00000);
 118 #elif SNAN_BIT_IS_ONE
 119 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
 120 #else
 121 const float32 float32_default_nan = const_float32(0xFFC00000);
 122 #endif
 123
 124 /*----------------------------------------------------------------------------
 125 | The pattern for a default generated double-precision NaN.
 126 *----------------------------------------------------------------------------*/
 127 #if defined(TARGET_SPARC)
 128 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
 129 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
 130 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
 131 #elif SNAN_BIT_IS_ONE
 132 const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
 133 #else
 134 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
 135 #endif
 136
 137 /*----------------------------------------------------------------------------
 138 | The pattern for a default generated extended double-precision NaN.
 139 *----------------------------------------------------------------------------*/
 140 #if SNAN_BIT_IS_ONE
 141 #define floatx80_default_nan_high 0x7FFF
 142 #define floatx80_default_nan_low  LIT64(0xBFFFFFFFFFFFFFFF)
 143 #else
 144 #define floatx80_default_nan_high 0xFFFF
 145 #define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
 146 #endif
 147
 148 const floatx80 floatx80_default_nan
 149     = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
 150
 151 /*----------------------------------------------------------------------------
 152 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 153 | `low' values hold the most- and least-significant bits, respectively.
 154 *----------------------------------------------------------------------------*/
 155 #if SNAN_BIT_IS_ONE
 156 #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
 157 #define float128_default_nan_low  LIT64(0xFFFFFFFFFFFFFFFF)
 158 #else
 159 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
 160 #define float128_default_nan_low  LIT64( 0x0000000000000000 )
 161 #endif
 162
 163 const float128 float128_default_nan
 164     = make_float128_init(float128_default_nan_high, float128_default_nan_low);
 165
 166 /*----------------------------------------------------------------------------
 167 | Raises the exceptions specified by `flags'.  Floating-point traps can be
 168 | defined here if desired.  It is currently not possible for such a trap
 169 | to substitute a result value.  If traps are not implemented, this routine
 170 | should be simply `float_exception_flags |= flags;'.
 171 *----------------------------------------------------------------------------*/
 172
 173 void float_raise(int8 flags, float_status *status)
 174 {
 175     STATUS(float_exception_flags) |= flags;
 176 }
 177
 178 /*----------------------------------------------------------------------------
 179 | Internal canonical NaN format.
 180 *----------------------------------------------------------------------------*/
 181 typedef struct {
 182     flag sign;
 183     uint64_t high, low;
 184 } commonNaNT;
 185
 186 #ifdef NO_SIGNALING_NANS
 187 int float16_is_quiet_nan(float16 a_)
 188 {
 189     return float16_is_any_nan(a_);
 190 }
 191
 192 int float16_is_signaling_nan(float16 a_)
 193 {
 194     return 0;
 195 }
 196 #else
 197 /*----------------------------------------------------------------------------
 198 | Returns 1 if the half-precision floating-point value `a' is a quiet
 199 | NaN; otherwise returns 0.
 200 *----------------------------------------------------------------------------*/
 201
 202 int float16_is_quiet_nan(float16 a_)
 203 {
 204     uint16_t a = float16_val(a_);
 205 #if SNAN_BIT_IS_ONE
 206     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 207 #else
 208     return ((a & ~0x8000) >= 0x7c80);
 209 #endif
 210 }
 211
 212 /*----------------------------------------------------------------------------
 213 | Returns 1 if the half-precision floating-point value `a' is a signaling
 214 | NaN; otherwise returns 0.
 215 *----------------------------------------------------------------------------*/
 216
 217 int float16_is_signaling_nan(float16 a_)
 218 {
 219     uint16_t a = float16_val(a_);
 220 #if SNAN_BIT_IS_ONE
 221     return ((a & ~0x8000) >= 0x7c80);
 222 #else
 223     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 224 #endif
 225 }
 226 #endif
 227
 228 /*----------------------------------------------------------------------------
 229 | Returns a quiet NaN if the half-precision floating point value `a' is a
 230 | signaling NaN; otherwise returns `a'.
 231 *----------------------------------------------------------------------------*/
 232 float16 float16_maybe_silence_nan(float16 a_)
 233 {
 234     if (float16_is_signaling_nan(a_)) {
 235 #if SNAN_BIT_IS_ONE
 236 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 237         return float16_default_nan;
 238 #  else
 239 #    error Rules for silencing a signaling NaN are target-specific
 240 #  endif
 241 #else
 242         uint16_t a = float16_val(a_);
 243         a |= (1 << 9);
 244         return make_float16(a);
 245 #endif
 246     }
 247     return a_;
 248 }
 249
 250 /*----------------------------------------------------------------------------
 251 | Returns the result of converting the half-precision floating-point NaN
 252 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 253 | exception is raised.
 254 *----------------------------------------------------------------------------*/
 255
 256 static commonNaNT float16ToCommonNaN(float16 a, float_status *status)
 257 {
 258     commonNaNT z;
 259
 260     if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 261     z.sign = float16_val(a) >> 15;
 262     z.low = 0;
 263     z.high = ((uint64_t) float16_val(a))<<54;
 264     return z;
 265 }
 266
 267 /*----------------------------------------------------------------------------
 268 | Returns the result of converting the canonical NaN `a' to the half-
 269 | precision floating-point format.
 270 *----------------------------------------------------------------------------*/
 271
 272 static float16 commonNaNToFloat16(commonNaNT a, float_status *status)
 273 {
 274     uint16_t mantissa = a.high>>54;
 275
 276     if (STATUS(default_nan_mode)) {
 277         return float16_default_nan;
 278     }
 279
 280     if (mantissa) {
 281         return make_float16(((((uint16_t) a.sign) << 15)
 282                              | (0x1F << 10) | mantissa));
 283     } else {
 284         return float16_default_nan;
 285     }
 286 }
 287
 288 #ifdef NO_SIGNALING_NANS
 289 int float32_is_quiet_nan(float32 a_)
 290 {
 291     return float32_is_any_nan(a_);
 292 }
 293
 294 int float32_is_signaling_nan(float32 a_)
 295 {
 296     return 0;
 297 }
 298 #else
 299 /*----------------------------------------------------------------------------
 300 | Returns 1 if the single-precision floating-point value `a' is a quiet
 301 | NaN; otherwise returns 0.
 302 *----------------------------------------------------------------------------*/
 303
 304 int float32_is_quiet_nan( float32 a_ )
 305 {
 306     uint32_t a = float32_val(a_);
 307 #if SNAN_BIT_IS_ONE
 308     return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
 309 #else
 310     return ((uint32_t)(a << 1) >= 0xff800000);
 311 #endif
 312 }
 313
 314 /*----------------------------------------------------------------------------
 315 | Returns 1 if the single-precision floating-point value `a' is a signaling
 316 | NaN; otherwise returns 0.
 317 *----------------------------------------------------------------------------*/
 318
 319 int float32_is_signaling_nan( float32 a_ )
 320 {
 321     uint32_t a = float32_val(a_);
 322 #if SNAN_BIT_IS_ONE
 323     return ((uint32_t)(a << 1) >= 0xff800000);
 324 #else
 325     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 326 #endif
 327 }
 328 #endif
 329
 330 /*----------------------------------------------------------------------------
 331 | Returns a quiet NaN if the single-precision floating point value `a' is a
 332 | signaling NaN; otherwise returns `a'.
 333 *----------------------------------------------------------------------------*/
 334
 335 float32 float32_maybe_silence_nan( float32 a_ )
 336 {
 337     if (float32_is_signaling_nan(a_)) {
 338 #if SNAN_BIT_IS_ONE
 339 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 340         return float32_default_nan;
 341 #  else
 342 #    error Rules for silencing a signaling NaN are target-specific
 343 #  endif
 344 #else
 345         uint32_t a = float32_val(a_);
 346         a |= (1 << 22);
 347         return make_float32(a);
 348 #endif
 349     }
 350     return a_;
 351 }
 352
 353 /*----------------------------------------------------------------------------
 354 | Returns the result of converting the single-precision floating-point NaN
 355 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 356 | exception is raised.
 357 *----------------------------------------------------------------------------*/
 358
 359 static commonNaNT float32ToCommonNaN(float32 a, float_status *status)
 360 {
 361     commonNaNT z;
 362
 363     if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 364     z.sign = float32_val(a)>>31;
 365     z.low = 0;
 366     z.high = ( (uint64_t) float32_val(a) )<<41;
 367     return z;
 368 }
 369
 370 /*----------------------------------------------------------------------------
 371 | Returns the result of converting the canonical NaN `a' to the single-
 372 | precision floating-point format.
 373 *----------------------------------------------------------------------------*/
 374
 375 static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 376 {
 377     uint32_t mantissa = a.high>>41;
 378
 379     if ( STATUS(default_nan_mode) ) {
 380         return float32_default_nan;
 381     }
 382
 383     if ( mantissa )
 384         return make_float32(
 385             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
 386     else
 387         return float32_default_nan;
 388 }
 389
 390 /*----------------------------------------------------------------------------
 391 | Select which NaN to propagate for a two-input operation.
 392 | IEEE754 doesn't specify all the details of this, so the
 393 | algorithm is target-specific.
 394 | The routine is passed various bits of information about the
 395 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 396 | Note that signalling NaNs are always squashed to quiet NaNs
 397 | by the caller, by calling floatXX_maybe_silence_nan() before
 398 | returning them.
 399 |
 400 | aIsLargerSignificand is only valid if both a and b are NaNs
 401 | of some kind, and is true if a has the larger significand,
 402 | or if both a and b have the same significand but a is
 403 | positive but b is negative. It is only needed for the x87
 404 | tie-break rule.
 405 *----------------------------------------------------------------------------*/
 406
 407 #if defined(TARGET_ARM)
 408 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 409                     flag aIsLargerSignificand)
 410 {
 411     /* ARM mandated NaN propagation rules: take the first of:
 412      *  1. A if it is signaling
 413      *  2. B if it is signaling
 414      *  3. A (quiet)
 415      *  4. B (quiet)
 416      * A signaling NaN is always quietened before returning it.
 417      */
 418     if (aIsSNaN) {
 419         return 0;
 420     } else if (bIsSNaN) {
 421         return 1;
 422     } else if (aIsQNaN) {
 423         return 0;
 424     } else {
 425         return 1;
 426     }
 427 }
 428 #elif defined(TARGET_MIPS)
 429 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 430                     flag aIsLargerSignificand)
 431 {
 432     /* According to MIPS specifications, if one of the two operands is
 433      * a sNaN, a new qNaN has to be generated. This is done in
 434      * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
 435      * says: "When possible, this QNaN result is one of the operand QNaN
 436      * values." In practice it seems that most implementations choose
 437      * the first operand if both operands are qNaN. In short this gives
 438      * the following rules:
 439      *  1. A if it is signaling
 440      *  2. B if it is signaling
 441      *  3. A (quiet)
 442      *  4. B (quiet)
 443      * A signaling NaN is always silenced before returning it.
 444      */
 445     if (aIsSNaN) {
 446         return 0;
 447     } else if (bIsSNaN) {
 448         return 1;
 449     } else if (aIsQNaN) {
 450         return 0;
 451     } else {
 452         return 1;
 453     }
 454 }
 455 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 456 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 457                    flag aIsLargerSignificand)
 458 {
 459     /* PowerPC propagation rules:
 460      *  1. A if it sNaN or qNaN
 461      *  2. B if it sNaN or qNaN
 462      * A signaling NaN is always silenced before returning it.
 463      */
 464     if (aIsSNaN || aIsQNaN) {
 465         return 0;
 466     } else {
 467         return 1;
 468     }
 469 }
 470 #else
 471 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 472                     flag aIsLargerSignificand)
 473 {
 474     /* This implements x87 NaN propagation rules:
 475      * SNaN + QNaN => return the QNaN
 476      * two SNaNs => return the one with the larger significand, silenced
 477      * two QNaNs => return the one with the larger significand
 478      * SNaN and a non-NaN => return the SNaN, silenced
 479      * QNaN and a non-NaN => return the QNaN
 480      *
 481      * If we get down to comparing significands and they are the same,
 482      * return the NaN with the positive sign bit (if any).
 483      */
 484     if (aIsSNaN) {
 485         if (bIsSNaN) {
 486             return aIsLargerSignificand ? 0 : 1;
 487         }
 488         return bIsQNaN ? 1 : 0;
 489     }
 490     else if (aIsQNaN) {
 491         if (bIsSNaN || !bIsQNaN)
 492             return 0;
 493         else {
 494             return aIsLargerSignificand ? 0 : 1;
 495         }
 496     } else {
 497         return 1;
 498     }
 499 }
 500 #endif
 501
 502 /*----------------------------------------------------------------------------
 503 | Select which NaN to propagate for a three-input operation.
 504 | For the moment we assume that no CPU needs the 'larger significand'
 505 | information.
 506 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 507 *----------------------------------------------------------------------------*/
 508 #if defined(TARGET_ARM)
 509 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 510                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 511                          float_status *status)
 512 {
 513     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 514      * the default NaN
 515      */
 516     if (infzero && cIsQNaN) {
 517         float_raise(float_flag_invalid STATUS_VAR);
 518         return 3;
 519     }
 520
 521     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 522      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 523      */
 524     if (cIsSNaN) {
 525         return 2;
 526     } else if (aIsSNaN) {
 527         return 0;
 528     } else if (bIsSNaN) {
 529         return 1;
 530     } else if (cIsQNaN) {
 531         return 2;
 532     } else if (aIsQNaN) {
 533         return 0;
 534     } else {
 535         return 1;
 536     }
 537 }
 538 #elif defined(TARGET_MIPS)
 539 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 540                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 541                          float_status *status)
 542 {
 543     /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
 544      * the default NaN
 545      */
 546     if (infzero) {
 547         float_raise(float_flag_invalid STATUS_VAR);
 548         return 3;
 549     }
 550
 551     /* Prefer sNaN over qNaN, in the a, b, c order. */
 552     if (aIsSNaN) {
 553         return 0;
 554     } else if (bIsSNaN) {
 555         return 1;
 556     } else if (cIsSNaN) {
 557         return 2;
 558     } else if (aIsQNaN) {
 559         return 0;
 560     } else if (bIsQNaN) {
 561         return 1;
 562     } else {
 563         return 2;
 564     }
 565 }
 566 #elif defined(TARGET_PPC)
 567 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 568                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 569                          float_status *status)
 570 {
 571     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 572      * to return an input NaN if we have one (ie c) rather than generating
 573      * a default NaN
 574      */
 575     if (infzero) {
 576         float_raise(float_flag_invalid STATUS_VAR);
 577         return 2;
 578     }
 579
 580     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 581      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 582      */
 583     if (aIsSNaN || aIsQNaN) {
 584         return 0;
 585     } else if (cIsSNaN || cIsQNaN) {
 586         return 2;
 587     } else {
 588         return 1;
 589     }
 590 }
 591 #else
 592 /* A default implementation: prefer a to b to c.
 593  * This is unlikely to actually match any real implementation.
 594  */
 595 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 596                          flag cIsQNaN, flag cIsSNaN, flag infzero,
 597                          float_status *status)
 598 {
 599     if (aIsSNaN || aIsQNaN) {
 600         return 0;
 601     } else if (bIsSNaN || bIsQNaN) {
 602         return 1;
 603     } else {
 604         return 2;
 605     }
 606 }
 607 #endif
 608
 609 /*----------------------------------------------------------------------------
 610 | Takes two single-precision floating-point values `a' and `b', one of which
 611 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 612 | signaling NaN, the invalid exception is raised.
 613 *----------------------------------------------------------------------------*/
 614
 615 static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
 616 {
 617     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 618     flag aIsLargerSignificand;
 619     uint32_t av, bv;
 620
 621     aIsQuietNaN = float32_is_quiet_nan( a );
 622     aIsSignalingNaN = float32_is_signaling_nan( a );
 623     bIsQuietNaN = float32_is_quiet_nan( b );
 624     bIsSignalingNaN = float32_is_signaling_nan( b );
 625     av = float32_val(a);
 626     bv = float32_val(b);
 627
 628     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 629
 630     if ( STATUS(default_nan_mode) )
 631         return float32_default_nan;
 632
 633     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
 634         aIsLargerSignificand = 0;
 635     } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
 636         aIsLargerSignificand = 1;
 637     } else {
 638         aIsLargerSignificand = (av < bv) ? 1 : 0;
 639     }
 640
 641     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 642                 aIsLargerSignificand)) {
 643         return float32_maybe_silence_nan(b);
 644     } else {
 645         return float32_maybe_silence_nan(a);
 646     }
 647 }
 648
 649 /*----------------------------------------------------------------------------
 650 | Takes three single-precision floating-point values `a', `b' and `c', one of
 651 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 652 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 653 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 654 | obviously c is a NaN, and whether to propagate c or some other NaN is
 655 | implementation defined).
 656 *----------------------------------------------------------------------------*/
 657
 658 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
 659                                          float32 c, flag infzero,
 660                                          float_status *status)
 661 {
 662     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 663         cIsQuietNaN, cIsSignalingNaN;
 664     int which;
 665
 666     aIsQuietNaN = float32_is_quiet_nan(a);
 667     aIsSignalingNaN = float32_is_signaling_nan(a);
 668     bIsQuietNaN = float32_is_quiet_nan(b);
 669     bIsSignalingNaN = float32_is_signaling_nan(b);
 670     cIsQuietNaN = float32_is_quiet_nan(c);
 671     cIsSignalingNaN = float32_is_signaling_nan(c);
 672
 673     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 674         float_raise(float_flag_invalid STATUS_VAR);
 675     }
 676
 677     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 678                           bIsQuietNaN, bIsSignalingNaN,
 679                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 680
 681     if (STATUS(default_nan_mode)) {
 682         /* Note that this check is after pickNaNMulAdd so that function
 683          * has an opportunity to set the Invalid flag.
 684          */
 685         return float32_default_nan;
 686     }
 687
 688     switch (which) {
 689     case 0:
 690         return float32_maybe_silence_nan(a);
 691     case 1:
 692         return float32_maybe_silence_nan(b);
 693     case 2:
 694         return float32_maybe_silence_nan(c);
 695     case 3:
 696     default:
 697         return float32_default_nan;
 698     }
 699 }
 700
 701 #ifdef NO_SIGNALING_NANS
 702 int float64_is_quiet_nan(float64 a_)
 703 {
 704     return float64_is_any_nan(a_);
 705 }
 706
 707 int float64_is_signaling_nan(float64 a_)
 708 {
 709     return 0;
 710 }
 711 #else
 712 /*----------------------------------------------------------------------------
 713 | Returns 1 if the double-precision floating-point value `a' is a quiet
 714 | NaN; otherwise returns 0.
 715 *----------------------------------------------------------------------------*/
 716
 717 int float64_is_quiet_nan( float64 a_ )
 718 {
 719     uint64_t a = float64_val(a_);
 720 #if SNAN_BIT_IS_ONE
 721     return (((a >> 51) & 0xfff) == 0xffe)
 722            && (a & 0x0007ffffffffffffULL);
 723 #else
 724     return ((a << 1) >= 0xfff0000000000000ULL);
 725 #endif
 726 }
 727
 728 /*----------------------------------------------------------------------------
 729 | Returns 1 if the double-precision floating-point value `a' is a signaling
 730 | NaN; otherwise returns 0.
 731 *----------------------------------------------------------------------------*/
 732
 733 int float64_is_signaling_nan( float64 a_ )
 734 {
 735     uint64_t a = float64_val(a_);
 736 #if SNAN_BIT_IS_ONE
 737     return ((a << 1) >= 0xfff0000000000000ULL);
 738 #else
 739     return
 740            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 741         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 742 #endif
 743 }
 744 #endif
 745
 746 /*----------------------------------------------------------------------------
 747 | Returns a quiet NaN if the double-precision floating point value `a' is a
 748 | signaling NaN; otherwise returns `a'.
 749 *----------------------------------------------------------------------------*/
 750
 751 float64 float64_maybe_silence_nan( float64 a_ )
 752 {
 753     if (float64_is_signaling_nan(a_)) {
 754 #if SNAN_BIT_IS_ONE
 755 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 756         return float64_default_nan;
 757 #  else
 758 #    error Rules for silencing a signaling NaN are target-specific
 759 #  endif
 760 #else
 761         uint64_t a = float64_val(a_);
 762         a |= LIT64( 0x0008000000000000 );
 763         return make_float64(a);
 764 #endif
 765     }
 766     return a_;
 767 }
 768
 769 /*----------------------------------------------------------------------------
 770 | Returns the result of converting the double-precision floating-point NaN
 771 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 772 | exception is raised.
 773 *----------------------------------------------------------------------------*/
 774
 775 static commonNaNT float64ToCommonNaN(float64 a, float_status *status)
 776 {
 777     commonNaNT z;
 778
 779     if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 780     z.sign = float64_val(a)>>63;
 781     z.low = 0;
 782     z.high = float64_val(a)<<12;
 783     return z;
 784 }
 785
 786 /*----------------------------------------------------------------------------
 787 | Returns the result of converting the canonical NaN `a' to the double-
 788 | precision floating-point format.
 789 *----------------------------------------------------------------------------*/
 790
 791 static float64 commonNaNToFloat64(commonNaNT a, float_status *status)
 792 {
 793     uint64_t mantissa = a.high>>12;
 794
 795     if ( STATUS(default_nan_mode) ) {
 796         return float64_default_nan;
 797     }
 798
 799     if ( mantissa )
 800         return make_float64(
 801               ( ( (uint64_t) a.sign )<<63 )
 802             | LIT64( 0x7FF0000000000000 )
 803             | ( a.high>>12 ));
 804     else
 805         return float64_default_nan;
 806 }
 807
 808 /*----------------------------------------------------------------------------
 809 | Takes two double-precision floating-point values `a' and `b', one of which
 810 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 811 | signaling NaN, the invalid exception is raised.
 812 *----------------------------------------------------------------------------*/
 813
 814 static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
 815 {
 816     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 817     flag aIsLargerSignificand;
 818     uint64_t av, bv;
 819
 820     aIsQuietNaN = float64_is_quiet_nan( a );
 821     aIsSignalingNaN = float64_is_signaling_nan( a );
 822     bIsQuietNaN = float64_is_quiet_nan( b );
 823     bIsSignalingNaN = float64_is_signaling_nan( b );
 824     av = float64_val(a);
 825     bv = float64_val(b);
 826
 827     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 828
 829     if ( STATUS(default_nan_mode) )
 830         return float64_default_nan;
 831
 832     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
 833         aIsLargerSignificand = 0;
 834     } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
 835         aIsLargerSignificand = 1;
 836     } else {
 837         aIsLargerSignificand = (av < bv) ? 1 : 0;
 838     }
 839
 840     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 841                 aIsLargerSignificand)) {
 842         return float64_maybe_silence_nan(b);
 843     } else {
 844         return float64_maybe_silence_nan(a);
 845     }
 846 }
 847
 848 /*----------------------------------------------------------------------------
 849 | Takes three double-precision floating-point values `a', `b' and `c', one of
 850 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 851 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 852 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 853 | obviously c is a NaN, and whether to propagate c or some other NaN is
 854 | implementation defined).
 855 *----------------------------------------------------------------------------*/
 856
 857 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
 858                                          float64 c, flag infzero,
 859                                          float_status *status)
 860 {
 861     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 862         cIsQuietNaN, cIsSignalingNaN;
 863     int which;
 864
 865     aIsQuietNaN = float64_is_quiet_nan(a);
 866     aIsSignalingNaN = float64_is_signaling_nan(a);
 867     bIsQuietNaN = float64_is_quiet_nan(b);
 868     bIsSignalingNaN = float64_is_signaling_nan(b);
 869     cIsQuietNaN = float64_is_quiet_nan(c);
 870     cIsSignalingNaN = float64_is_signaling_nan(c);
 871
 872     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 873         float_raise(float_flag_invalid STATUS_VAR);
 874     }
 875
 876     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 877                           bIsQuietNaN, bIsSignalingNaN,
 878                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 879
 880     if (STATUS(default_nan_mode)) {
 881         /* Note that this check is after pickNaNMulAdd so that function
 882          * has an opportunity to set the Invalid flag.
 883          */
 884         return float64_default_nan;
 885     }
 886
 887     switch (which) {
 888     case 0:
 889         return float64_maybe_silence_nan(a);
 890     case 1:
 891         return float64_maybe_silence_nan(b);
 892     case 2:
 893         return float64_maybe_silence_nan(c);
 894     case 3:
 895     default:
 896         return float64_default_nan;
 897     }
 898 }
 899
 900 #ifdef NO_SIGNALING_NANS
 901 int floatx80_is_quiet_nan(floatx80 a_)
 902 {
 903     return floatx80_is_any_nan(a_);
 904 }
 905
 906 int floatx80_is_signaling_nan(floatx80 a_)
 907 {
 908     return 0;
 909 }
 910 #else
 911 /*----------------------------------------------------------------------------
 912 | Returns 1 if the extended double-precision floating-point value `a' is a
 913 | quiet NaN; otherwise returns 0. This slightly differs from the same
 914 | function for other types as floatx80 has an explicit bit.
 915 *----------------------------------------------------------------------------*/
 916
 917 int floatx80_is_quiet_nan( floatx80 a )
 918 {
 919 #if SNAN_BIT_IS_ONE
 920     uint64_t aLow;
 921
 922     aLow = a.low & ~0x4000000000000000ULL;
 923     return ((a.high & 0x7fff) == 0x7fff)
 924         && (aLow << 1)
 925         && (a.low == aLow);
 926 #else
 927     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 928         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 929 #endif
 930 }
 931
 932 /*----------------------------------------------------------------------------
 933 | Returns 1 if the extended double-precision floating-point value `a' is a
 934 | signaling NaN; otherwise returns 0. This slightly differs from the same
 935 | function for other types as floatx80 has an explicit bit.
 936 *----------------------------------------------------------------------------*/
 937
 938 int floatx80_is_signaling_nan( floatx80 a )
 939 {
 940 #if SNAN_BIT_IS_ONE
 941     return ((a.high & 0x7fff) == 0x7fff)
 942         && ((a.low << 1) >= 0x8000000000000000ULL);
 943 #else
 944     uint64_t aLow;
 945
 946     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 947     return
 948            ( ( a.high & 0x7FFF ) == 0x7FFF )
 949         && (uint64_t) ( aLow<<1 )
 950         && ( a.low == aLow );
 951 #endif
 952 }
 953 #endif
 954
 955 /*----------------------------------------------------------------------------
 956 | Returns a quiet NaN if the extended double-precision floating point value
 957 | `a' is a signaling NaN; otherwise returns `a'.
 958 *----------------------------------------------------------------------------*/
 959
 960 floatx80 floatx80_maybe_silence_nan( floatx80 a )
 961 {
 962     if (floatx80_is_signaling_nan(a)) {
 963 #if SNAN_BIT_IS_ONE
 964 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 965         a.low = floatx80_default_nan_low;
 966         a.high = floatx80_default_nan_high;
 967 #  else
 968 #    error Rules for silencing a signaling NaN are target-specific
 969 #  endif
 970 #else
 971         a.low |= LIT64( 0xC000000000000000 );
 972         return a;
 973 #endif
 974     }
 975     return a;
 976 }
 977
 978 /*----------------------------------------------------------------------------
 979 | Returns the result of converting the extended double-precision floating-
 980 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 981 | invalid exception is raised.
 982 *----------------------------------------------------------------------------*/
 983
 984 static commonNaNT floatx80ToCommonNaN(floatx80 a, float_status *status)
 985 {
 986     commonNaNT z;
 987
 988     if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 989     if ( a.low >> 63 ) {
 990         z.sign = a.high >> 15;
 991         z.low = 0;
 992         z.high = a.low << 1;
 993     } else {
 994         z.sign = floatx80_default_nan_high >> 15;
 995         z.low = 0;
 996         z.high = floatx80_default_nan_low << 1;
 997     }
 998     return z;
 999 }
1000
1001 /*----------------------------------------------------------------------------
1002 | Returns the result of converting the canonical NaN `a' to the extended
1003 | double-precision floating-point format.
1004 *----------------------------------------------------------------------------*/
1005
1006 static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status)
1007 {
1008     floatx80 z;
1009
1010     if ( STATUS(default_nan_mode) ) {
1011         z.low = floatx80_default_nan_low;
1012         z.high = floatx80_default_nan_high;
1013         return z;
1014     }
1015
1016     if (a.high >> 1) {
1017         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
1018         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
1019     } else {
1020         z.low = floatx80_default_nan_low;
1021         z.high = floatx80_default_nan_high;
1022     }
1023
1024     return z;
1025 }
1026
1027 /*----------------------------------------------------------------------------
1028 | Takes two extended double-precision floating-point values `a' and `b', one
1029 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
1030 | `b' is a signaling NaN, the invalid exception is raised.
1031 *----------------------------------------------------------------------------*/
1032
1033 static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b,
1034                                      float_status *status)
1035 {
1036     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1037     flag aIsLargerSignificand;
1038
1039     aIsQuietNaN = floatx80_is_quiet_nan( a );
1040     aIsSignalingNaN = floatx80_is_signaling_nan( a );
1041     bIsQuietNaN = floatx80_is_quiet_nan( b );
1042     bIsSignalingNaN = floatx80_is_signaling_nan( b );
1043
1044     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1045
1046     if ( STATUS(default_nan_mode) ) {
1047         a.low = floatx80_default_nan_low;
1048         a.high = floatx80_default_nan_high;
1049         return a;
1050     }
1051
1052     if (a.low < b.low) {
1053         aIsLargerSignificand = 0;
1054     } else if (b.low < a.low) {
1055         aIsLargerSignificand = 1;
1056     } else {
1057         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1058     }
1059
1060     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1061                 aIsLargerSignificand)) {
1062         return floatx80_maybe_silence_nan(b);
1063     } else {
1064         return floatx80_maybe_silence_nan(a);
1065     }
1066 }
1067
1068 #ifdef NO_SIGNALING_NANS
1069 int float128_is_quiet_nan(float128 a_)
1070 {
1071     return float128_is_any_nan(a_);
1072 }
1073
1074 int float128_is_signaling_nan(float128 a_)
1075 {
1076     return 0;
1077 }
1078 #else
1079 /*----------------------------------------------------------------------------
1080 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1081 | NaN; otherwise returns 0.
1082 *----------------------------------------------------------------------------*/
1083
1084 int float128_is_quiet_nan( float128 a )
1085 {
1086 #if SNAN_BIT_IS_ONE
1087     return (((a.high >> 47) & 0xffff) == 0xfffe)
1088         && (a.low || (a.high & 0x00007fffffffffffULL));
1089 #else
1090     return
1091         ((a.high << 1) >= 0xffff000000000000ULL)
1092         && (a.low || (a.high & 0x0000ffffffffffffULL));
1093 #endif
1094 }
1095
1096 /*----------------------------------------------------------------------------
1097 | Returns 1 if the quadruple-precision floating-point value `a' is a
1098 | signaling NaN; otherwise returns 0.
1099 *----------------------------------------------------------------------------*/
1100
1101 int float128_is_signaling_nan( float128 a )
1102 {
1103 #if SNAN_BIT_IS_ONE
1104     return
1105         ((a.high << 1) >= 0xffff000000000000ULL)
1106         && (a.low || (a.high & 0x0000ffffffffffffULL));
1107 #else
1108     return
1109            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1110         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1111 #endif
1112 }
1113 #endif
1114
1115 /*----------------------------------------------------------------------------
1116 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1117 | a signaling NaN; otherwise returns `a'.
1118 *----------------------------------------------------------------------------*/
1119
1120 float128 float128_maybe_silence_nan( float128 a )
1121 {
1122     if (float128_is_signaling_nan(a)) {
1123 #if SNAN_BIT_IS_ONE
1124 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1125         a.low = float128_default_nan_low;
1126         a.high = float128_default_nan_high;
1127 #  else
1128 #    error Rules for silencing a signaling NaN are target-specific
1129 #  endif
1130 #else
1131         a.high |= LIT64( 0x0000800000000000 );
1132         return a;
1133 #endif
1134     }
1135     return a;
1136 }
1137
1138 /*----------------------------------------------------------------------------
1139 | Returns the result of converting the quadruple-precision floating-point NaN
1140 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1141 | exception is raised.
1142 *----------------------------------------------------------------------------*/
1143
1144 static commonNaNT float128ToCommonNaN(float128 a, float_status *status)
1145 {
1146     commonNaNT z;
1147
1148     if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
1149     z.sign = a.high>>63;
1150     shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1151     return z;
1152 }
1153
1154 /*----------------------------------------------------------------------------
1155 | Returns the result of converting the canonical NaN `a' to the quadruple-
1156 | precision floating-point format.
1157 *----------------------------------------------------------------------------*/
1158
1159 static float128 commonNaNToFloat128(commonNaNT a, float_status *status)
1160 {
1161     float128 z;
1162
1163     if ( STATUS(default_nan_mode) ) {
1164         z.low = float128_default_nan_low;
1165         z.high = float128_default_nan_high;
1166         return z;
1167     }
1168
1169     shift128Right( a.high, a.low, 16, &z.high, &z.low );
1170     z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1171     return z;
1172 }
1173
1174 /*----------------------------------------------------------------------------
1175 | Takes two quadruple-precision floating-point values `a' and `b', one of
1176 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1177 | `b' is a signaling NaN, the invalid exception is raised.
1178 *----------------------------------------------------------------------------*/
1179
1180 static float128 propagateFloat128NaN(float128 a, float128 b,
1181                                      float_status *status)
1182 {
1183     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1184     flag aIsLargerSignificand;
1185
1186     aIsQuietNaN = float128_is_quiet_nan( a );
1187     aIsSignalingNaN = float128_is_signaling_nan( a );
1188     bIsQuietNaN = float128_is_quiet_nan( b );
1189     bIsSignalingNaN = float128_is_signaling_nan( b );
1190
1191     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1192
1193     if ( STATUS(default_nan_mode) ) {
1194         a.low = float128_default_nan_low;
1195         a.high = float128_default_nan_high;
1196         return a;
1197     }
1198
1199     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1200         aIsLargerSignificand = 0;
1201     } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1202         aIsLargerSignificand = 1;
1203     } else {
1204         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1205     }
1206
1207     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1208                 aIsLargerSignificand)) {
1209         return float128_maybe_silence_nan(b);
1210     } else {
1211         return float128_maybe_silence_nan(a);
1212     }
1213 }
1214