hw: Add support for LSI SAS1068 (mptsas) device
[qemu.git] / tests / ivshmem-test.c
blob705fece717b797a74a3c3d6531949b476510a538
1 /*
2 * QTest testcase for ivshmem
4 * Copyright (c) 2014 SUSE LINUX Products GmbH
5 * Copyright (c) 2015 Red Hat, Inc.
7 * This work is licensed under the terms of the GNU GPL, version 2 or later.
8 * See the COPYING file in the top-level directory.
9 */
11 #include <errno.h>
12 #include <fcntl.h>
13 #include <glib.h>
14 #include <glib/gstdio.h>
15 #include <string.h>
16 #include <sys/mman.h>
17 #include <unistd.h>
18 #include "contrib/ivshmem-server/ivshmem-server.h"
19 #include "libqos/pci-pc.h"
20 #include "libqtest.h"
21 #include "qemu/osdep.h"
22 #include "qemu-common.h"
24 #define TMPSHMSIZE (1 << 20)
25 static char *tmpshm;
26 static void *tmpshmem;
27 static char *tmpdir;
28 static char *tmpserver;
30 static void save_fn(QPCIDevice *dev, int devfn, void *data)
32 QPCIDevice **pdev = (QPCIDevice **) data;
34 *pdev = dev;
37 static QPCIDevice *get_device(QPCIBus *pcibus)
39 QPCIDevice *dev;
41 dev = NULL;
42 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
43 g_assert(dev != NULL);
45 return dev;
48 typedef struct _IVState {
49 QTestState *qtest;
50 void *reg_base, *mem_base;
51 QPCIBus *pcibus;
52 QPCIDevice *dev;
53 } IVState;
55 enum Reg {
56 INTRMASK = 0,
57 INTRSTATUS = 4,
58 IVPOSITION = 8,
59 DOORBELL = 12,
62 static const char* reg2str(enum Reg reg) {
63 switch (reg) {
64 case INTRMASK:
65 return "IntrMask";
66 case INTRSTATUS:
67 return "IntrStatus";
68 case IVPOSITION:
69 return "IVPosition";
70 case DOORBELL:
71 return "DoorBell";
72 default:
73 return NULL;
77 static inline unsigned in_reg(IVState *s, enum Reg reg)
79 const char *name = reg2str(reg);
80 QTestState *qtest = global_qtest;
81 unsigned res;
83 global_qtest = s->qtest;
84 res = qpci_io_readl(s->dev, s->reg_base + reg);
85 g_test_message("*%s -> %x\n", name, res);
86 global_qtest = qtest;
88 return res;
91 static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
93 const char *name = reg2str(reg);
94 QTestState *qtest = global_qtest;
96 global_qtest = s->qtest;
97 g_test_message("%x -> *%s\n", v, name);
98 qpci_io_writel(s->dev, s->reg_base + reg, v);
99 global_qtest = qtest;
102 static void cleanup_vm(IVState *s)
104 g_free(s->dev);
105 qpci_free_pc(s->pcibus);
106 qtest_quit(s->qtest);
109 static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
111 uint64_t barsize;
113 s->qtest = qtest_start(cmd);
114 s->pcibus = qpci_init_pc();
115 s->dev = get_device(s->pcibus);
117 /* FIXME: other bar order fails, mappings changes */
118 s->mem_base = qpci_iomap(s->dev, 2, &barsize);
119 g_assert_nonnull(s->mem_base);
120 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
122 if (msix) {
123 qpci_msix_enable(s->dev);
126 s->reg_base = qpci_iomap(s->dev, 0, &barsize);
127 g_assert_nonnull(s->reg_base);
128 g_assert_cmpuint(barsize, ==, 256);
130 qpci_device_enable(s->dev);
133 static void setup_vm(IVState *s)
135 char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
137 setup_vm_cmd(s, cmd, false);
139 g_free(cmd);
142 static void test_ivshmem_single(void)
144 IVState state, *s;
145 uint32_t data[1024];
146 int i;
148 setup_vm(&state);
149 s = &state;
151 /* valid io */
152 out_reg(s, INTRMASK, 0);
153 in_reg(s, INTRSTATUS);
154 in_reg(s, IVPOSITION);
156 out_reg(s, INTRMASK, 0xffffffff);
157 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
158 out_reg(s, INTRSTATUS, 1);
159 /* XXX: intercept IRQ, not seen in resp */
160 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
162 /* invalid io */
163 out_reg(s, IVPOSITION, 1);
164 out_reg(s, DOORBELL, 8 << 16);
166 for (i = 0; i < G_N_ELEMENTS(data); i++) {
167 data[i] = i;
169 qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
171 for (i = 0; i < G_N_ELEMENTS(data); i++) {
172 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
175 memset(data, 0, sizeof(data));
177 qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
178 for (i = 0; i < G_N_ELEMENTS(data); i++) {
179 g_assert_cmpuint(data[i], ==, i);
182 cleanup_vm(s);
185 static void test_ivshmem_pair(void)
187 IVState state1, state2, *s1, *s2;
188 char *data;
189 int i;
191 setup_vm(&state1);
192 s1 = &state1;
193 setup_vm(&state2);
194 s2 = &state2;
196 data = g_malloc0(TMPSHMSIZE);
198 /* host write, guest 1 & 2 read */
199 memset(tmpshmem, 0x42, TMPSHMSIZE);
200 qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
201 for (i = 0; i < TMPSHMSIZE; i++) {
202 g_assert_cmpuint(data[i], ==, 0x42);
204 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
205 for (i = 0; i < TMPSHMSIZE; i++) {
206 g_assert_cmpuint(data[i], ==, 0x42);
209 /* guest 1 write, guest 2 read */
210 memset(data, 0x43, TMPSHMSIZE);
211 qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
212 memset(data, 0, TMPSHMSIZE);
213 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
214 for (i = 0; i < TMPSHMSIZE; i++) {
215 g_assert_cmpuint(data[i], ==, 0x43);
218 /* guest 2 write, guest 1 read */
219 memset(data, 0x44, TMPSHMSIZE);
220 qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
221 memset(data, 0, TMPSHMSIZE);
222 qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
223 for (i = 0; i < TMPSHMSIZE; i++) {
224 g_assert_cmpuint(data[i], ==, 0x44);
227 cleanup_vm(s1);
228 cleanup_vm(s2);
229 g_free(data);
232 typedef struct ServerThread {
233 GThread *thread;
234 IvshmemServer *server;
235 int pipe[2]; /* to handle quit */
236 } ServerThread;
238 static void *server_thread(void *data)
240 ServerThread *t = data;
241 IvshmemServer *server = t->server;
243 while (true) {
244 fd_set fds;
245 int maxfd, ret;
247 FD_ZERO(&fds);
248 FD_SET(t->pipe[0], &fds);
249 maxfd = t->pipe[0] + 1;
251 ivshmem_server_get_fds(server, &fds, &maxfd);
253 ret = select(maxfd, &fds, NULL, NULL, NULL);
255 if (ret < 0) {
256 if (errno == EINTR) {
257 continue;
260 g_critical("select error: %s\n", strerror(errno));
261 break;
263 if (ret == 0) {
264 continue;
267 if (FD_ISSET(t->pipe[0], &fds)) {
268 break;
271 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
272 g_critical("ivshmem_server_handle_fds() failed\n");
273 break;
277 return NULL;
280 static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
282 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
283 "-device ivshmem,size=1M,chardev=chr0,vectors=%d,msi=%s",
284 tmpserver, nvectors, msi ? "true" : "false");
286 setup_vm_cmd(s, cmd, msi);
288 g_free(cmd);
291 static void test_ivshmem_server(bool msi)
293 IVState state1, state2, *s1, *s2;
294 ServerThread thread;
295 IvshmemServer server;
296 int ret, vm1, vm2;
297 int nvectors = 2;
298 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
300 memset(tmpshmem, 0x42, TMPSHMSIZE);
301 ret = ivshmem_server_init(&server, tmpserver, tmpshm,
302 TMPSHMSIZE, nvectors,
303 g_test_verbose());
304 g_assert_cmpint(ret, ==, 0);
306 ret = ivshmem_server_start(&server);
307 g_assert_cmpint(ret, ==, 0);
309 setup_vm_with_server(&state1, nvectors, msi);
310 s1 = &state1;
311 setup_vm_with_server(&state2, nvectors, msi);
312 s2 = &state2;
314 g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
315 g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
317 g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
319 thread.server = &server;
320 ret = pipe(thread.pipe);
321 g_assert_cmpint(ret, ==, 0);
322 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
323 g_assert(thread.thread != NULL);
325 /* waiting until mapping is done */
326 while (g_get_monotonic_time() < end_time) {
327 g_usleep(1000);
329 if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
330 qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
331 break;
335 /* check got different VM ids */
336 vm1 = in_reg(s1, IVPOSITION);
337 vm2 = in_reg(s2, IVPOSITION);
338 g_assert_cmpuint(vm1, !=, vm2);
340 global_qtest = s1->qtest;
341 if (msi) {
342 ret = qpci_msix_table_size(s1->dev);
343 g_assert_cmpuint(ret, ==, nvectors);
346 /* ping vm2 -> vm1 */
347 if (msi) {
348 ret = qpci_msix_pending(s1->dev, 0);
349 g_assert_cmpuint(ret, ==, 0);
350 } else {
351 out_reg(s1, INTRSTATUS, 0);
353 out_reg(s2, DOORBELL, vm1 << 16);
354 do {
355 g_usleep(10000);
356 ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
357 } while (ret == 0 && g_get_monotonic_time() < end_time);
358 g_assert_cmpuint(ret, !=, 0);
360 /* ping vm1 -> vm2 */
361 global_qtest = s2->qtest;
362 if (msi) {
363 ret = qpci_msix_pending(s2->dev, 0);
364 g_assert_cmpuint(ret, ==, 0);
365 } else {
366 out_reg(s2, INTRSTATUS, 0);
368 out_reg(s1, DOORBELL, vm2 << 16);
369 do {
370 g_usleep(10000);
371 ret = msi ? qpci_msix_pending(s2->dev, 0) : in_reg(s2, INTRSTATUS);
372 } while (ret == 0 && g_get_monotonic_time() < end_time);
373 g_assert_cmpuint(ret, !=, 0);
375 cleanup_vm(s2);
376 cleanup_vm(s1);
378 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
379 g_error("qemu_write_full: %s", g_strerror(errno));
382 g_thread_join(thread.thread);
384 ivshmem_server_close(&server);
385 close(thread.pipe[1]);
386 close(thread.pipe[0]);
389 static void test_ivshmem_server_msi(void)
391 test_ivshmem_server(true);
394 static void test_ivshmem_server_irq(void)
396 test_ivshmem_server(false);
399 #define PCI_SLOT_HP 0x06
401 static void test_ivshmem_hotplug(void)
403 gchar *opts;
405 qtest_start("");
407 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
409 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
410 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
412 qtest_end();
413 g_free(opts);
416 static void test_ivshmem_memdev(void)
418 IVState state;
420 /* just for the sake of checking memory-backend property */
421 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
422 " -device ivshmem,x-memdev=mb1", false);
424 cleanup_vm(&state);
427 static void cleanup(void)
429 if (tmpshmem) {
430 munmap(tmpshmem, TMPSHMSIZE);
431 tmpshmem = NULL;
434 if (tmpshm) {
435 shm_unlink(tmpshm);
436 g_free(tmpshm);
437 tmpshm = NULL;
440 if (tmpserver) {
441 g_unlink(tmpserver);
442 g_free(tmpserver);
443 tmpserver = NULL;
446 if (tmpdir) {
447 g_rmdir(tmpdir);
448 tmpdir = NULL;
452 static void abrt_handler(void *data)
454 cleanup();
457 static gchar *mktempshm(int size, int *fd)
459 while (true) {
460 gchar *name;
462 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
463 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
464 S_IRWXU|S_IRWXG|S_IRWXO);
465 if (*fd > 0) {
466 g_assert(ftruncate(*fd, size) == 0);
467 return name;
470 g_free(name);
472 if (errno != EEXIST) {
473 perror("shm_open");
474 return NULL;
479 int main(int argc, char **argv)
481 int ret, fd;
482 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
484 #if !GLIB_CHECK_VERSION(2, 31, 0)
485 if (!g_thread_supported()) {
486 g_thread_init(NULL);
488 #endif
490 g_test_init(&argc, &argv, NULL);
492 qtest_add_abrt_handler(abrt_handler, NULL);
493 /* shm */
494 tmpshm = mktempshm(TMPSHMSIZE, &fd);
495 if (!tmpshm) {
496 return 0;
498 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
499 g_assert(tmpshmem != MAP_FAILED);
500 /* server */
501 if (mkdtemp(dir) == NULL) {
502 g_error("mkdtemp: %s", g_strerror(errno));
504 tmpdir = dir;
505 tmpserver = g_strconcat(tmpdir, "/server", NULL);
507 qtest_add_func("/ivshmem/single", test_ivshmem_single);
508 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
509 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
510 if (g_test_slow()) {
511 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
512 qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
513 qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
516 ret = g_test_run();
518 cleanup();
520 return ret;