x86/cpuid: add missing CPUID feature flag names
[qemu.git] / target-i386 / cpuid.c
blobea713306a6b83a92fdf1c47dbf025a6b2555755e
1 /*
2 * i386 CPUID helper functions
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <string.h>
22 #include <inttypes.h>
24 #include "cpu.h"
25 #include "kvm.h"
27 #include "qemu-option.h"
28 #include "qemu-config.h"
30 /* feature flags taken from "Intel Processor Identification and the CPUID
31 * Instruction" and AMD's "CPUID Specification". In cases of disagreement
32 * between feature naming conventions, aliases may be added.
34 static const char *feature_name[] = {
35 "fpu", "vme", "de", "pse",
36 "tsc", "msr", "pae", "mce",
37 "cx8", "apic", NULL, "sep",
38 "mtrr", "pge", "mca", "cmov",
39 "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
40 NULL, "ds" /* Intel dts */, "acpi", "mmx",
41 "fxsr", "sse", "sse2", "ss",
42 "ht" /* Intel htt */, "tm", "ia64", "pbe",
44 static const char *ext_feature_name[] = {
45 "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
46 "ds_cpl", "vmx", "smx", "est",
47 "tm2", "ssse3", "cid", NULL,
48 "fma", "cx16", "xtpr", "pdcm",
49 NULL, NULL, "dca", "sse4.1|sse4_1",
50 "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
51 NULL, "aes", "xsave", "osxsave",
52 "avx", NULL, NULL, "hypervisor",
54 static const char *ext2_feature_name[] = {
55 "fpu", "vme", "de", "pse",
56 "tsc", "msr", "pae", "mce",
57 "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
58 "mtrr", "pge", "mca", "cmov",
59 "pat", "pse36", NULL, NULL /* Linux mp */,
60 "nx" /* Intel xd */, NULL, "mmxext", "mmx",
61 "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
62 NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
64 static const char *ext3_feature_name[] = {
65 "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
66 "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
67 "3dnowprefetch", "osvw", "ibs", "xop",
68 "skinit", "wdt", NULL, NULL,
69 "fma4", NULL, "cvt16", "nodeid_msr",
70 NULL, NULL, NULL, NULL,
71 NULL, NULL, NULL, NULL,
72 NULL, NULL, NULL, NULL,
75 static const char *kvm_feature_name[] = {
76 "kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL,
77 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
78 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
79 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
82 /* collects per-function cpuid data
84 typedef struct model_features_t {
85 uint32_t *guest_feat;
86 uint32_t *host_feat;
87 uint32_t check_feat;
88 const char **flag_names;
89 uint32_t cpuid;
90 } model_features_t;
92 int check_cpuid = 0;
93 int enforce_cpuid = 0;
95 static void host_cpuid(uint32_t function, uint32_t count,
96 uint32_t *eax, uint32_t *ebx,
97 uint32_t *ecx, uint32_t *edx)
99 #if defined(CONFIG_KVM)
100 uint32_t vec[4];
102 #ifdef __x86_64__
103 asm volatile("cpuid"
104 : "=a"(vec[0]), "=b"(vec[1]),
105 "=c"(vec[2]), "=d"(vec[3])
106 : "0"(function), "c"(count) : "cc");
107 #else
108 asm volatile("pusha \n\t"
109 "cpuid \n\t"
110 "mov %%eax, 0(%2) \n\t"
111 "mov %%ebx, 4(%2) \n\t"
112 "mov %%ecx, 8(%2) \n\t"
113 "mov %%edx, 12(%2) \n\t"
114 "popa"
115 : : "a"(function), "c"(count), "S"(vec)
116 : "memory", "cc");
117 #endif
119 if (eax)
120 *eax = vec[0];
121 if (ebx)
122 *ebx = vec[1];
123 if (ecx)
124 *ecx = vec[2];
125 if (edx)
126 *edx = vec[3];
127 #endif
130 #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
132 /* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
133 * a substring. ex if !NULL points to the first char after a substring,
134 * otherwise the string is assumed to sized by a terminating nul.
135 * Return lexical ordering of *s1:*s2.
137 static int sstrcmp(const char *s1, const char *e1, const char *s2,
138 const char *e2)
140 for (;;) {
141 if (!*s1 || !*s2 || *s1 != *s2)
142 return (*s1 - *s2);
143 ++s1, ++s2;
144 if (s1 == e1 && s2 == e2)
145 return (0);
146 else if (s1 == e1)
147 return (*s2);
148 else if (s2 == e2)
149 return (*s1);
153 /* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
154 * '|' delimited (possibly empty) strings in which case search for a match
155 * within the alternatives proceeds left to right. Return 0 for success,
156 * non-zero otherwise.
158 static int altcmp(const char *s, const char *e, const char *altstr)
160 const char *p, *q;
162 for (q = p = altstr; ; ) {
163 while (*p && *p != '|')
164 ++p;
165 if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
166 return (0);
167 if (!*p)
168 return (1);
169 else
170 q = ++p;
174 /* search featureset for flag *[s..e), if found set corresponding bit in
175 * *pval and return success, otherwise return zero
177 static int lookup_feature(uint32_t *pval, const char *s, const char *e,
178 const char **featureset)
180 uint32_t mask;
181 const char **ppc;
183 for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc)
184 if (*ppc && !altcmp(s, e, *ppc)) {
185 *pval |= mask;
186 break;
188 return (mask ? 1 : 0);
191 static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
192 uint32_t *ext_features,
193 uint32_t *ext2_features,
194 uint32_t *ext3_features,
195 uint32_t *kvm_features)
197 if (!lookup_feature(features, flagname, NULL, feature_name) &&
198 !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
199 !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
200 !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
201 !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name))
202 fprintf(stderr, "CPU feature %s not found\n", flagname);
205 typedef struct x86_def_t {
206 struct x86_def_t *next;
207 const char *name;
208 uint32_t level;
209 uint32_t vendor1, vendor2, vendor3;
210 int family;
211 int model;
212 int stepping;
213 uint32_t features, ext_features, ext2_features, ext3_features, kvm_features;
214 uint32_t xlevel;
215 char model_id[48];
216 int vendor_override;
217 uint32_t flags;
218 } x86_def_t;
220 #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
221 #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
222 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
223 #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
224 CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
225 CPUID_PSE36 | CPUID_FXSR)
226 #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
227 #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
228 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
229 CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
230 CPUID_PAE | CPUID_SEP | CPUID_APIC)
231 #define EXT2_FEATURE_MASK 0x0183F3FF
233 /* maintains list of cpu model definitions
235 static x86_def_t *x86_defs = {NULL};
237 /* built-in cpu model definitions (deprecated)
239 static x86_def_t builtin_x86_defs[] = {
240 #ifdef TARGET_X86_64
242 .name = "qemu64",
243 .level = 4,
244 .vendor1 = CPUID_VENDOR_AMD_1,
245 .vendor2 = CPUID_VENDOR_AMD_2,
246 .vendor3 = CPUID_VENDOR_AMD_3,
247 .family = 6,
248 .model = 2,
249 .stepping = 3,
250 .features = PPRO_FEATURES |
251 /* these features are needed for Win64 and aren't fully implemented */
252 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
253 /* this feature is needed for Solaris and isn't fully implemented */
254 CPUID_PSE36,
255 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
256 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
257 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
258 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
259 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
260 .xlevel = 0x8000000A,
261 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
264 .name = "phenom",
265 .level = 5,
266 .vendor1 = CPUID_VENDOR_AMD_1,
267 .vendor2 = CPUID_VENDOR_AMD_2,
268 .vendor3 = CPUID_VENDOR_AMD_3,
269 .family = 16,
270 .model = 2,
271 .stepping = 3,
272 /* Missing: CPUID_VME, CPUID_HT */
273 .features = PPRO_FEATURES |
274 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
275 CPUID_PSE36,
276 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
277 CPUID_EXT_POPCNT,
278 /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
279 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
280 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
281 CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
282 CPUID_EXT2_FFXSR,
283 /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
284 CPUID_EXT3_CR8LEG,
285 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
286 CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
287 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
288 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
289 .xlevel = 0x8000001A,
290 .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
293 .name = "core2duo",
294 .level = 10,
295 .family = 6,
296 .model = 15,
297 .stepping = 11,
298 /* The original CPU also implements these features:
299 CPUID_VME, CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
300 CPUID_TM, CPUID_PBE */
301 .features = PPRO_FEATURES |
302 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
303 CPUID_PSE36,
304 /* The original CPU also implements these ext features:
305 CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
306 CPUID_EXT_TM2, CPUID_EXT_CX16, CPUID_EXT_XTPR, CPUID_EXT_PDCM */
307 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
308 .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
309 .ext3_features = CPUID_EXT3_LAHF_LM,
310 .xlevel = 0x80000008,
311 .model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
314 .name = "kvm64",
315 .level = 5,
316 .vendor1 = CPUID_VENDOR_INTEL_1,
317 .vendor2 = CPUID_VENDOR_INTEL_2,
318 .vendor3 = CPUID_VENDOR_INTEL_3,
319 .family = 15,
320 .model = 6,
321 .stepping = 1,
322 /* Missing: CPUID_VME, CPUID_HT */
323 .features = PPRO_FEATURES |
324 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
325 CPUID_PSE36,
326 /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
327 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
328 /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
329 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
330 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
331 /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
332 CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
333 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
334 CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
335 .ext3_features = 0,
336 .xlevel = 0x80000008,
337 .model_id = "Common KVM processor"
339 #endif
341 .name = "qemu32",
342 .level = 4,
343 .family = 6,
344 .model = 3,
345 .stepping = 3,
346 .features = PPRO_FEATURES,
347 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
348 .xlevel = 0,
349 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
352 .name = "coreduo",
353 .level = 10,
354 .family = 6,
355 .model = 14,
356 .stepping = 8,
357 /* The original CPU also implements these features:
358 CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
359 CPUID_TM, CPUID_PBE */
360 .features = PPRO_FEATURES | CPUID_VME |
361 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
362 /* The original CPU also implements these ext features:
363 CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
364 CPUID_EXT_PDCM */
365 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
366 .ext2_features = CPUID_EXT2_NX,
367 .xlevel = 0x80000008,
368 .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
371 .name = "486",
372 .level = 0,
373 .family = 4,
374 .model = 0,
375 .stepping = 0,
376 .features = I486_FEATURES,
377 .xlevel = 0,
380 .name = "pentium",
381 .level = 1,
382 .family = 5,
383 .model = 4,
384 .stepping = 3,
385 .features = PENTIUM_FEATURES,
386 .xlevel = 0,
389 .name = "pentium2",
390 .level = 2,
391 .family = 6,
392 .model = 5,
393 .stepping = 2,
394 .features = PENTIUM2_FEATURES,
395 .xlevel = 0,
398 .name = "pentium3",
399 .level = 2,
400 .family = 6,
401 .model = 7,
402 .stepping = 3,
403 .features = PENTIUM3_FEATURES,
404 .xlevel = 0,
407 .name = "athlon",
408 .level = 2,
409 .vendor1 = CPUID_VENDOR_AMD_1,
410 .vendor2 = CPUID_VENDOR_AMD_2,
411 .vendor3 = CPUID_VENDOR_AMD_3,
412 .family = 6,
413 .model = 2,
414 .stepping = 3,
415 .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
416 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
417 .xlevel = 0x80000008,
418 /* XXX: put another string ? */
419 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
422 .name = "n270",
423 /* original is on level 10 */
424 .level = 5,
425 .family = 6,
426 .model = 28,
427 .stepping = 2,
428 .features = PPRO_FEATURES |
429 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME,
430 /* Missing: CPUID_DTS | CPUID_ACPI | CPUID_SS |
431 * CPUID_HT | CPUID_TM | CPUID_PBE */
432 /* Some CPUs got no CPUID_SEP */
433 .ext_features = CPUID_EXT_MONITOR |
434 CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
435 /* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
436 * CPUID_EXT_TM2 | CPUID_EXT_XTPR */
437 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
438 /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
439 .xlevel = 0x8000000A,
440 .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
444 static int cpu_x86_fill_model_id(char *str)
446 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
447 int i;
449 for (i = 0; i < 3; i++) {
450 host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
451 memcpy(str + i * 16 + 0, &eax, 4);
452 memcpy(str + i * 16 + 4, &ebx, 4);
453 memcpy(str + i * 16 + 8, &ecx, 4);
454 memcpy(str + i * 16 + 12, &edx, 4);
456 return 0;
459 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
461 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
463 x86_cpu_def->name = "host";
464 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
465 x86_cpu_def->level = eax;
466 x86_cpu_def->vendor1 = ebx;
467 x86_cpu_def->vendor2 = edx;
468 x86_cpu_def->vendor3 = ecx;
470 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
471 x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
472 x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
473 x86_cpu_def->stepping = eax & 0x0F;
474 x86_cpu_def->ext_features = ecx;
475 x86_cpu_def->features = edx;
477 host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
478 x86_cpu_def->xlevel = eax;
480 host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
481 x86_cpu_def->ext2_features = edx;
482 x86_cpu_def->ext3_features = ecx;
483 cpu_x86_fill_model_id(x86_cpu_def->model_id);
484 x86_cpu_def->vendor_override = 0;
486 return 0;
489 static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
491 int i;
493 for (i = 0; i < 32; ++i)
494 if (1 << i & mask) {
495 fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
496 " flag '%s' [0x%08x]\n",
497 f->cpuid >> 16, f->cpuid & 0xffff,
498 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
499 break;
501 return 0;
504 /* best effort attempt to inform user requested cpu flags aren't making
505 * their way to the guest. Note: ft[].check_feat ideally should be
506 * specified via a guest_def field to suppress report of extraneous flags.
508 static int check_features_against_host(x86_def_t *guest_def)
510 x86_def_t host_def;
511 uint32_t mask;
512 int rv, i;
513 struct model_features_t ft[] = {
514 {&guest_def->features, &host_def.features,
515 ~0, feature_name, 0x00000000},
516 {&guest_def->ext_features, &host_def.ext_features,
517 ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
518 {&guest_def->ext2_features, &host_def.ext2_features,
519 ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
520 {&guest_def->ext3_features, &host_def.ext3_features,
521 ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
523 cpu_x86_fill_host(&host_def);
524 for (rv = 0, i = 0; i < sizeof (ft) / sizeof (ft[0]); ++i)
525 for (mask = 1; mask; mask <<= 1)
526 if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
527 !(*ft[i].host_feat & mask)) {
528 unavailable_host_feature(&ft[i], mask);
529 rv = 1;
531 return rv;
534 static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
536 unsigned int i;
537 x86_def_t *def;
539 char *s = strdup(cpu_model);
540 char *featurestr, *name = strtok(s, ",");
541 uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0, plus_kvm_features = 0;
542 uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0, minus_kvm_features = 0;
543 uint32_t numvalue;
545 for (def = x86_defs; def; def = def->next)
546 if (!strcmp(name, def->name))
547 break;
548 if (kvm_enabled() && strcmp(name, "host") == 0) {
549 cpu_x86_fill_host(x86_cpu_def);
550 } else if (!def) {
551 goto error;
552 } else {
553 memcpy(x86_cpu_def, def, sizeof(*def));
556 plus_kvm_features = ~0; /* not supported bits will be filtered out later */
558 add_flagname_to_bitmaps("hypervisor", &plus_features,
559 &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
560 &plus_kvm_features);
562 featurestr = strtok(NULL, ",");
564 while (featurestr) {
565 char *val;
566 if (featurestr[0] == '+') {
567 add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features, &plus_kvm_features);
568 } else if (featurestr[0] == '-') {
569 add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features, &minus_kvm_features);
570 } else if ((val = strchr(featurestr, '='))) {
571 *val = 0; val++;
572 if (!strcmp(featurestr, "family")) {
573 char *err;
574 numvalue = strtoul(val, &err, 0);
575 if (!*val || *err) {
576 fprintf(stderr, "bad numerical value %s\n", val);
577 goto error;
579 x86_cpu_def->family = numvalue;
580 } else if (!strcmp(featurestr, "model")) {
581 char *err;
582 numvalue = strtoul(val, &err, 0);
583 if (!*val || *err || numvalue > 0xff) {
584 fprintf(stderr, "bad numerical value %s\n", val);
585 goto error;
587 x86_cpu_def->model = numvalue;
588 } else if (!strcmp(featurestr, "stepping")) {
589 char *err;
590 numvalue = strtoul(val, &err, 0);
591 if (!*val || *err || numvalue > 0xf) {
592 fprintf(stderr, "bad numerical value %s\n", val);
593 goto error;
595 x86_cpu_def->stepping = numvalue ;
596 } else if (!strcmp(featurestr, "level")) {
597 char *err;
598 numvalue = strtoul(val, &err, 0);
599 if (!*val || *err) {
600 fprintf(stderr, "bad numerical value %s\n", val);
601 goto error;
603 x86_cpu_def->level = numvalue;
604 } else if (!strcmp(featurestr, "xlevel")) {
605 char *err;
606 numvalue = strtoul(val, &err, 0);
607 if (!*val || *err) {
608 fprintf(stderr, "bad numerical value %s\n", val);
609 goto error;
611 if (numvalue < 0x80000000) {
612 numvalue += 0x80000000;
614 x86_cpu_def->xlevel = numvalue;
615 } else if (!strcmp(featurestr, "vendor")) {
616 if (strlen(val) != 12) {
617 fprintf(stderr, "vendor string must be 12 chars long\n");
618 goto error;
620 x86_cpu_def->vendor1 = 0;
621 x86_cpu_def->vendor2 = 0;
622 x86_cpu_def->vendor3 = 0;
623 for(i = 0; i < 4; i++) {
624 x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
625 x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
626 x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
628 x86_cpu_def->vendor_override = 1;
629 } else if (!strcmp(featurestr, "model_id")) {
630 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
631 val);
632 } else {
633 fprintf(stderr, "unrecognized feature %s\n", featurestr);
634 goto error;
636 } else if (!strcmp(featurestr, "check")) {
637 check_cpuid = 1;
638 } else if (!strcmp(featurestr, "enforce")) {
639 check_cpuid = enforce_cpuid = 1;
640 } else {
641 fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
642 goto error;
644 featurestr = strtok(NULL, ",");
646 x86_cpu_def->features |= plus_features;
647 x86_cpu_def->ext_features |= plus_ext_features;
648 x86_cpu_def->ext2_features |= plus_ext2_features;
649 x86_cpu_def->ext3_features |= plus_ext3_features;
650 x86_cpu_def->kvm_features |= plus_kvm_features;
651 x86_cpu_def->features &= ~minus_features;
652 x86_cpu_def->ext_features &= ~minus_ext_features;
653 x86_cpu_def->ext2_features &= ~minus_ext2_features;
654 x86_cpu_def->ext3_features &= ~minus_ext3_features;
655 x86_cpu_def->kvm_features &= ~minus_kvm_features;
656 if (check_cpuid) {
657 if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
658 goto error;
660 free(s);
661 return 0;
663 error:
664 free(s);
665 return -1;
668 /* generate a composite string into buf of all cpuid names in featureset
669 * selected by fbits. indicate truncation at bufsize in the event of overflow.
670 * if flags, suppress names undefined in featureset.
672 static void listflags(char *buf, int bufsize, uint32_t fbits,
673 const char **featureset, uint32_t flags)
675 const char **p = &featureset[31];
676 char *q, *b, bit;
677 int nc;
679 b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
680 *buf = '\0';
681 for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
682 if (fbits & 1 << bit && (*p || !flags)) {
683 if (*p)
684 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
685 else
686 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
687 if (bufsize <= nc) {
688 if (b) {
689 memcpy(b, "...", sizeof("..."));
691 return;
693 q += nc;
694 bufsize -= nc;
698 /* generate CPU information:
699 * -? list model names
700 * -?model list model names/IDs
701 * -?dump output all model (x86_def_t) data
702 * -?cpuid list all recognized cpuid flag names
704 void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
705 const char *optarg)
707 unsigned char model = !strcmp("?model", optarg);
708 unsigned char dump = !strcmp("?dump", optarg);
709 unsigned char cpuid = !strcmp("?cpuid", optarg);
710 x86_def_t *def;
711 char buf[256];
713 if (cpuid) {
714 (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
715 listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
716 (*cpu_fprintf)(f, " f_edx: %s\n", buf);
717 listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
718 (*cpu_fprintf)(f, " f_ecx: %s\n", buf);
719 listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
720 (*cpu_fprintf)(f, " extf_edx: %s\n", buf);
721 listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
722 (*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
723 return;
725 for (def = x86_defs; def; def = def->next) {
726 snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
727 if (model || dump) {
728 (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
729 } else {
730 (*cpu_fprintf)(f, "x86 %16s\n", buf);
732 if (dump) {
733 memcpy(buf, &def->vendor1, sizeof (def->vendor1));
734 memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
735 memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
736 buf[12] = '\0';
737 (*cpu_fprintf)(f,
738 " family %d model %d stepping %d level %d xlevel 0x%x"
739 " vendor \"%s\"\n",
740 def->family, def->model, def->stepping, def->level,
741 def->xlevel, buf);
742 listflags(buf, sizeof (buf), def->features, feature_name, 0);
743 (*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
744 buf);
745 listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
747 (*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
748 buf);
749 listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
751 (*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
752 def->ext2_features, buf);
753 listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
755 (*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
756 def->ext3_features, buf);
757 (*cpu_fprintf)(f, "\n");
762 int cpu_x86_register (CPUX86State *env, const char *cpu_model)
764 x86_def_t def1, *def = &def1;
766 if (cpu_x86_find_by_name(def, cpu_model) < 0)
767 return -1;
768 if (def->vendor1) {
769 env->cpuid_vendor1 = def->vendor1;
770 env->cpuid_vendor2 = def->vendor2;
771 env->cpuid_vendor3 = def->vendor3;
772 } else {
773 env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
774 env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
775 env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
777 env->cpuid_vendor_override = def->vendor_override;
778 env->cpuid_level = def->level;
779 if (def->family > 0x0f)
780 env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
781 else
782 env->cpuid_version = def->family << 8;
783 env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
784 env->cpuid_version |= def->stepping;
785 env->cpuid_features = def->features;
786 env->pat = 0x0007040600070406ULL;
787 env->cpuid_ext_features = def->ext_features;
788 env->cpuid_ext2_features = def->ext2_features;
789 env->cpuid_ext3_features = def->ext3_features;
790 env->cpuid_xlevel = def->xlevel;
791 env->cpuid_kvm_features = def->kvm_features;
793 const char *model_id = def->model_id;
794 int c, len, i;
795 if (!model_id)
796 model_id = "";
797 len = strlen(model_id);
798 for(i = 0; i < 48; i++) {
799 if (i >= len)
800 c = '\0';
801 else
802 c = (uint8_t)model_id[i];
803 env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
806 return 0;
809 #if !defined(CONFIG_USER_ONLY)
810 /* copy vendor id string to 32 bit register, nul pad as needed
812 static void cpyid(const char *s, uint32_t *id)
814 char *d = (char *)id;
815 char i;
817 for (i = sizeof (*id); i--; )
818 *d++ = *s ? *s++ : '\0';
821 /* interpret radix and convert from string to arbitrary scalar,
822 * otherwise flag failure
824 #define setscalar(pval, str, perr) \
826 char *pend; \
827 unsigned long ul; \
829 ul = strtoul(str, &pend, 0); \
830 *str && !*pend ? (*pval = ul) : (*perr = 1); \
833 /* map cpuid options to feature bits, otherwise return failure
834 * (option tags in *str are delimited by whitespace)
836 static void setfeatures(uint32_t *pval, const char *str,
837 const char **featureset, int *perr)
839 const char *p, *q;
841 for (q = p = str; *p || *q; q = p) {
842 while (iswhite(*p))
843 q = ++p;
844 while (*p && !iswhite(*p))
845 ++p;
846 if (!*q && !*p)
847 return;
848 if (!lookup_feature(pval, q, p, featureset)) {
849 fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
850 (int)(p - q), q);
851 *perr = 1;
852 return;
857 /* map config file options to x86_def_t form
859 static int cpudef_setfield(const char *name, const char *str, void *opaque)
861 x86_def_t *def = opaque;
862 int err = 0;
864 if (!strcmp(name, "name")) {
865 def->name = strdup(str);
866 } else if (!strcmp(name, "model_id")) {
867 strncpy(def->model_id, str, sizeof (def->model_id));
868 } else if (!strcmp(name, "level")) {
869 setscalar(&def->level, str, &err)
870 } else if (!strcmp(name, "vendor")) {
871 cpyid(&str[0], &def->vendor1);
872 cpyid(&str[4], &def->vendor2);
873 cpyid(&str[8], &def->vendor3);
874 } else if (!strcmp(name, "family")) {
875 setscalar(&def->family, str, &err)
876 } else if (!strcmp(name, "model")) {
877 setscalar(&def->model, str, &err)
878 } else if (!strcmp(name, "stepping")) {
879 setscalar(&def->stepping, str, &err)
880 } else if (!strcmp(name, "feature_edx")) {
881 setfeatures(&def->features, str, feature_name, &err);
882 } else if (!strcmp(name, "feature_ecx")) {
883 setfeatures(&def->ext_features, str, ext_feature_name, &err);
884 } else if (!strcmp(name, "extfeature_edx")) {
885 setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
886 } else if (!strcmp(name, "extfeature_ecx")) {
887 setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
888 } else if (!strcmp(name, "xlevel")) {
889 setscalar(&def->xlevel, str, &err)
890 } else {
891 fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
892 return (1);
894 if (err) {
895 fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
896 return (1);
898 return (0);
901 /* register config file entry as x86_def_t
903 static int cpudef_register(QemuOpts *opts, void *opaque)
905 x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
907 qemu_opt_foreach(opts, cpudef_setfield, def, 1);
908 def->next = x86_defs;
909 x86_defs = def;
910 return (0);
912 #endif /* !CONFIG_USER_ONLY */
914 /* register "cpudef" models defined in configuration file. Here we first
915 * preload any built-in definitions
917 void x86_cpudef_setup(void)
919 int i;
921 for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
922 builtin_x86_defs[i].next = x86_defs;
923 builtin_x86_defs[i].flags = 1;
924 x86_defs = &builtin_x86_defs[i];
926 #if !defined(CONFIG_USER_ONLY)
927 qemu_opts_foreach(&qemu_cpudef_opts, cpudef_register, NULL, 0);
928 #endif
931 static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
932 uint32_t *ecx, uint32_t *edx)
934 *ebx = env->cpuid_vendor1;
935 *edx = env->cpuid_vendor2;
936 *ecx = env->cpuid_vendor3;
938 /* sysenter isn't supported on compatibility mode on AMD, syscall
939 * isn't supported in compatibility mode on Intel.
940 * Normally we advertise the actual cpu vendor, but you can override
941 * this if you want to use KVM's sysenter/syscall emulation
942 * in compatibility mode and when doing cross vendor migration
944 if (kvm_enabled() && env->cpuid_vendor_override) {
945 host_cpuid(0, 0, NULL, ebx, ecx, edx);
949 void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
950 uint32_t *eax, uint32_t *ebx,
951 uint32_t *ecx, uint32_t *edx)
953 /* test if maximum index reached */
954 if (index & 0x80000000) {
955 if (index > env->cpuid_xlevel)
956 index = env->cpuid_level;
957 } else {
958 if (index > env->cpuid_level)
959 index = env->cpuid_level;
962 switch(index) {
963 case 0:
964 *eax = env->cpuid_level;
965 get_cpuid_vendor(env, ebx, ecx, edx);
966 break;
967 case 1:
968 *eax = env->cpuid_version;
969 *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
970 *ecx = env->cpuid_ext_features;
971 *edx = env->cpuid_features;
972 if (env->nr_cores * env->nr_threads > 1) {
973 *ebx |= (env->nr_cores * env->nr_threads) << 16;
974 *edx |= 1 << 28; /* HTT bit */
976 break;
977 case 2:
978 /* cache info: needed for Pentium Pro compatibility */
979 *eax = 1;
980 *ebx = 0;
981 *ecx = 0;
982 *edx = 0x2c307d;
983 break;
984 case 4:
985 /* cache info: needed for Core compatibility */
986 if (env->nr_cores > 1) {
987 *eax = (env->nr_cores - 1) << 26;
988 } else {
989 *eax = 0;
991 switch (count) {
992 case 0: /* L1 dcache info */
993 *eax |= 0x0000121;
994 *ebx = 0x1c0003f;
995 *ecx = 0x000003f;
996 *edx = 0x0000001;
997 break;
998 case 1: /* L1 icache info */
999 *eax |= 0x0000122;
1000 *ebx = 0x1c0003f;
1001 *ecx = 0x000003f;
1002 *edx = 0x0000001;
1003 break;
1004 case 2: /* L2 cache info */
1005 *eax |= 0x0000143;
1006 if (env->nr_threads > 1) {
1007 *eax |= (env->nr_threads - 1) << 14;
1009 *ebx = 0x3c0003f;
1010 *ecx = 0x0000fff;
1011 *edx = 0x0000001;
1012 break;
1013 default: /* end of info */
1014 *eax = 0;
1015 *ebx = 0;
1016 *ecx = 0;
1017 *edx = 0;
1018 break;
1020 break;
1021 case 5:
1022 /* mwait info: needed for Core compatibility */
1023 *eax = 0; /* Smallest monitor-line size in bytes */
1024 *ebx = 0; /* Largest monitor-line size in bytes */
1025 *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1026 *edx = 0;
1027 break;
1028 case 6:
1029 /* Thermal and Power Leaf */
1030 *eax = 0;
1031 *ebx = 0;
1032 *ecx = 0;
1033 *edx = 0;
1034 break;
1035 case 9:
1036 /* Direct Cache Access Information Leaf */
1037 *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1038 *ebx = 0;
1039 *ecx = 0;
1040 *edx = 0;
1041 break;
1042 case 0xA:
1043 /* Architectural Performance Monitoring Leaf */
1044 *eax = 0;
1045 *ebx = 0;
1046 *ecx = 0;
1047 *edx = 0;
1048 break;
1049 case 0x80000000:
1050 *eax = env->cpuid_xlevel;
1051 *ebx = env->cpuid_vendor1;
1052 *edx = env->cpuid_vendor2;
1053 *ecx = env->cpuid_vendor3;
1054 break;
1055 case 0x80000001:
1056 *eax = env->cpuid_version;
1057 *ebx = 0;
1058 *ecx = env->cpuid_ext3_features;
1059 *edx = env->cpuid_ext2_features;
1061 /* The Linux kernel checks for the CMPLegacy bit and
1062 * discards multiple thread information if it is set.
1063 * So dont set it here for Intel to make Linux guests happy.
1065 if (env->nr_cores * env->nr_threads > 1) {
1066 uint32_t tebx, tecx, tedx;
1067 get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1068 if (tebx != CPUID_VENDOR_INTEL_1 ||
1069 tedx != CPUID_VENDOR_INTEL_2 ||
1070 tecx != CPUID_VENDOR_INTEL_3) {
1071 *ecx |= 1 << 1; /* CmpLegacy bit */
1075 if (kvm_enabled()) {
1076 /* Nested SVM not yet supported in upstream QEMU */
1077 *ecx &= ~CPUID_EXT3_SVM;
1079 break;
1080 case 0x80000002:
1081 case 0x80000003:
1082 case 0x80000004:
1083 *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1084 *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1085 *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1086 *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1087 break;
1088 case 0x80000005:
1089 /* cache info (L1 cache) */
1090 *eax = 0x01ff01ff;
1091 *ebx = 0x01ff01ff;
1092 *ecx = 0x40020140;
1093 *edx = 0x40020140;
1094 break;
1095 case 0x80000006:
1096 /* cache info (L2 cache) */
1097 *eax = 0;
1098 *ebx = 0x42004200;
1099 *ecx = 0x02008140;
1100 *edx = 0;
1101 break;
1102 case 0x80000008:
1103 /* virtual & phys address size in low 2 bytes. */
1104 /* XXX: This value must match the one used in the MMU code. */
1105 if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1106 /* 64 bit processor */
1107 /* XXX: The physical address space is limited to 42 bits in exec.c. */
1108 *eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
1109 } else {
1110 if (env->cpuid_features & CPUID_PSE36)
1111 *eax = 0x00000024; /* 36 bits physical */
1112 else
1113 *eax = 0x00000020; /* 32 bits physical */
1115 *ebx = 0;
1116 *ecx = 0;
1117 *edx = 0;
1118 if (env->nr_cores * env->nr_threads > 1) {
1119 *ecx |= (env->nr_cores * env->nr_threads) - 1;
1121 break;
1122 case 0x8000000A:
1123 *eax = 0x00000001; /* SVM Revision */
1124 *ebx = 0x00000010; /* nr of ASIDs */
1125 *ecx = 0;
1126 *edx = 0; /* optional features */
1127 break;
1128 default:
1129 /* reserved values: zero */
1130 *eax = 0;
1131 *ebx = 0;
1132 *ecx = 0;
1133 *edx = 0;
1134 break;