2 * QEMU PC keyboard emulation
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu/osdep.h"
26 #include "hw/isa/isa.h"
27 #include "hw/i386/pc.h"
28 #include "hw/input/ps2.h"
29 #include "sysemu/sysemu.h"
31 /* debug PC keyboard */
34 #define DPRINTF(fmt, ...) \
35 do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0)
37 #define DPRINTF(fmt, ...)
40 /* Keyboard Controller Commands */
41 #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
42 #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
43 #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
44 #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
45 #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
46 #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
47 #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
48 #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
49 #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
50 #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
51 #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */
52 #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */
53 #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */
54 #define KBD_CCMD_WRITE_OBUF 0xD2
55 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
56 initiated by the auxiliary device */
57 #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
58 #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */
59 #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */
60 #define KBD_CCMD_PULSE_BITS_3_0 0xF0 /* Pulse bits 3-0 of the output port P2. */
61 #define KBD_CCMD_RESET 0xFE /* Pulse bit 0 of the output port P2 = CPU reset. */
62 #define KBD_CCMD_NO_OP 0xFF /* Pulse no bits of the output port P2. */
64 /* Keyboard Commands */
65 #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
66 #define KBD_CMD_ECHO 0xEE
67 #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */
68 #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
69 #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
70 #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */
71 #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */
72 #define KBD_CMD_RESET 0xFF /* Reset */
74 /* Keyboard Replies */
75 #define KBD_REPLY_POR 0xAA /* Power on reset */
76 #define KBD_REPLY_ACK 0xFA /* Command ACK */
77 #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
79 /* Status Register Bits */
80 #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
81 #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
82 #define KBD_STAT_SELFTEST 0x04 /* Self test successful */
83 #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
84 #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
85 #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
86 #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
87 #define KBD_STAT_PERR 0x80 /* Parity error */
89 /* Controller Mode Register Bits */
90 #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
91 #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
92 #define KBD_MODE_SYS 0x04 /* The system flag (?) */
93 #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
94 #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
95 #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
96 #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
97 #define KBD_MODE_RFU 0x80
99 /* Output Port Bits */
100 #define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */
101 #define KBD_OUT_A20 0x02 /* x86 only */
102 #define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */
103 #define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */
105 /* OSes typically write 0xdd/0xdf to turn the A20 line off and on.
106 * We make the default value of the outport include these four bits,
107 * so that the subsection is rarely necessary.
109 #define KBD_OUT_ONES 0xcc
112 #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
113 #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
114 #define AUX_SET_RES 0xE8 /* Set resolution */
115 #define AUX_GET_SCALE 0xE9 /* Get scaling factor */
116 #define AUX_SET_STREAM 0xEA /* Set stream mode */
117 #define AUX_POLL 0xEB /* Poll */
118 #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */
119 #define AUX_SET_WRAP 0xEE /* Set wrap mode */
120 #define AUX_SET_REMOTE 0xF0 /* Set remote mode */
121 #define AUX_GET_TYPE 0xF2 /* Get type */
122 #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
123 #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
124 #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
125 #define AUX_SET_DEFAULT 0xF6
126 #define AUX_RESET 0xFF /* Reset aux device */
127 #define AUX_ACK 0xFA /* Command byte ACK. */
129 #define MOUSE_STATUS_REMOTE 0x40
130 #define MOUSE_STATUS_ENABLED 0x20
131 #define MOUSE_STATUS_SCALE21 0x10
133 #define KBD_PENDING_KBD 1
134 #define KBD_PENDING_AUX 2
136 typedef struct KBDState
{
137 uint8_t write_cmd
; /* if non zero, write data to port 60 is expected */
141 bool outport_present
;
142 /* Bitmask of devices with data available. */
153 /* update irq and KBD_STAT_[MOUSE_]OBF */
154 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
155 incorrect, but it avoids having to simulate exact delays */
156 static void kbd_update_irq(KBDState
*s
)
158 int irq_kbd_level
, irq_mouse_level
;
162 s
->status
&= ~(KBD_STAT_OBF
| KBD_STAT_MOUSE_OBF
);
163 s
->outport
&= ~(KBD_OUT_OBF
| KBD_OUT_MOUSE_OBF
);
165 s
->status
|= KBD_STAT_OBF
;
166 s
->outport
|= KBD_OUT_OBF
;
167 /* kbd data takes priority over aux data. */
168 if (s
->pending
== KBD_PENDING_AUX
) {
169 s
->status
|= KBD_STAT_MOUSE_OBF
;
170 s
->outport
|= KBD_OUT_MOUSE_OBF
;
171 if (s
->mode
& KBD_MODE_MOUSE_INT
)
174 if ((s
->mode
& KBD_MODE_KBD_INT
) &&
175 !(s
->mode
& KBD_MODE_DISABLE_KBD
))
179 qemu_set_irq(s
->irq_kbd
, irq_kbd_level
);
180 qemu_set_irq(s
->irq_mouse
, irq_mouse_level
);
183 static void kbd_update_kbd_irq(void *opaque
, int level
)
185 KBDState
*s
= (KBDState
*)opaque
;
188 s
->pending
|= KBD_PENDING_KBD
;
190 s
->pending
&= ~KBD_PENDING_KBD
;
194 static void kbd_update_aux_irq(void *opaque
, int level
)
196 KBDState
*s
= (KBDState
*)opaque
;
199 s
->pending
|= KBD_PENDING_AUX
;
201 s
->pending
&= ~KBD_PENDING_AUX
;
205 static uint64_t kbd_read_status(void *opaque
, hwaddr addr
,
208 KBDState
*s
= opaque
;
211 DPRINTF("kbd: read status=0x%02x\n", val
);
215 static void kbd_queue(KBDState
*s
, int b
, int aux
)
218 ps2_queue(s
->mouse
, b
);
220 ps2_queue(s
->kbd
, b
);
223 static void outport_write(KBDState
*s
, uint32_t val
)
225 DPRINTF("kbd: write outport=0x%02x\n", val
);
228 qemu_set_irq(*s
->a20_out
, (val
>> 1) & 1);
231 qemu_system_reset_request();
235 static void kbd_write_command(void *opaque
, hwaddr addr
,
236 uint64_t val
, unsigned size
)
238 KBDState
*s
= opaque
;
240 DPRINTF("kbd: write cmd=0x%02" PRIx64
"\n", val
);
242 /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
243 * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
244 * command specify the output port bits to be pulsed.
245 * 0: Bit should be pulsed. 1: Bit should not be modified.
246 * The only useful version of this command is pulsing bit 0,
247 * which does a CPU reset.
249 if((val
& KBD_CCMD_PULSE_BITS_3_0
) == KBD_CCMD_PULSE_BITS_3_0
) {
251 val
= KBD_CCMD_RESET
;
253 val
= KBD_CCMD_NO_OP
;
257 case KBD_CCMD_READ_MODE
:
258 kbd_queue(s
, s
->mode
, 0);
260 case KBD_CCMD_WRITE_MODE
:
261 case KBD_CCMD_WRITE_OBUF
:
262 case KBD_CCMD_WRITE_AUX_OBUF
:
263 case KBD_CCMD_WRITE_MOUSE
:
264 case KBD_CCMD_WRITE_OUTPORT
:
267 case KBD_CCMD_MOUSE_DISABLE
:
268 s
->mode
|= KBD_MODE_DISABLE_MOUSE
;
270 case KBD_CCMD_MOUSE_ENABLE
:
271 s
->mode
&= ~KBD_MODE_DISABLE_MOUSE
;
273 case KBD_CCMD_TEST_MOUSE
:
274 kbd_queue(s
, 0x00, 0);
276 case KBD_CCMD_SELF_TEST
:
277 s
->status
|= KBD_STAT_SELFTEST
;
278 kbd_queue(s
, 0x55, 0);
280 case KBD_CCMD_KBD_TEST
:
281 kbd_queue(s
, 0x00, 0);
283 case KBD_CCMD_KBD_DISABLE
:
284 s
->mode
|= KBD_MODE_DISABLE_KBD
;
287 case KBD_CCMD_KBD_ENABLE
:
288 s
->mode
&= ~KBD_MODE_DISABLE_KBD
;
291 case KBD_CCMD_READ_INPORT
:
292 kbd_queue(s
, 0x80, 0);
294 case KBD_CCMD_READ_OUTPORT
:
295 kbd_queue(s
, s
->outport
, 0);
297 case KBD_CCMD_ENABLE_A20
:
299 qemu_irq_raise(*s
->a20_out
);
301 s
->outport
|= KBD_OUT_A20
;
303 case KBD_CCMD_DISABLE_A20
:
305 qemu_irq_lower(*s
->a20_out
);
307 s
->outport
&= ~KBD_OUT_A20
;
310 qemu_system_reset_request();
316 fprintf(stderr
, "qemu: unsupported keyboard cmd=0x%02x\n", (int)val
);
321 static uint64_t kbd_read_data(void *opaque
, hwaddr addr
,
324 KBDState
*s
= opaque
;
327 if (s
->pending
== KBD_PENDING_AUX
)
328 val
= ps2_read_data(s
->mouse
);
330 val
= ps2_read_data(s
->kbd
);
332 DPRINTF("kbd: read data=0x%02x\n", val
);
336 static void kbd_write_data(void *opaque
, hwaddr addr
,
337 uint64_t val
, unsigned size
)
339 KBDState
*s
= opaque
;
341 DPRINTF("kbd: write data=0x%02" PRIx64
"\n", val
);
343 switch(s
->write_cmd
) {
345 ps2_write_keyboard(s
->kbd
, val
);
347 case KBD_CCMD_WRITE_MODE
:
349 ps2_keyboard_set_translation(s
->kbd
, (s
->mode
& KBD_MODE_KCC
) != 0);
353 case KBD_CCMD_WRITE_OBUF
:
354 kbd_queue(s
, val
, 0);
356 case KBD_CCMD_WRITE_AUX_OBUF
:
357 kbd_queue(s
, val
, 1);
359 case KBD_CCMD_WRITE_OUTPORT
:
360 outport_write(s
, val
);
362 case KBD_CCMD_WRITE_MOUSE
:
363 ps2_write_mouse(s
->mouse
, val
);
371 static void kbd_reset(void *opaque
)
373 KBDState
*s
= opaque
;
375 s
->mode
= KBD_MODE_KBD_INT
| KBD_MODE_MOUSE_INT
;
376 s
->status
= KBD_STAT_CMD
| KBD_STAT_UNLOCKED
;
377 s
->outport
= KBD_OUT_RESET
| KBD_OUT_A20
| KBD_OUT_ONES
;
378 s
->outport_present
= false;
381 static uint8_t kbd_outport_default(KBDState
*s
)
383 return KBD_OUT_RESET
| KBD_OUT_A20
| KBD_OUT_ONES
384 | (s
->status
& KBD_STAT_OBF
? KBD_OUT_OBF
: 0)
385 | (s
->status
& KBD_STAT_MOUSE_OBF
? KBD_OUT_MOUSE_OBF
: 0);
388 static int kbd_outport_post_load(void *opaque
, int version_id
)
390 KBDState
*s
= opaque
;
391 s
->outport_present
= true;
395 static bool kbd_outport_needed(void *opaque
)
397 KBDState
*s
= opaque
;
398 return s
->outport
!= kbd_outport_default(s
);
401 static const VMStateDescription vmstate_kbd_outport
= {
402 .name
= "pckbd_outport",
404 .minimum_version_id
= 1,
405 .post_load
= kbd_outport_post_load
,
406 .needed
= kbd_outport_needed
,
407 .fields
= (VMStateField
[]) {
408 VMSTATE_UINT8(outport
, KBDState
),
409 VMSTATE_END_OF_LIST()
413 static int kbd_post_load(void *opaque
, int version_id
)
415 KBDState
*s
= opaque
;
416 if (!s
->outport_present
) {
417 s
->outport
= kbd_outport_default(s
);
419 s
->outport_present
= false;
423 static const VMStateDescription vmstate_kbd
= {
426 .minimum_version_id
= 3,
427 .post_load
= kbd_post_load
,
428 .fields
= (VMStateField
[]) {
429 VMSTATE_UINT8(write_cmd
, KBDState
),
430 VMSTATE_UINT8(status
, KBDState
),
431 VMSTATE_UINT8(mode
, KBDState
),
432 VMSTATE_UINT8(pending
, KBDState
),
433 VMSTATE_END_OF_LIST()
435 .subsections
= (const VMStateDescription
*[]) {
436 &vmstate_kbd_outport
,
441 /* Memory mapped interface */
442 static uint32_t kbd_mm_readb (void *opaque
, hwaddr addr
)
444 KBDState
*s
= opaque
;
447 return kbd_read_status(s
, 0, 1) & 0xff;
449 return kbd_read_data(s
, 0, 1) & 0xff;
452 static void kbd_mm_writeb (void *opaque
, hwaddr addr
, uint32_t value
)
454 KBDState
*s
= opaque
;
457 kbd_write_command(s
, 0, value
& 0xff, 1);
459 kbd_write_data(s
, 0, value
& 0xff, 1);
462 static const MemoryRegionOps i8042_mmio_ops
= {
463 .endianness
= DEVICE_NATIVE_ENDIAN
,
465 .read
= { kbd_mm_readb
, kbd_mm_readb
, kbd_mm_readb
},
466 .write
= { kbd_mm_writeb
, kbd_mm_writeb
, kbd_mm_writeb
},
470 void i8042_mm_init(qemu_irq kbd_irq
, qemu_irq mouse_irq
,
471 MemoryRegion
*region
, ram_addr_t size
,
474 KBDState
*s
= g_malloc0(sizeof(KBDState
));
476 s
->irq_kbd
= kbd_irq
;
477 s
->irq_mouse
= mouse_irq
;
480 vmstate_register(NULL
, 0, &vmstate_kbd
, s
);
482 memory_region_init_io(region
, NULL
, &i8042_mmio_ops
, s
, "i8042", size
);
484 s
->kbd
= ps2_kbd_init(kbd_update_kbd_irq
, s
);
485 s
->mouse
= ps2_mouse_init(kbd_update_aux_irq
, s
);
486 qemu_register_reset(kbd_reset
, s
);
489 #define TYPE_I8042 "i8042"
490 #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
492 typedef struct ISAKBDState
{
493 ISADevice parent_obj
;
499 void i8042_isa_mouse_fake_event(void *opaque
)
501 ISADevice
*dev
= opaque
;
502 ISAKBDState
*isa
= I8042(dev
);
503 KBDState
*s
= &isa
->kbd
;
505 ps2_mouse_fake_event(s
->mouse
);
508 void i8042_setup_a20_line(ISADevice
*dev
, qemu_irq
*a20_out
)
510 ISAKBDState
*isa
= I8042(dev
);
511 KBDState
*s
= &isa
->kbd
;
513 s
->a20_out
= a20_out
;
516 static const VMStateDescription vmstate_kbd_isa
= {
519 .minimum_version_id
= 3,
520 .fields
= (VMStateField
[]) {
521 VMSTATE_STRUCT(kbd
, ISAKBDState
, 0, vmstate_kbd
, KBDState
),
522 VMSTATE_END_OF_LIST()
526 static const MemoryRegionOps i8042_data_ops
= {
527 .read
= kbd_read_data
,
528 .write
= kbd_write_data
,
530 .min_access_size
= 1,
531 .max_access_size
= 1,
533 .endianness
= DEVICE_LITTLE_ENDIAN
,
536 static const MemoryRegionOps i8042_cmd_ops
= {
537 .read
= kbd_read_status
,
538 .write
= kbd_write_command
,
540 .min_access_size
= 1,
541 .max_access_size
= 1,
543 .endianness
= DEVICE_LITTLE_ENDIAN
,
546 static void i8042_initfn(Object
*obj
)
548 ISAKBDState
*isa_s
= I8042(obj
);
549 KBDState
*s
= &isa_s
->kbd
;
551 memory_region_init_io(isa_s
->io
+ 0, obj
, &i8042_data_ops
, s
,
553 memory_region_init_io(isa_s
->io
+ 1, obj
, &i8042_cmd_ops
, s
,
557 static void i8042_realizefn(DeviceState
*dev
, Error
**errp
)
559 ISADevice
*isadev
= ISA_DEVICE(dev
);
560 ISAKBDState
*isa_s
= I8042(dev
);
561 KBDState
*s
= &isa_s
->kbd
;
563 isa_init_irq(isadev
, &s
->irq_kbd
, 1);
564 isa_init_irq(isadev
, &s
->irq_mouse
, 12);
566 isa_register_ioport(isadev
, isa_s
->io
+ 0, 0x60);
567 isa_register_ioport(isadev
, isa_s
->io
+ 1, 0x64);
569 s
->kbd
= ps2_kbd_init(kbd_update_kbd_irq
, s
);
570 s
->mouse
= ps2_mouse_init(kbd_update_aux_irq
, s
);
571 qemu_register_reset(kbd_reset
, s
);
574 static void i8042_class_initfn(ObjectClass
*klass
, void *data
)
576 DeviceClass
*dc
= DEVICE_CLASS(klass
);
578 dc
->realize
= i8042_realizefn
;
579 dc
->vmsd
= &vmstate_kbd_isa
;
582 static const TypeInfo i8042_info
= {
584 .parent
= TYPE_ISA_DEVICE
,
585 .instance_size
= sizeof(ISAKBDState
),
586 .instance_init
= i8042_initfn
,
587 .class_init
= i8042_class_initfn
,
590 static void i8042_register_types(void)
592 type_register_static(&i8042_info
);
595 type_init(i8042_register_types
)