include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "disas/bfd.h"
  27 #include "exec/hwaddr.h"
  28 #include "exec/memattrs.h"
  29 #include "qemu/queue.h"
  30 #include "qemu/thread.h"
  31 #include "qemu/typedefs.h"
  32
  33 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  34                                      void *opaque);
  35
  36 /**
  37  * vaddr:
  38  * Type wide enough to contain any #target_ulong virtual address.
  39  */
  40 typedef uint64_t vaddr;
  41 #define VADDR_PRId PRId64
  42 #define VADDR_PRIu PRIu64
  43 #define VADDR_PRIo PRIo64
  44 #define VADDR_PRIx PRIx64
  45 #define VADDR_PRIX PRIX64
  46 #define VADDR_MAX UINT64_MAX
  47
  48 /**
  49  * SECTION:cpu
  50  * @section_id: QEMU-cpu
  51  * @title: CPU Class
  52  * @short_description: Base class for all CPUs
  53  */
  54
  55 #define TYPE_CPU "cpu"
  56
  57 /* Since this macro is used a lot in hot code paths and in conjunction with
  58  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  59  * an unchecked cast.
  60  */
  61 #define CPU(obj) ((CPUState *)(obj))
  62
  63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  65
  66 typedef struct CPUState CPUState;
  67
  68 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  69                                     bool is_write, bool is_exec, int opaque,
  70                                     unsigned size);
  71
  72 struct TranslationBlock;
  73
  74 /**
  75  * CPUClass:
  76  * @class_by_name: Callback to map -cpu command line model name to an
  77  * instantiatable CPU type.
  78  * @parse_features: Callback to parse command line arguments.
  79  * @reset: Callback to reset the #CPUState to its initial state.
  80  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  81  * @has_work: Callback for checking if there is work to do.
  82  * @do_interrupt: Callback for interrupt handling.
  83  * @do_unassigned_access: Callback for unassigned access handling.
  84  * @do_unaligned_access: Callback for unaligned access handling, if
  85  * the target defines #ALIGNED_ONLY.
  86  * @virtio_is_big_endian: Callback to return %true if a CPU which supports
  87  * runtime configurable endianness is currently big-endian. Non-configurable
  88  * CPUs can use the default implementation of this method. This method should
  89  * not be used by any callers other than the pre-1.0 virtio devices.
  90  * @memory_rw_debug: Callback for GDB memory access.
  91  * @dump_state: Callback for dumping state.
  92  * @dump_statistics: Callback for dumping statistics.
  93  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  94  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  95  * @get_memory_mapping: Callback for obtaining the memory mappings.
  96  * @set_pc: Callback for setting the Program Counter register.
  97  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  98  * #TranslationBlock.
  99  * @handle_mmu_fault: Callback for handling an MMU fault.
 100  * @get_phys_page_debug: Callback for obtaining a physical address.
 101  * @gdb_read_register: Callback for letting GDB read a register.
 102  * @gdb_write_register: Callback for letting GDB write a register.
 103  * @debug_excp_handler: Callback for handling debug exceptions.
 104  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
 105  * 64-bit VM coredump.
 106  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 107  * note to a 32-bit VM coredump.
 108  * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
 109  * 32-bit VM coredump.
 110  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 111  * note to a 32-bit VM coredump.
 112  * @vmsd: State description for migration.
 113  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 114  * @gdb_core_xml_file: File name for core registers GDB XML description.
 115  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
 116  *           before the insn which triggers a watchpoint rather than after it.
 117  * @cpu_exec_enter: Callback for cpu_exec preparation.
 118  * @cpu_exec_exit: Callback for cpu_exec cleanup.
 119  * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
 120  * @disas_set_info: Setup architecture specific components of disassembly info
 121  *
 122  * Represents a CPU family or model.
 123  */
 124 typedef struct CPUClass {
 125     /*< private >*/
 126     DeviceClass parent_class;
 127     /*< public >*/
 128
 129     ObjectClass *(*class_by_name)(const char *cpu_model);
 130     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 131
 132     void (*reset)(CPUState *cpu);
 133     int reset_dump_flags;
 134     bool (*has_work)(CPUState *cpu);
 135     void (*do_interrupt)(CPUState *cpu);
 136     CPUUnassignedAccess do_unassigned_access;
 137     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 138                                 int is_write, int is_user, uintptr_t retaddr);
 139     bool (*virtio_is_big_endian)(CPUState *cpu);
 140     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 141                            uint8_t *buf, int len, bool is_write);
 142     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 143                        int flags);
 144     void (*dump_statistics)(CPUState *cpu, FILE *f,
 145                             fprintf_function cpu_fprintf, int flags);
 146     int64_t (*get_arch_id)(CPUState *cpu);
 147     bool (*get_paging_enabled)(const CPUState *cpu);
 148     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 149                                Error **errp);
 150     void (*set_pc)(CPUState *cpu, vaddr value);
 151     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 152     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 153                             int mmu_index);
 154     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 155     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 156     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 157     void (*debug_excp_handler)(CPUState *cpu);
 158
 159     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 160                             int cpuid, void *opaque);
 161     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 162                                 void *opaque);
 163     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 164                             int cpuid, void *opaque);
 165     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 166                                 void *opaque);
 167
 168     const struct VMStateDescription *vmsd;
 169     int gdb_num_core_regs;
 170     const char *gdb_core_xml_file;
 171     bool gdb_stop_before_watchpoint;
 172
 173     void (*cpu_exec_enter)(CPUState *cpu);
 174     void (*cpu_exec_exit)(CPUState *cpu);
 175     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
 176
 177     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
 178 } CPUClass;
 179
 180 #ifdef HOST_WORDS_BIGENDIAN
 181 typedef struct icount_decr_u16 {
 182     uint16_t high;
 183     uint16_t low;
 184 } icount_decr_u16;
 185 #else
 186 typedef struct icount_decr_u16 {
 187     uint16_t low;
 188     uint16_t high;
 189 } icount_decr_u16;
 190 #endif
 191
 192 typedef struct CPUBreakpoint {
 193     vaddr pc;
 194     int flags; /* BP_* */
 195     QTAILQ_ENTRY(CPUBreakpoint) entry;
 196 } CPUBreakpoint;
 197
 198 typedef struct CPUWatchpoint {
 199     vaddr vaddr;
 200     vaddr len;
 201     vaddr hitaddr;
 202     MemTxAttrs hitattrs;
 203     int flags; /* BP_* */
 204     QTAILQ_ENTRY(CPUWatchpoint) entry;
 205 } CPUWatchpoint;
 206
 207 struct KVMState;
 208 struct kvm_run;
 209
 210 #define TB_JMP_CACHE_BITS 12
 211 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 212
 213 /**
 214  * CPUState:
 215  * @cpu_index: CPU index (informative).
 216  * @nr_cores: Number of cores within this CPU package.
 217  * @nr_threads: Number of threads within this CPU.
 218  * @numa_node: NUMA node this CPU is belonging to.
 219  * @host_tid: Host thread ID.
 220  * @running: #true if CPU is currently running (usermode).
 221  * @created: Indicates whether the CPU thread has been successfully created.
 222  * @interrupt_request: Indicates a pending interrupt request.
 223  * @halted: Nonzero if the CPU is in suspended state.
 224  * @stop: Indicates a pending stop request.
 225  * @stopped: Indicates the CPU has been artificially stopped.
 226  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 227  *           CPU and return to its top level loop.
 228  * @singlestep_enabled: Flags for single-stepping.
 229  * @icount_extra: Instructions until next timer event.
 230  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 231  * This allows a single read-compare-cbranch-write sequence to test
 232  * for both decrementer underflow and exceptions.
 233  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
 234  * requires that IO only be performed on the last instruction of a TB
 235  * so that interrupts take effect immediately.
 236  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 237  * @current_tb: Currently executing TB.
 238  * @gdb_regs: Additional GDB registers.
 239  * @gdb_num_regs: Number of total registers accessible to GDB.
 240  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 241  * @next_cpu: Next CPU sharing TB cache.
 242  * @opaque: User data.
 243  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 244  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 245  * @kvm_fd: vCPU file descriptor for KVM.
 246  *
 247  * State of one CPU core or thread.
 248  */
 249 struct CPUState {
 250     /*< private >*/
 251     DeviceState parent_obj;
 252     /*< public >*/
 253
 254     int nr_cores;
 255     int nr_threads;
 256     int numa_node;
 257
 258     struct QemuThread *thread;
 259 #ifdef _WIN32
 260     HANDLE hThread;
 261 #endif
 262     int thread_id;
 263     uint32_t host_tid;
 264     bool running;
 265     struct QemuCond *halt_cond;
 266     struct qemu_work_item *queued_work_first, *queued_work_last;
 267     bool thread_kicked;
 268     bool created;
 269     bool stop;
 270     bool stopped;
 271     bool exit_request;
 272     uint32_t interrupt_request;
 273     int singlestep_enabled;
 274     int64_t icount_extra;
 275     sigjmp_buf jmp_env;
 276
 277     AddressSpace *as;
 278     struct AddressSpaceDispatch *memory_dispatch;
 279     MemoryListener *tcg_as_listener;
 280
 281     void *env_ptr; /* CPUArchState */
 282     struct TranslationBlock *current_tb;
 283     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 284     struct GDBRegisterState *gdb_regs;
 285     int gdb_num_regs;
 286     int gdb_num_g_regs;
 287     QTAILQ_ENTRY(CPUState) node;
 288
 289     /* ice debug support */
 290     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 291
 292     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 293     CPUWatchpoint *watchpoint_hit;
 294
 295     void *opaque;
 296
 297     /* In order to avoid passing too many arguments to the MMIO helpers,
 298      * we store some rarely used information in the CPU context.
 299      */
 300     uintptr_t mem_io_pc;
 301     vaddr mem_io_vaddr;
 302
 303     int kvm_fd;
 304     bool kvm_vcpu_dirty;
 305     struct KVMState *kvm_state;
 306     struct kvm_run *kvm_run;
 307
 308     /* TODO Move common fields from CPUArchState here. */
 309     int cpu_index; /* used by alpha TCG */
 310     uint32_t halted; /* used by alpha, cris, ppc TCG */
 311     union {
 312         uint32_t u32;
 313         icount_decr_u16 u16;
 314     } icount_decr;
 315     uint32_t can_do_io;
 316     int32_t exception_index; /* used by m68k TCG */
 317
 318     /* Note that this is accessed at the start of every TB via a negative
 319        offset from AREG0.  Leave this field at the end so as to make the
 320        (absolute value) offset as small as possible.  This reduces code
 321        size, especially for hosts without large memory offsets.  */
 322     uint32_t tcg_exit_req;
 323 };
 324
 325 QTAILQ_HEAD(CPUTailQ, CPUState);
 326 extern struct CPUTailQ cpus;
 327 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 328 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 329 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 330     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 331 #define CPU_FOREACH_REVERSE(cpu) \
 332     QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
 333 #define first_cpu QTAILQ_FIRST(&cpus)
 334
 335 extern __thread CPUState *current_cpu;
 336
 337 /**
 338  * cpu_paging_enabled:
 339  * @cpu: The CPU whose state is to be inspected.
 340  *
 341  * Returns: %true if paging is enabled, %false otherwise.
 342  */
 343 bool cpu_paging_enabled(const CPUState *cpu);
 344
 345 /**
 346  * cpu_get_memory_mapping:
 347  * @cpu: The CPU whose memory mappings are to be obtained.
 348  * @list: Where to write the memory mappings to.
 349  * @errp: Pointer for reporting an #Error.
 350  */
 351 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 352                             Error **errp);
 353
 354 /**
 355  * cpu_write_elf64_note:
 356  * @f: pointer to a function that writes memory to a file
 357  * @cpu: The CPU whose memory is to be dumped
 358  * @cpuid: ID number of the CPU
 359  * @opaque: pointer to the CPUState struct
 360  */
 361 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 362                          int cpuid, void *opaque);
 363
 364 /**
 365  * cpu_write_elf64_qemunote:
 366  * @f: pointer to a function that writes memory to a file
 367  * @cpu: The CPU whose memory is to be dumped
 368  * @cpuid: ID number of the CPU
 369  * @opaque: pointer to the CPUState struct
 370  */
 371 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 372                              void *opaque);
 373
 374 /**
 375  * cpu_write_elf32_note:
 376  * @f: pointer to a function that writes memory to a file
 377  * @cpu: The CPU whose memory is to be dumped
 378  * @cpuid: ID number of the CPU
 379  * @opaque: pointer to the CPUState struct
 380  */
 381 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 382                          int cpuid, void *opaque);
 383
 384 /**
 385  * cpu_write_elf32_qemunote:
 386  * @f: pointer to a function that writes memory to a file
 387  * @cpu: The CPU whose memory is to be dumped
 388  * @cpuid: ID number of the CPU
 389  * @opaque: pointer to the CPUState struct
 390  */
 391 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 392                              void *opaque);
 393
 394 /**
 395  * CPUDumpFlags:
 396  * @CPU_DUMP_CODE:
 397  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 398  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 399  */
 400 enum CPUDumpFlags {
 401     CPU_DUMP_CODE = 0x00010000,
 402     CPU_DUMP_FPU  = 0x00020000,
 403     CPU_DUMP_CCOP = 0x00040000,
 404 };
 405
 406 /**
 407  * cpu_dump_state:
 408  * @cpu: The CPU whose state is to be dumped.
 409  * @f: File to dump to.
 410  * @cpu_fprintf: Function to dump with.
 411  * @flags: Flags what to dump.
 412  *
 413  * Dumps CPU state.
 414  */
 415 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 416                     int flags);
 417
 418 /**
 419  * cpu_dump_statistics:
 420  * @cpu: The CPU whose state is to be dumped.
 421  * @f: File to dump to.
 422  * @cpu_fprintf: Function to dump with.
 423  * @flags: Flags what to dump.
 424  *
 425  * Dumps CPU statistics.
 426  */
 427 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 428                          int flags);
 429
 430 #ifndef CONFIG_USER_ONLY
 431 /**
 432  * cpu_get_phys_page_debug:
 433  * @cpu: The CPU to obtain the physical page address for.
 434  * @addr: The virtual address.
 435  *
 436  * Obtains the physical page corresponding to a virtual one.
 437  * Use it only for debugging because no protection checks are done.
 438  *
 439  * Returns: Corresponding physical page address or -1 if no page found.
 440  */
 441 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 442 {
 443     CPUClass *cc = CPU_GET_CLASS(cpu);
 444
 445     return cc->get_phys_page_debug(cpu, addr);
 446 }
 447 #endif
 448
 449 /**
 450  * cpu_reset:
 451  * @cpu: The CPU whose state is to be reset.
 452  */
 453 void cpu_reset(CPUState *cpu);
 454
 455 /**
 456  * cpu_class_by_name:
 457  * @typename: The CPU base type.
 458  * @cpu_model: The model string without any parameters.
 459  *
 460  * Looks up a CPU #ObjectClass matching name @cpu_model.
 461  *
 462  * Returns: A #CPUClass or %NULL if not matching class is found.
 463  */
 464 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 465
 466 /**
 467  * cpu_generic_init:
 468  * @typename: The CPU base type.
 469  * @cpu_model: The model string including optional parameters.
 470  *
 471  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 472  *
 473  * Returns: A #CPUState or %NULL if an error occurred.
 474  */
 475 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 476
 477 /**
 478  * cpu_has_work:
 479  * @cpu: The vCPU to check.
 480  *
 481  * Checks whether the CPU has work to do.
 482  *
 483  * Returns: %true if the CPU has work, %false otherwise.
 484  */
 485 static inline bool cpu_has_work(CPUState *cpu)
 486 {
 487     CPUClass *cc = CPU_GET_CLASS(cpu);
 488
 489     g_assert(cc->has_work);
 490     return cc->has_work(cpu);
 491 }
 492
 493 /**
 494  * qemu_cpu_is_self:
 495  * @cpu: The vCPU to check against.
 496  *
 497  * Checks whether the caller is executing on the vCPU thread.
 498  *
 499  * Returns: %true if called from @cpu's thread, %false otherwise.
 500  */
 501 bool qemu_cpu_is_self(CPUState *cpu);
 502
 503 /**
 504  * qemu_cpu_kick:
 505  * @cpu: The vCPU to kick.
 506  *
 507  * Kicks @cpu's thread.
 508  */
 509 void qemu_cpu_kick(CPUState *cpu);
 510
 511 /**
 512  * cpu_is_stopped:
 513  * @cpu: The CPU to check.
 514  *
 515  * Checks whether the CPU is stopped.
 516  *
 517  * Returns: %true if run state is not running or if artificially stopped;
 518  * %false otherwise.
 519  */
 520 bool cpu_is_stopped(CPUState *cpu);
 521
 522 /**
 523  * run_on_cpu:
 524  * @cpu: The vCPU to run on.
 525  * @func: The function to be executed.
 526  * @data: Data to pass to the function.
 527  *
 528  * Schedules the function @func for execution on the vCPU @cpu.
 529  */
 530 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 531
 532 /**
 533  * async_run_on_cpu:
 534  * @cpu: The vCPU to run on.
 535  * @func: The function to be executed.
 536  * @data: Data to pass to the function.
 537  *
 538  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 539  */
 540 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 541
 542 /**
 543  * qemu_get_cpu:
 544  * @index: The CPUState@cpu_index value of the CPU to obtain.
 545  *
 546  * Gets a CPU matching @index.
 547  *
 548  * Returns: The CPU or %NULL if there is no matching CPU.
 549  */
 550 CPUState *qemu_get_cpu(int index);
 551
 552 /**
 553  * cpu_exists:
 554  * @id: Guest-exposed CPU ID to lookup.
 555  *
 556  * Search for CPU with specified ID.
 557  *
 558  * Returns: %true - CPU is found, %false - CPU isn't found.
 559  */
 560 bool cpu_exists(int64_t id);
 561
 562 #ifndef CONFIG_USER_ONLY
 563
 564 typedef void (*CPUInterruptHandler)(CPUState *, int);
 565
 566 extern CPUInterruptHandler cpu_interrupt_handler;
 567
 568 /**
 569  * cpu_interrupt:
 570  * @cpu: The CPU to set an interrupt on.
 571  * @mask: The interupts to set.
 572  *
 573  * Invokes the interrupt handler.
 574  */
 575 static inline void cpu_interrupt(CPUState *cpu, int mask)
 576 {
 577     cpu_interrupt_handler(cpu, mask);
 578 }
 579
 580 #else /* USER_ONLY */
 581
 582 void cpu_interrupt(CPUState *cpu, int mask);
 583
 584 #endif /* USER_ONLY */
 585
 586 #ifdef CONFIG_SOFTMMU
 587 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 588                                          bool is_write, bool is_exec,
 589                                          int opaque, unsigned size)
 590 {
 591     CPUClass *cc = CPU_GET_CLASS(cpu);
 592
 593     if (cc->do_unassigned_access) {
 594         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 595     }
 596 }
 597
 598 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 599                                         int is_write, int is_user,
 600                                         uintptr_t retaddr)
 601 {
 602     CPUClass *cc = CPU_GET_CLASS(cpu);
 603
 604     cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
 605 }
 606 #endif
 607
 608 /**
 609  * cpu_set_pc:
 610  * @cpu: The CPU to set the program counter for.
 611  * @addr: Program counter value.
 612  *
 613  * Sets the program counter for a CPU.
 614  */
 615 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
 616 {
 617     CPUClass *cc = CPU_GET_CLASS(cpu);
 618
 619     cc->set_pc(cpu, addr);
 620 }
 621
 622 /**
 623  * cpu_reset_interrupt:
 624  * @cpu: The CPU to clear the interrupt on.
 625  * @mask: The interrupt mask to clear.
 626  *
 627  * Resets interrupts on the vCPU @cpu.
 628  */
 629 void cpu_reset_interrupt(CPUState *cpu, int mask);
 630
 631 /**
 632  * cpu_exit:
 633  * @cpu: The CPU to exit.
 634  *
 635  * Requests the CPU @cpu to exit execution.
 636  */
 637 void cpu_exit(CPUState *cpu);
 638
 639 /**
 640  * cpu_resume:
 641  * @cpu: The CPU to resume.
 642  *
 643  * Resumes CPU, i.e. puts CPU into runnable state.
 644  */
 645 void cpu_resume(CPUState *cpu);
 646
 647 /**
 648  * qemu_init_vcpu:
 649  * @cpu: The vCPU to initialize.
 650  *
 651  * Initializes a vCPU.
 652  */
 653 void qemu_init_vcpu(CPUState *cpu);
 654
 655 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 656 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 657 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 658
 659 /**
 660  * cpu_single_step:
 661  * @cpu: CPU to the flags for.
 662  * @enabled: Flags to enable.
 663  *
 664  * Enables or disables single-stepping for @cpu.
 665  */
 666 void cpu_single_step(CPUState *cpu, int enabled);
 667
 668 /* Breakpoint/watchpoint flags */
 669 #define BP_MEM_READ           0x01
 670 #define BP_MEM_WRITE          0x02
 671 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 672 #define BP_STOP_BEFORE_ACCESS 0x04
 673 /* 0x08 currently unused */
 674 #define BP_GDB                0x10
 675 #define BP_CPU                0x20
 676 #define BP_WATCHPOINT_HIT_READ 0x40
 677 #define BP_WATCHPOINT_HIT_WRITE 0x80
 678 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
 679
 680 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 681                           CPUBreakpoint **breakpoint);
 682 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 683 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 684 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 685
 686 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 687                           int flags, CPUWatchpoint **watchpoint);
 688 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 689                           vaddr len, int flags);
 690 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 691 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 692
 693 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 694     GCC_FMT_ATTR(2, 3);
 695 void cpu_exec_exit(CPUState *cpu);
 696
 697 #ifdef CONFIG_SOFTMMU
 698 extern const struct VMStateDescription vmstate_cpu_common;
 699 #else
 700 #define vmstate_cpu_common vmstate_dummy
 701 #endif
 702
 703 #define VMSTATE_CPU() {                                                     \
 704     .name = "parent_obj",                                                   \
 705     .size = sizeof(CPUState),                                               \
 706     .vmsd = &vmstate_cpu_common,                                            \
 707     .flags = VMS_STRUCT,                                                    \
 708     .offset = 0,                                                            \
 709 }
 710
 711 #endif