hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "hw.h"
  11 #include "mips.h"
  12 #include "mips_cpudevs.h"
  13 #include "pc.h"
  14 #include "isa.h"
  15 #include "net.h"
  16 #include "sysemu.h"
  17 #include "boards.h"
  18 #include "flash.h"
  19 #include "qemu-log.h"
  20 #include "mips-bios.h"
  21 #include "ide.h"
  22 #include "loader.h"
  23 #include "elf.h"
  24 #include "mc146818rtc.h"
  25 #include "blockdev.h"
  26 #include "exec-memory.h"
  27
  28 #define MAX_IDE_BUS 2
  29
  30 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  31 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  32 static const int ide_irq[2] = { 14, 15 };
  33
  34 static ISADevice *pit; /* PIT i8254 */
  35
  36 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  37
  38 static struct _loaderparams {
  39     int ram_size;
  40     const char *kernel_filename;
  41     const char *kernel_cmdline;
  42     const char *initrd_filename;
  43 } loaderparams;
  44
  45 static void mips_qemu_write (void *opaque, target_phys_addr_t addr,
  46                              uint64_t val, unsigned size)
  47 {
  48     if ((addr & 0xffff) == 0 && val == 42)
  49         qemu_system_reset_request ();
  50     else if ((addr & 0xffff) == 4 && val == 42)
  51         qemu_system_shutdown_request ();
  52 }
  53
  54 static uint64_t mips_qemu_read (void *opaque, target_phys_addr_t addr,
  55                                 unsigned size)
  56 {
  57     return 0;
  58 }
  59
  60 static const MemoryRegionOps mips_qemu_ops = {
  61     .read = mips_qemu_read,
  62     .write = mips_qemu_write,
  63     .endianness = DEVICE_NATIVE_ENDIAN,
  64 };
  65
  66 typedef struct ResetData {
  67     CPUState *env;
  68     uint64_t vector;
  69 } ResetData;
  70
  71 static int64_t load_kernel(void)
  72 {
  73     int64_t entry, kernel_high;
  74     long kernel_size, initrd_size, params_size;
  75     ram_addr_t initrd_offset;
  76     uint32_t *params_buf;
  77     int big_endian;
  78
  79 #ifdef TARGET_WORDS_BIGENDIAN
  80     big_endian = 1;
  81 #else
  82     big_endian = 0;
  83 #endif
  84     kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  85                            NULL, (uint64_t *)&entry, NULL,
  86                            (uint64_t *)&kernel_high, big_endian,
  87                            ELF_MACHINE, 1);
  88     if (kernel_size >= 0) {
  89         if ((entry & ~0x7fffffffULL) == 0x80000000)
  90             entry = (int32_t)entry;
  91     } else {
  92         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  93                 loaderparams.kernel_filename);
  94         exit(1);
  95     }
  96
  97     /* load initrd */
  98     initrd_size = 0;
  99     initrd_offset = 0;
 100     if (loaderparams.initrd_filename) {
 101         initrd_size = get_image_size (loaderparams.initrd_filename);
 102         if (initrd_size > 0) {
 103             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 104             if (initrd_offset + initrd_size > ram_size) {
 105                 fprintf(stderr,
 106                         "qemu: memory too small for initial ram disk '%s'\n",
 107                         loaderparams.initrd_filename);
 108                 exit(1);
 109             }
 110             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 111                                               initrd_offset,
 112                                               ram_size - initrd_offset);
 113         }
 114         if (initrd_size == (target_ulong) -1) {
 115             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 116                     loaderparams.initrd_filename);
 117             exit(1);
 118         }
 119     }
 120
 121     /* Store command line.  */
 122     params_size = 264;
 123     params_buf = g_malloc(params_size);
 124
 125     params_buf[0] = tswap32(ram_size);
 126     params_buf[1] = tswap32(0x12345678);
 127
 128     if (initrd_size > 0) {
 129         snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 130                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 131                  initrd_size, loaderparams.kernel_cmdline);
 132     } else {
 133         snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 134     }
 135
 136     rom_add_blob_fixed("params", params_buf, params_size,
 137                        (16 << 20) - 264);
 138
 139     return entry;
 140 }
 141
 142 static void main_cpu_reset(void *opaque)
 143 {
 144     ResetData *s = (ResetData *)opaque;
 145     CPUState *env = s->env;
 146
 147     cpu_reset(env);
 148     env->active_tc.PC = s->vector;
 149 }
 150
 151 static const int sector_len = 32 * 1024;
 152 static
 153 void mips_r4k_init (ram_addr_t ram_size,
 154                     const char *boot_device,
 155                     const char *kernel_filename, const char *kernel_cmdline,
 156                     const char *initrd_filename, const char *cpu_model)
 157 {
 158     char *filename;
 159     MemoryRegion *address_space_mem = get_system_memory();
 160     MemoryRegion *ram = g_new(MemoryRegion, 1);
 161     MemoryRegion *bios;
 162     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 163     int bios_size;
 164     CPUState *env;
 165     ResetData *reset_info;
 166     int i;
 167     qemu_irq *i8259;
 168     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 169     DriveInfo *dinfo;
 170     int be;
 171
 172     /* init CPUs */
 173     if (cpu_model == NULL) {
 174 #ifdef TARGET_MIPS64
 175         cpu_model = "R4000";
 176 #else
 177         cpu_model = "24Kf";
 178 #endif
 179     }
 180     env = cpu_init(cpu_model);
 181     if (!env) {
 182         fprintf(stderr, "Unable to find CPU definition\n");
 183         exit(1);
 184     }
 185     reset_info = g_malloc0(sizeof(ResetData));
 186     reset_info->env = env;
 187     reset_info->vector = env->active_tc.PC;
 188     qemu_register_reset(main_cpu_reset, reset_info);
 189
 190     /* allocate RAM */
 191     if (ram_size > (256 << 20)) {
 192         fprintf(stderr,
 193                 "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
 194                 ((unsigned int)ram_size / (1 << 20)));
 195         exit(1);
 196     }
 197     memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
 198
 199     memory_region_add_subregion(address_space_mem, 0, ram);
 200
 201     memory_region_init_io(iomem, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 202     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 203
 204     /* Try to load a BIOS image. If this fails, we continue regardless,
 205        but initialize the hardware ourselves. When a kernel gets
 206        preloaded we also initialize the hardware, since the BIOS wasn't
 207        run. */
 208     if (bios_name == NULL)
 209         bios_name = BIOS_FILENAME;
 210     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 211     if (filename) {
 212         bios_size = get_image_size(filename);
 213     } else {
 214         bios_size = -1;
 215     }
 216 #ifdef TARGET_WORDS_BIGENDIAN
 217     be = 1;
 218 #else
 219     be = 0;
 220 #endif
 221     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 222         bios = g_new(MemoryRegion, 1);
 223         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE);
 224         memory_region_set_readonly(bios, true);
 225         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 226
 227         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 228     } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 229         uint32_t mips_rom = 0x00400000;
 230         if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 231                                    dinfo->bdrv, sector_len,
 232                                    mips_rom / sector_len,
 233                                    4, 0, 0, 0, 0, be)) {
 234             fprintf(stderr, "qemu: Error registering flash memory.\n");
 235         }
 236     }
 237     else {
 238         /* not fatal */
 239         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 240                 bios_name);
 241     }
 242     if (filename) {
 243         g_free(filename);
 244     }
 245
 246     if (kernel_filename) {
 247         loaderparams.ram_size = ram_size;
 248         loaderparams.kernel_filename = kernel_filename;
 249         loaderparams.kernel_cmdline = kernel_cmdline;
 250         loaderparams.initrd_filename = initrd_filename;
 251         reset_info->vector = load_kernel();
 252     }
 253
 254     /* Init CPU internal devices */
 255     cpu_mips_irq_init_cpu(env);
 256     cpu_mips_clock_init(env);
 257
 258     /* The PIC is attached to the MIPS CPU INT0 pin */
 259     isa_bus_new(NULL, get_system_io());
 260     i8259 = i8259_init(env->irq[2]);
 261     isa_bus_irqs(i8259);
 262
 263     rtc_init(2000, NULL);
 264
 265     /* Register 64 KB of ISA IO space at 0x14000000 */
 266     isa_mmio_init(0x14000000, 0x00010000);
 267     isa_mem_base = 0x10000000;
 268
 269     pit = pit_init(0x40, 0);
 270
 271     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 272         if (serial_hds[i]) {
 273             serial_isa_init(i, serial_hds[i]);
 274         }
 275     }
 276
 277     isa_vga_init();
 278
 279     if (nd_table[0].vlan)
 280         isa_ne2000_init(0x300, 9, &nd_table[0]);
 281
 282     ide_drive_get(hd, MAX_IDE_BUS);
 283     for(i = 0; i < MAX_IDE_BUS; i++)
 284         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 285                      hd[MAX_IDE_DEVS * i],
 286                      hd[MAX_IDE_DEVS * i + 1]);
 287
 288     isa_create_simple("i8042");
 289 }
 290
 291 static QEMUMachine mips_machine = {
 292     .name = "mips",
 293     .desc = "mips r4k platform",
 294     .init = mips_r4k_init,
 295 };
 296
 297 static void mips_machine_init(void)
 298 {
 299     qemu_register_machine(&mips_machine);
 300 }
 301
 302 machine_init(mips_machine_init);