Fix Sparse warning about "expression using sizeof on a function"
[qemu.git] / target-microblaze / op_helper.c
blobf86b1c78c9e03d38dabc2794631271909e0fdca0
1 /*
2 * Microblaze helper routines.
4 * Copyright (c) 2009 Edgar E. Iglesias <edgar.iglesias@gmail.com>.
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include <assert.h>
21 #include "exec.h"
22 #include "helper.h"
23 #include "host-utils.h"
25 #define D(x)
27 #if !defined(CONFIG_USER_ONLY)
28 #define MMUSUFFIX _mmu
29 #define SHIFT 0
30 #include "softmmu_template.h"
31 #define SHIFT 1
32 #include "softmmu_template.h"
33 #define SHIFT 2
34 #include "softmmu_template.h"
35 #define SHIFT 3
36 #include "softmmu_template.h"
38 /* Try to fill the TLB and return an exception if error. If retaddr is
39 NULL, it means that the function was called in C code (i.e. not
40 from generated code or from helper.c) */
41 /* XXX: fix it to restore all registers */
42 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
44 TranslationBlock *tb;
45 CPUState *saved_env;
46 unsigned long pc;
47 int ret;
49 /* XXX: hack to restore env in all cases, even if not called from
50 generated code */
51 saved_env = env;
52 env = cpu_single_env;
54 ret = cpu_mb_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
55 if (unlikely(ret)) {
56 if (retaddr) {
57 /* now we have a real cpu fault */
58 pc = (unsigned long)retaddr;
59 tb = tb_find_pc(pc);
60 if (tb) {
61 /* the PC is inside the translated code. It means that we have
62 a virtual CPU fault */
63 cpu_restore_state(tb, env, pc, NULL);
66 cpu_loop_exit();
68 env = saved_env;
70 #endif
72 void helper_raise_exception(uint32_t index)
74 env->exception_index = index;
75 cpu_loop_exit();
78 void helper_debug(void)
80 int i;
82 qemu_log("PC=%8.8x\n", env->sregs[SR_PC]);
83 for (i = 0; i < 32; i++) {
84 qemu_log("r%2.2d=%8.8x ", i, env->regs[i]);
85 if ((i + 1) % 4 == 0)
86 qemu_log("\n");
88 qemu_log("\n\n");
91 static inline uint32_t compute_carry(uint32_t a, uint32_t b, uint32_t cin)
93 uint32_t cout = 0;
95 if ((b == ~0) && cin)
96 cout = 1;
97 else if ((~0 - a) < (b + cin))
98 cout = 1;
99 return cout;
102 uint32_t helper_cmp(uint32_t a, uint32_t b)
104 uint32_t t;
106 t = b + ~a + 1;
107 if ((b & 0x80000000) ^ (a & 0x80000000))
108 t = (t & 0x7fffffff) | (b & 0x80000000);
109 return t;
112 uint32_t helper_cmpu(uint32_t a, uint32_t b)
114 uint32_t t;
116 t = b + ~a + 1;
117 if ((b & 0x80000000) ^ (a & 0x80000000))
118 t = (t & 0x7fffffff) | (a & 0x80000000);
119 return t;
122 uint32_t helper_addkc(uint32_t a, uint32_t b, uint32_t k, uint32_t c)
124 uint32_t d, cf = 0, ncf;
126 if (c)
127 cf = env->sregs[SR_MSR] >> 31;
128 assert(cf == 0 || cf == 1);
129 d = a + b + cf;
131 if (!k) {
132 ncf = compute_carry(a, b, cf);
133 assert(ncf == 0 || ncf == 1);
134 if (ncf)
135 env->sregs[SR_MSR] |= MSR_C | MSR_CC;
136 else
137 env->sregs[SR_MSR] &= ~(MSR_C | MSR_CC);
139 D(qemu_log("%x = %x + %x cf=%d ncf=%d k=%d c=%d\n",
140 d, a, b, cf, ncf, k, c));
141 return d;
144 uint32_t helper_subkc(uint32_t a, uint32_t b, uint32_t k, uint32_t c)
146 uint32_t d, cf = 1, ncf;
148 if (c)
149 cf = env->sregs[SR_MSR] >> 31;
150 assert(cf == 0 || cf == 1);
151 d = b + ~a + cf;
153 if (!k) {
154 ncf = compute_carry(b, ~a, cf);
155 assert(ncf == 0 || ncf == 1);
156 if (ncf)
157 env->sregs[SR_MSR] |= MSR_C | MSR_CC;
158 else
159 env->sregs[SR_MSR] &= ~(MSR_C | MSR_CC);
161 D(qemu_log("%x = %x + %x cf=%d ncf=%d k=%d c=%d\n",
162 d, a, b, cf, ncf, k, c));
163 return d;
166 static inline int div_prepare(uint32_t a, uint32_t b)
168 if (b == 0) {
169 env->sregs[SR_MSR] |= MSR_DZ;
170 /* FIXME: Raise the div by zero exception. */
171 return 0;
173 env->sregs[SR_MSR] &= ~MSR_DZ;
174 return 1;
177 uint32_t helper_divs(uint32_t a, uint32_t b)
179 if (!div_prepare(a, b))
180 return 0;
181 return (int32_t)a / (int32_t)b;
184 uint32_t helper_divu(uint32_t a, uint32_t b)
186 if (!div_prepare(a, b))
187 return 0;
188 return a / b;
191 uint32_t helper_pcmpbf(uint32_t a, uint32_t b)
193 unsigned int i;
194 uint32_t mask = 0xff000000;
196 for (i = 0; i < 4; i++) {
197 if ((a & mask) == (b & mask))
198 return i + 1;
199 mask >>= 8;
201 return 0;
204 #if !defined(CONFIG_USER_ONLY)
205 /* Writes/reads to the MMU's special regs end up here. */
206 uint32_t helper_mmu_read(uint32_t rn)
208 return mmu_read(env, rn);
211 void helper_mmu_write(uint32_t rn, uint32_t v)
213 mmu_write(env, rn, v);
215 #endif