MAINTAINERS: Change MIPS and SH4 maintainers
[qemu.git] / target-sparc / exec.h
blobf8115716eb17623d9a55521ed5afde322bbeecd9
1 #ifndef EXEC_SPARC_H
2 #define EXEC_SPARC_H 1
3 #include "config.h"
4 #include "dyngen-exec.h"
6 register struct CPUSPARCState *env asm(AREG0);
8 #include "cpu.h"
9 #include "exec-all.h"
11 #if !defined(CONFIG_USER_ONLY)
12 #include "softmmu_exec.h"
13 #endif /* !defined(CONFIG_USER_ONLY) */
15 /* op_helper.c */
16 void do_interrupt(CPUState *env);
18 static inline int cpu_has_work(CPUState *env1)
20 return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
21 cpu_interrupts_enabled(env1);
25 static inline int cpu_halted(CPUState *env1) {
26 if (!env1->halted)
27 return 0;
28 if (cpu_has_work(env1)) {
29 env1->halted = 0;
30 return 0;
32 return EXCP_HALTED;
35 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
37 env->pc = tb->pc;
38 env->npc = tb->cs_base;
41 #endif