include/tcg/tcg-op-gvec.h

   1 /*
   2  * Generic vector operation expansion
   3  *
   4  * Copyright (c) 2018 Linaro
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef TCG_TCG_OP_GVEC_H
  21 #define TCG_TCG_OP_GVEC_H
  22
  23 /*
  24  * "Generic" vectors.  All operands are given as offsets from ENV,
  25  * and therefore cannot also be allocated via tcg_global_mem_new_*.
  26  * OPRSZ is the byte size of the vector upon which the operation is performed.
  27  * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
  28  *
  29  * All sizes must be 8 or any multiple of 16.
  30  * When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
  31  * Operands may completely, but not partially, overlap.
  32  */
  33
  34 /* Expand a call to a gvec-style helper, with pointers to two vector
  35    operands, and a descriptor (see tcg-gvec-desc.h).  */
  36 typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
  37 void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
  38                         uint32_t oprsz, uint32_t maxsz, int32_t data,
  39                         gen_helper_gvec_2 *fn);
  40
  41 /* Similarly, passing an extra data value.  */
  42 typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32);
  43 void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
  44                          uint32_t oprsz, uint32_t maxsz, int32_t data,
  45                          gen_helper_gvec_2i *fn);
  46
  47 /* Similarly, passing an extra pointer (e.g. env or float_status).  */
  48 typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
  49 void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
  50                         TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
  51                         int32_t data, gen_helper_gvec_2_ptr *fn);
  52
  53 /* Similarly, with three vector operands.  */
  54 typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
  55 void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  56                         uint32_t oprsz, uint32_t maxsz, int32_t data,
  57                         gen_helper_gvec_3 *fn);
  58
  59 /* Similarly, with four vector operands.  */
  60 typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
  61                                TCGv_ptr, TCGv_i32);
  62 void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  63                         uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
  64                         int32_t data, gen_helper_gvec_4 *fn);
  65
  66 /* Similarly, with five vector operands.  */
  67 typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
  68                                TCGv_ptr, TCGv_i32);
  69 void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  70                         uint32_t cofs, uint32_t xofs, uint32_t oprsz,
  71                         uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
  72
  73 typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
  74                                    TCGv_ptr, TCGv_i32);
  75 void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  76                         TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
  77                         int32_t data, gen_helper_gvec_3_ptr *fn);
  78
  79 typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
  80                                    TCGv_ptr, TCGv_ptr, TCGv_i32);
  81 void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  82                         uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
  83                         uint32_t maxsz, int32_t data,
  84                         gen_helper_gvec_4_ptr *fn);
  85
  86 typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
  87                                    TCGv_ptr, TCGv_ptr, TCGv_i32);
  88 void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
  89                         uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
  90                         uint32_t oprsz, uint32_t maxsz, int32_t data,
  91                         gen_helper_gvec_5_ptr *fn);
  92
  93 /* Expand a gvec operation.  Either inline or out-of-line depending on
  94    the actual vector size and the operations supported by the host.  */
  95 typedef struct {
  96     /* Expand inline as a 64-bit or 32-bit integer.
  97        Only one of these will be non-NULL.  */
  98     void (*fni8)(TCGv_i64, TCGv_i64);
  99     void (*fni4)(TCGv_i32, TCGv_i32);
 100     /* Expand inline with a host vector type.  */
 101     void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
 102     /* Expand out-of-line helper w/descriptor.  */
 103     gen_helper_gvec_2 *fno;
 104     /* The optional opcodes, if any, utilized by .fniv.  */
 105     const TCGOpcode *opt_opc;
 106     /* The data argument to the out-of-line helper.  */
 107     int32_t data;
 108     /* The vector element size, if applicable.  */
 109     uint8_t vece;
 110     /* Prefer i64 to v64.  */
 111     bool prefer_i64;
 112     /* Load dest as a 2nd source operand.  */
 113     bool load_dest;
 114 } GVecGen2;
 115
 116 typedef struct {
 117     /* Expand inline as a 64-bit or 32-bit integer.
 118        Only one of these will be non-NULL.  */
 119     void (*fni8)(TCGv_i64, TCGv_i64, int64_t);
 120     void (*fni4)(TCGv_i32, TCGv_i32, int32_t);
 121     /* Expand inline with a host vector type.  */
 122     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t);
 123     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
 124     gen_helper_gvec_2 *fno;
 125     /* Expand out-of-line helper w/descriptor, data as argument.  */
 126     gen_helper_gvec_2i *fnoi;
 127     /* The optional opcodes, if any, utilized by .fniv.  */
 128     const TCGOpcode *opt_opc;
 129     /* The vector element size, if applicable.  */
 130     uint8_t vece;
 131     /* Prefer i64 to v64.  */
 132     bool prefer_i64;
 133     /* Load dest as a 3rd source operand.  */
 134     bool load_dest;
 135 } GVecGen2i;
 136
 137 typedef struct {
 138     /* Expand inline as a 64-bit or 32-bit integer.
 139        Only one of these will be non-NULL.  */
 140     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
 141     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
 142     /* Expand inline with a host vector type.  */
 143     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
 144     /* Expand out-of-line helper w/descriptor.  */
 145     gen_helper_gvec_2i *fno;
 146     /* The optional opcodes, if any, utilized by .fniv.  */
 147     const TCGOpcode *opt_opc;
 148     /* The data argument to the out-of-line helper.  */
 149     uint32_t data;
 150     /* The vector element size, if applicable.  */
 151     uint8_t vece;
 152     /* Prefer i64 to v64.  */
 153     bool prefer_i64;
 154     /* Load scalar as 1st source operand.  */
 155     bool scalar_first;
 156 } GVecGen2s;
 157
 158 typedef struct {
 159     /* Expand inline as a 64-bit or 32-bit integer.
 160        Only one of these will be non-NULL.  */
 161     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
 162     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
 163     /* Expand inline with a host vector type.  */
 164     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
 165     /* Expand out-of-line helper w/descriptor.  */
 166     gen_helper_gvec_3 *fno;
 167     /* The optional opcodes, if any, utilized by .fniv.  */
 168     const TCGOpcode *opt_opc;
 169     /* The data argument to the out-of-line helper.  */
 170     int32_t data;
 171     /* The vector element size, if applicable.  */
 172     uint8_t vece;
 173     /* Prefer i64 to v64.  */
 174     bool prefer_i64;
 175     /* Load dest as a 3rd source operand.  */
 176     bool load_dest;
 177 } GVecGen3;
 178
 179 typedef struct {
 180     /*
 181      * Expand inline as a 64-bit or 32-bit integer. Only one of these will be
 182      * non-NULL.
 183      */
 184     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, int64_t);
 185     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, int32_t);
 186     /* Expand inline with a host vector type.  */
 187     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, int64_t);
 188     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
 189     gen_helper_gvec_3 *fno;
 190     /* The optional opcodes, if any, utilized by .fniv.  */
 191     const TCGOpcode *opt_opc;
 192     /* The vector element size, if applicable.  */
 193     uint8_t vece;
 194     /* Prefer i64 to v64.  */
 195     bool prefer_i64;
 196     /* Load dest as a 3rd source operand.  */
 197     bool load_dest;
 198 } GVecGen3i;
 199
 200 typedef struct {
 201     /* Expand inline as a 64-bit or 32-bit integer.
 202        Only one of these will be non-NULL.  */
 203     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
 204     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
 205     /* Expand inline with a host vector type.  */
 206     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
 207     /* Expand out-of-line helper w/descriptor.  */
 208     gen_helper_gvec_4 *fno;
 209     /* The optional opcodes, if any, utilized by .fniv.  */
 210     const TCGOpcode *opt_opc;
 211     /* The data argument to the out-of-line helper.  */
 212     int32_t data;
 213     /* The vector element size, if applicable.  */
 214     uint8_t vece;
 215     /* Prefer i64 to v64.  */
 216     bool prefer_i64;
 217     /* Write aofs as a 2nd dest operand.  */
 218     bool write_aofs;
 219 } GVecGen4;
 220
 221 typedef struct {
 222     /*
 223      * Expand inline as a 64-bit or 32-bit integer. Only one of these will be
 224      * non-NULL.
 225      */
 226     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64, int64_t);
 227     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32, int32_t);
 228     /* Expand inline with a host vector type.  */
 229     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec, int64_t);
 230     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
 231     gen_helper_gvec_4 *fno;
 232     /* The optional opcodes, if any, utilized by .fniv.  */
 233     const TCGOpcode *opt_opc;
 234     /* The vector element size, if applicable.  */
 235     uint8_t vece;
 236     /* Prefer i64 to v64.  */
 237     bool prefer_i64;
 238 } GVecGen4i;
 239
 240 void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
 241                     uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
 242 void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
 243                      uint32_t maxsz, int64_t c, const GVecGen2i *);
 244 void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
 245                      uint32_t maxsz, TCGv_i64 c, const GVecGen2s *);
 246 void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
 247                     uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
 248 void tcg_gen_gvec_3i(uint32_t dofs, uint32_t aofs, uint32_t bofs,
 249                      uint32_t oprsz, uint32_t maxsz, int64_t c,
 250                      const GVecGen3i *);
 251 void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
 252                     uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
 253 void tcg_gen_gvec_4i(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
 254                      uint32_t oprsz, uint32_t maxsz, int64_t c,
 255                      const GVecGen4i *);
 256
 257 /* Expand a specific vector operation.  */
 258
 259 void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
 260                       uint32_t oprsz, uint32_t maxsz);
 261 void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
 262                       uint32_t oprsz, uint32_t maxsz);
 263 void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
 264                       uint32_t oprsz, uint32_t maxsz);
 265 void tcg_gen_gvec_abs(unsigned vece, uint32_t dofs, uint32_t aofs,
 266                       uint32_t oprsz, uint32_t maxsz);
 267
 268 void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
 269                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 270 void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
 271                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 272 void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs,
 273                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 274
 275 void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
 276                        int64_t c, uint32_t oprsz, uint32_t maxsz);
 277 void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
 278                        int64_t c, uint32_t oprsz, uint32_t maxsz);
 279
 280 void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
 281                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 282 void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs,
 283                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 284 void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
 285                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 286
 287 /* Saturated arithmetic.  */
 288 void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
 289                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 290 void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
 291                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 292 void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
 293                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 294 void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
 295                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 296
 297 /* Min/max.  */
 298 void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs,
 299                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 300 void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs,
 301                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 302 void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs,
 303                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 304 void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs,
 305                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 306
 307 void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
 308                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 309 void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
 310                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 311 void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
 312                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 313 void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
 314                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 315 void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
 316                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 317 void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs,
 318                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 319 void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs,
 320                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 321 void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs,
 322                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 323
 324 void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
 325                        int64_t c, uint32_t oprsz, uint32_t maxsz);
 326 void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
 327                        int64_t c, uint32_t oprsz, uint32_t maxsz);
 328 void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
 329                       int64_t c, uint32_t oprsz, uint32_t maxsz);
 330
 331 void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
 332                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 333 void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
 334                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 335 void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
 336                       TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
 337
 338 void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
 339                           uint32_t s, uint32_t m);
 340 void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t s,
 341                           uint32_t m, uint64_t imm);
 342 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
 343                           uint32_t m, TCGv_i32);
 344 void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
 345                           uint32_t m, TCGv_i64);
 346
 347 #if TARGET_LONG_BITS == 64
 348 # define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i64
 349 #else
 350 # define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i32
 351 #endif
 352
 353 void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,
 354                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
 355 void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs,
 356                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
 357 void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs,
 358                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
 359 void tcg_gen_gvec_rotli(unsigned vece, uint32_t dofs, uint32_t aofs,
 360                         int64_t shift, uint32_t oprsz, uint32_t maxsz);
 361 void tcg_gen_gvec_rotri(unsigned vece, uint32_t dofs, uint32_t aofs,
 362                         int64_t shift, uint32_t oprsz, uint32_t maxsz);
 363
 364 void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs,
 365                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
 366 void tcg_gen_gvec_shrs(unsigned vece, uint32_t dofs, uint32_t aofs,
 367                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
 368 void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs,
 369                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
 370 void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs,
 371                         TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
 372
 373 /*
 374  * Perform vector shift by vector element, modulo the element size.
 375  * E.g.  D[i] = A[i] << (B[i] % (8 << vece)).
 376  */
 377 void tcg_gen_gvec_shlv(unsigned vece, uint32_t dofs, uint32_t aofs,
 378                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 379 void tcg_gen_gvec_shrv(unsigned vece, uint32_t dofs, uint32_t aofs,
 380                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 381 void tcg_gen_gvec_sarv(unsigned vece, uint32_t dofs, uint32_t aofs,
 382                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 383 void tcg_gen_gvec_rotlv(unsigned vece, uint32_t dofs, uint32_t aofs,
 384                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 385 void tcg_gen_gvec_rotrv(unsigned vece, uint32_t dofs, uint32_t aofs,
 386                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 387
 388 void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs,
 389                       uint32_t aofs, uint32_t bofs,
 390                       uint32_t oprsz, uint32_t maxsz);
 391
 392 /*
 393  * Perform vector bit select: d = (b & a) | (c & ~a).
 394  */
 395 void tcg_gen_gvec_bitsel(unsigned vece, uint32_t dofs, uint32_t aofs,
 396                          uint32_t bofs, uint32_t cofs,
 397                          uint32_t oprsz, uint32_t maxsz);
 398
 399 /*
 400  * 64-bit vector operations.  Use these when the register has been allocated
 401  * with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
 402  * OPRSZ = MAXSZ = 8.
 403  */
 404
 405 void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
 406 void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
 407 void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);
 408
 409 void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 410 void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 411 void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 412
 413 void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 414 void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 415 void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
 416
 417 void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 418 void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 419 void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 420 void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 421 void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 422 void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
 423 void tcg_gen_vec_rotl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
 424 void tcg_gen_vec_rotl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
 425
 426 /* 32-bit vector operations. */
 427 void tcg_gen_vec_add8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
 428 void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
 429
 430 void tcg_gen_vec_sub8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
 431 void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
 432
 433 void tcg_gen_vec_shl8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 434 void tcg_gen_vec_shl16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 435 void tcg_gen_vec_shr8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 436 void tcg_gen_vec_shr16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 437 void tcg_gen_vec_sar8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 438 void tcg_gen_vec_sar16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
 439
 440 #if TARGET_LONG_BITS == 64
 441 #define tcg_gen_vec_add8_tl  tcg_gen_vec_add8_i64
 442 #define tcg_gen_vec_sub8_tl  tcg_gen_vec_sub8_i64
 443 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64
 444 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64
 445 #define tcg_gen_vec_add32_tl tcg_gen_vec_add32_i64
 446 #define tcg_gen_vec_sub32_tl tcg_gen_vec_sub32_i64
 447 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i64
 448 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i64
 449 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i64
 450 #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i64
 451 #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i64
 452 #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i64
 453
 454 #else
 455 #define tcg_gen_vec_add8_tl  tcg_gen_vec_add8_i32
 456 #define tcg_gen_vec_sub8_tl  tcg_gen_vec_sub8_i32
 457 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32
 458 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32
 459 #define tcg_gen_vec_add32_tl tcg_gen_add_i32
 460 #define tcg_gen_vec_sub32_tl tcg_gen_sub_i32
 461 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i32
 462 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i32
 463 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i32
 464 #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i32
 465 #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i32
 466 #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i32
 467 #endif
 468
 469 #endif