tests/avocado: add RISC-V OpenSBI boot test
[qemu.git] / util / bufferiszero.c
blob1790ded7d42c498f6ec576310c8af6fa7bceb443
1 /*
2 * Simple C functions to supplement the C library
4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "qemu/osdep.h"
25 #include "qemu/cutils.h"
26 #include "qemu/bswap.h"
28 static bool
29 buffer_zero_int(const void *buf, size_t len)
31 if (unlikely(len < 8)) {
32 /* For a very small buffer, simply accumulate all the bytes. */
33 const unsigned char *p = buf;
34 const unsigned char *e = buf + len;
35 unsigned char t = 0;
37 do {
38 t |= *p++;
39 } while (p < e);
41 return t == 0;
42 } else {
43 /* Otherwise, use the unaligned memory access functions to
44 handle the beginning and end of the buffer, with a couple
45 of loops handling the middle aligned section. */
46 uint64_t t = ldq_he_p(buf);
47 const uint64_t *p = (uint64_t *)(((uintptr_t)buf + 8) & -8);
48 const uint64_t *e = (uint64_t *)(((uintptr_t)buf + len) & -8);
50 for (; p + 8 <= e; p += 8) {
51 __builtin_prefetch(p + 8);
52 if (t) {
53 return false;
55 t = p[0] | p[1] | p[2] | p[3] | p[4] | p[5] | p[6] | p[7];
57 while (p < e) {
58 t |= *p++;
60 t |= ldq_he_p(buf + len - 8);
62 return t == 0;
66 #if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT) || defined(__SSE2__)
67 #include <immintrin.h>
69 /* Note that each of these vectorized functions require len >= 64. */
71 static bool __attribute__((target("sse2")))
72 buffer_zero_sse2(const void *buf, size_t len)
74 __m128i t = _mm_loadu_si128(buf);
75 __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16);
76 __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16);
77 __m128i zero = _mm_setzero_si128();
79 /* Loop over 16-byte aligned blocks of 64. */
80 while (likely(p <= e)) {
81 __builtin_prefetch(p);
82 t = _mm_cmpeq_epi8(t, zero);
83 if (unlikely(_mm_movemask_epi8(t) != 0xFFFF)) {
84 return false;
86 t = p[-4] | p[-3] | p[-2] | p[-1];
87 p += 4;
90 /* Finish the aligned tail. */
91 t |= e[-3];
92 t |= e[-2];
93 t |= e[-1];
95 /* Finish the unaligned tail. */
96 t |= _mm_loadu_si128(buf + len - 16);
98 return _mm_movemask_epi8(_mm_cmpeq_epi8(t, zero)) == 0xFFFF;
101 #ifdef CONFIG_AVX2_OPT
102 static bool __attribute__((target("sse4")))
103 buffer_zero_sse4(const void *buf, size_t len)
105 __m128i t = _mm_loadu_si128(buf);
106 __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16);
107 __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16);
109 /* Loop over 16-byte aligned blocks of 64. */
110 while (likely(p <= e)) {
111 __builtin_prefetch(p);
112 if (unlikely(!_mm_testz_si128(t, t))) {
113 return false;
115 t = p[-4] | p[-3] | p[-2] | p[-1];
116 p += 4;
119 /* Finish the aligned tail. */
120 t |= e[-3];
121 t |= e[-2];
122 t |= e[-1];
124 /* Finish the unaligned tail. */
125 t |= _mm_loadu_si128(buf + len - 16);
127 return _mm_testz_si128(t, t);
130 static bool __attribute__((target("avx2")))
131 buffer_zero_avx2(const void *buf, size_t len)
133 /* Begin with an unaligned head of 32 bytes. */
134 __m256i t = _mm256_loadu_si256(buf);
135 __m256i *p = (__m256i *)(((uintptr_t)buf + 5 * 32) & -32);
136 __m256i *e = (__m256i *)(((uintptr_t)buf + len) & -32);
138 /* Loop over 32-byte aligned blocks of 128. */
139 while (p <= e) {
140 __builtin_prefetch(p);
141 if (unlikely(!_mm256_testz_si256(t, t))) {
142 return false;
144 t = p[-4] | p[-3] | p[-2] | p[-1];
145 p += 4;
148 /* Finish the last block of 128 unaligned. */
149 t |= _mm256_loadu_si256(buf + len - 4 * 32);
150 t |= _mm256_loadu_si256(buf + len - 3 * 32);
151 t |= _mm256_loadu_si256(buf + len - 2 * 32);
152 t |= _mm256_loadu_si256(buf + len - 1 * 32);
154 return _mm256_testz_si256(t, t);
156 #endif /* CONFIG_AVX2_OPT */
158 #ifdef CONFIG_AVX512F_OPT
159 static bool __attribute__((target("avx512f")))
160 buffer_zero_avx512(const void *buf, size_t len)
162 /* Begin with an unaligned head of 64 bytes. */
163 __m512i t = _mm512_loadu_si512(buf);
164 __m512i *p = (__m512i *)(((uintptr_t)buf + 5 * 64) & -64);
165 __m512i *e = (__m512i *)(((uintptr_t)buf + len) & -64);
167 /* Loop over 64-byte aligned blocks of 256. */
168 while (p <= e) {
169 __builtin_prefetch(p);
170 if (unlikely(_mm512_test_epi64_mask(t, t))) {
171 return false;
173 t = p[-4] | p[-3] | p[-2] | p[-1];
174 p += 4;
177 t |= _mm512_loadu_si512(buf + len - 4 * 64);
178 t |= _mm512_loadu_si512(buf + len - 3 * 64);
179 t |= _mm512_loadu_si512(buf + len - 2 * 64);
180 t |= _mm512_loadu_si512(buf + len - 1 * 64);
182 return !_mm512_test_epi64_mask(t, t);
185 #endif /* CONFIG_AVX512F_OPT */
188 /* Note that for test_buffer_is_zero_next_accel, the most preferred
189 * ISA must have the least significant bit.
191 #define CACHE_AVX512F 1
192 #define CACHE_AVX2 2
193 #define CACHE_SSE4 4
194 #define CACHE_SSE2 8
196 /* Make sure that these variables are appropriately initialized when
197 * SSE2 is enabled on the compiler command-line, but the compiler is
198 * too old to support CONFIG_AVX2_OPT.
200 #if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT)
201 # define INIT_CACHE 0
202 # define INIT_ACCEL buffer_zero_int
203 #else
204 # ifndef __SSE2__
205 # error "ISA selection confusion"
206 # endif
207 # define INIT_CACHE CACHE_SSE2
208 # define INIT_ACCEL buffer_zero_sse2
209 #endif
211 static unsigned cpuid_cache = INIT_CACHE;
212 static bool (*buffer_accel)(const void *, size_t) = INIT_ACCEL;
213 static int length_to_accel = 64;
215 static void init_accel(unsigned cache)
217 bool (*fn)(const void *, size_t) = buffer_zero_int;
218 if (cache & CACHE_SSE2) {
219 fn = buffer_zero_sse2;
220 length_to_accel = 64;
222 #ifdef CONFIG_AVX2_OPT
223 if (cache & CACHE_SSE4) {
224 fn = buffer_zero_sse4;
225 length_to_accel = 64;
227 if (cache & CACHE_AVX2) {
228 fn = buffer_zero_avx2;
229 length_to_accel = 128;
231 #endif
232 #ifdef CONFIG_AVX512F_OPT
233 if (cache & CACHE_AVX512F) {
234 fn = buffer_zero_avx512;
235 length_to_accel = 256;
237 #endif
238 buffer_accel = fn;
241 #if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT)
242 #include "qemu/cpuid.h"
244 static void __attribute__((constructor)) init_cpuid_cache(void)
246 unsigned max = __get_cpuid_max(0, NULL);
247 int a, b, c, d;
248 unsigned cache = 0;
250 if (max >= 1) {
251 __cpuid(1, a, b, c, d);
252 if (d & bit_SSE2) {
253 cache |= CACHE_SSE2;
255 if (c & bit_SSE4_1) {
256 cache |= CACHE_SSE4;
259 /* We must check that AVX is not just available, but usable. */
260 if ((c & bit_OSXSAVE) && (c & bit_AVX) && max >= 7) {
261 int bv;
262 __asm("xgetbv" : "=a"(bv), "=d"(d) : "c"(0));
263 __cpuid_count(7, 0, a, b, c, d);
264 if ((bv & 0x6) == 0x6 && (b & bit_AVX2)) {
265 cache |= CACHE_AVX2;
267 /* 0xe6:
268 * XCR0[7:5] = 111b (OPMASK state, upper 256-bit of ZMM0-ZMM15
269 * and ZMM16-ZMM31 state are enabled by OS)
270 * XCR0[2:1] = 11b (XMM state and YMM state are enabled by OS)
272 if ((bv & 0xe6) == 0xe6 && (b & bit_AVX512F)) {
273 cache |= CACHE_AVX512F;
277 cpuid_cache = cache;
278 init_accel(cache);
280 #endif /* CONFIG_AVX2_OPT */
282 bool test_buffer_is_zero_next_accel(void)
284 /* If no bits set, we just tested buffer_zero_int, and there
285 are no more acceleration options to test. */
286 if (cpuid_cache == 0) {
287 return false;
289 /* Disable the accelerator we used before and select a new one. */
290 cpuid_cache &= cpuid_cache - 1;
291 init_accel(cpuid_cache);
292 return true;
295 static bool select_accel_fn(const void *buf, size_t len)
297 if (likely(len >= length_to_accel)) {
298 return buffer_accel(buf, len);
300 return buffer_zero_int(buf, len);
303 #else
304 #define select_accel_fn buffer_zero_int
305 bool test_buffer_is_zero_next_accel(void)
307 return false;
309 #endif
312 * Checks if a buffer is all zeroes
314 bool buffer_is_zero(const void *buf, size_t len)
316 if (unlikely(len == 0)) {
317 return true;
320 /* Fetch the beginning of the buffer while we select the accelerator. */
321 __builtin_prefetch(buf);
323 /* Use an optimized zero check if possible. Note that this also
324 includes a check for an unrolled loop over 64-bit integers. */
325 return select_accel_fn(buf, len);