2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "sysemu/sysemu.h"
30 #include "sysemu/numa.h"
32 #include "hw/fw-path-provider.h"
35 #include "sysemu/device_tree.h"
36 #include "sysemu/block-backend.h"
37 #include "sysemu/cpus.h"
38 #include "sysemu/kvm.h"
39 #include "sysemu/device_tree.h"
41 #include "migration/migration.h"
42 #include "mmu-hash64.h"
45 #include "hw/boards.h"
46 #include "hw/ppc/ppc.h"
47 #include "hw/loader.h"
49 #include "hw/ppc/spapr.h"
50 #include "hw/ppc/spapr_vio.h"
51 #include "hw/pci-host/spapr.h"
52 #include "hw/ppc/xics.h"
53 #include "hw/pci/msi.h"
55 #include "hw/pci/pci.h"
56 #include "hw/scsi/scsi.h"
57 #include "hw/virtio/virtio-scsi.h"
59 #include "exec/address-spaces.h"
61 #include "qemu/config-file.h"
62 #include "qemu/error-report.h"
66 #include "hw/compat.h"
67 #include "qemu/cutils.h"
71 /* SLOF memory layout:
73 * SLOF raw image loaded at 0, copies its romfs right below the flat
74 * device-tree, then position SLOF itself 31M below that
76 * So we set FW_OVERHEAD to 40MB which should account for all of that
79 * We load our kernel at 4M, leaving space for SLOF initial image
81 #define FDT_MAX_SIZE 0x100000
82 #define RTAS_MAX_SIZE 0x10000
83 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
84 #define FW_MAX_SIZE 0x400000
85 #define FW_FILE_NAME "slof.bin"
86 #define FW_OVERHEAD 0x2800000
87 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
89 #define MIN_RMA_SLOF 128UL
91 #define TIMEBASE_FREQ 512000000ULL
93 #define PHANDLE_XICP 0x00001111
95 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
97 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
98 int nr_irqs
, Error
**errp
)
103 dev
= qdev_create(NULL
, type
);
104 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
105 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
106 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
108 error_propagate(errp
, err
);
109 object_unparent(OBJECT(dev
));
112 return XICS_COMMON(dev
);
115 static XICSState
*xics_system_init(MachineState
*machine
,
116 int nr_servers
, int nr_irqs
, Error
**errp
)
118 XICSState
*icp
= NULL
;
123 if (machine_kernel_irqchip_allowed(machine
)) {
124 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
126 if (machine_kernel_irqchip_required(machine
) && !icp
) {
127 error_reportf_err(err
,
128 "kernel_irqchip requested but unavailable: ");
135 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, errp
);
141 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
145 uint32_t servers_prop
[smt_threads
];
146 uint32_t gservers_prop
[smt_threads
* 2];
147 int index
= ppc_get_vcpu_dt_id(cpu
);
149 if (cpu
->cpu_version
) {
150 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
156 /* Build interrupt servers and gservers properties */
157 for (i
= 0; i
< smt_threads
; i
++) {
158 servers_prop
[i
] = cpu_to_be32(index
+ i
);
159 /* Hack, direct the group queues back to cpu 0 */
160 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
161 gservers_prop
[i
*2 + 1] = 0;
163 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
164 servers_prop
, sizeof(servers_prop
));
168 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
169 gservers_prop
, sizeof(gservers_prop
));
174 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
177 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
178 int index
= ppc_get_vcpu_dt_id(cpu
);
179 uint32_t associativity
[] = {cpu_to_be32(0x5),
183 cpu_to_be32(cs
->numa_node
),
186 /* Advertise NUMA via ibm,associativity */
187 if (nb_numa_nodes
> 1) {
188 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
189 sizeof(associativity
));
195 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
197 int ret
= 0, offset
, cpus_offset
;
200 int smt
= kvmppc_smt_threads();
201 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
204 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
205 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
206 int index
= ppc_get_vcpu_dt_id(cpu
);
208 if ((index
% smt
) != 0) {
212 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
214 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
215 if (cpus_offset
< 0) {
216 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
218 if (cpus_offset
< 0) {
222 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
224 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
230 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
231 pft_size_prop
, sizeof(pft_size_prop
));
236 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
241 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
242 ppc_get_compat_smt_threads(cpu
));
251 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
254 size_t maxcells
= maxsize
/ sizeof(uint32_t);
258 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
259 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
261 if (!sps
->page_shift
) {
264 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
265 if (sps
->enc
[count
].page_shift
== 0) {
269 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
272 *(p
++) = cpu_to_be32(sps
->page_shift
);
273 *(p
++) = cpu_to_be32(sps
->slb_enc
);
274 *(p
++) = cpu_to_be32(count
);
275 for (j
= 0; j
< count
; j
++) {
276 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
277 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
281 return (p
- prop
) * sizeof(uint32_t);
284 static hwaddr
spapr_node0_size(void)
286 MachineState
*machine
= MACHINE(qdev_get_machine());
290 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
291 if (numa_info
[i
].node_mem
) {
292 return MIN(pow2floor(numa_info
[i
].node_mem
),
297 return machine
->ram_size
;
304 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
305 #exp, fdt_strerror(ret)); \
310 static void add_str(GString
*s
, const gchar
*s1
)
312 g_string_append_len(s
, s1
, strlen(s1
) + 1);
315 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
319 const char *kernel_cmdline
,
323 uint32_t start_prop
= cpu_to_be32(initrd_base
);
324 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
325 GString
*hypertas
= g_string_sized_new(256);
326 GString
*qemu_hypertas
= g_string_sized_new(256);
327 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
328 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
329 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
332 add_str(hypertas
, "hcall-pft");
333 add_str(hypertas
, "hcall-term");
334 add_str(hypertas
, "hcall-dabr");
335 add_str(hypertas
, "hcall-interrupt");
336 add_str(hypertas
, "hcall-tce");
337 add_str(hypertas
, "hcall-vio");
338 add_str(hypertas
, "hcall-splpar");
339 add_str(hypertas
, "hcall-bulk");
340 add_str(hypertas
, "hcall-set-mode");
341 add_str(qemu_hypertas
, "hcall-memop1");
343 fdt
= g_malloc0(FDT_MAX_SIZE
);
344 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
347 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
350 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
352 _FDT((fdt_finish_reservemap(fdt
)));
355 _FDT((fdt_begin_node(fdt
, "")));
356 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
357 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
358 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
361 * Add info to guest to indentify which host is it being run on
362 * and what is the uuid of the guest
364 if (kvmppc_get_host_model(&buf
)) {
365 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
368 if (kvmppc_get_host_serial(&buf
)) {
369 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
373 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
374 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
375 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
376 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
377 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
378 qemu_uuid
[14], qemu_uuid
[15]);
380 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
382 _FDT((fdt_property_string(fdt
, "system-id", buf
)));
386 if (qemu_get_vm_name()) {
387 _FDT((fdt_property_string(fdt
, "ibm,partition-name",
388 qemu_get_vm_name())));
391 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
392 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
395 _FDT((fdt_begin_node(fdt
, "chosen")));
397 /* Set Form1_affinity */
398 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
400 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
401 _FDT((fdt_property(fdt
, "linux,initrd-start",
402 &start_prop
, sizeof(start_prop
))));
403 _FDT((fdt_property(fdt
, "linux,initrd-end",
404 &end_prop
, sizeof(end_prop
))));
406 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
407 cpu_to_be64(kernel_size
) };
409 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
411 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
415 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
417 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
418 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
419 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
421 _FDT((fdt_end_node(fdt
)));
424 _FDT((fdt_begin_node(fdt
, "rtas")));
426 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
427 add_str(hypertas
, "hcall-multi-tce");
429 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
431 g_string_free(hypertas
, TRUE
);
432 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
433 qemu_hypertas
->len
)));
434 g_string_free(qemu_hypertas
, TRUE
);
436 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
437 refpoints
, sizeof(refpoints
))));
439 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
440 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
441 RTAS_EVENT_SCAN_RATE
)));
444 _FDT((fdt_property(fdt
, "ibm,change-msix-capable", NULL
, 0)));
448 * According to PAPR, rtas ibm,os-term does not guarantee a return
449 * back to the guest cpu.
451 * While an additional ibm,extended-os-term property indicates that
452 * rtas call return will always occur. Set this property.
454 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
456 _FDT((fdt_end_node(fdt
)));
458 /* interrupt controller */
459 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
461 _FDT((fdt_property_string(fdt
, "device_type",
462 "PowerPC-External-Interrupt-Presentation")));
463 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
464 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
465 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
466 interrupt_server_ranges_prop
,
467 sizeof(interrupt_server_ranges_prop
))));
468 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
469 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
470 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
472 _FDT((fdt_end_node(fdt
)));
475 _FDT((fdt_begin_node(fdt
, "vdevice")));
477 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
478 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
479 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
480 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
481 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
482 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
484 _FDT((fdt_end_node(fdt
)));
487 spapr_events_fdt_skel(fdt
, epow_irq
);
489 /* /hypervisor node */
491 uint8_t hypercall
[16];
493 /* indicate KVM hypercall interface */
494 _FDT((fdt_begin_node(fdt
, "hypervisor")));
495 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
496 if (kvmppc_has_cap_fixup_hcalls()) {
498 * Older KVM versions with older guest kernels were broken with the
499 * magic page, don't allow the guest to map it.
501 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
502 sizeof(hypercall
))) {
503 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
504 sizeof(hypercall
))));
507 _FDT((fdt_end_node(fdt
)));
510 _FDT((fdt_end_node(fdt
))); /* close root node */
511 _FDT((fdt_finish(fdt
)));
516 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
519 uint32_t associativity
[] = {
520 cpu_to_be32(0x4), /* length */
521 cpu_to_be32(0x0), cpu_to_be32(0x0),
522 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
525 uint64_t mem_reg_property
[2];
528 mem_reg_property
[0] = cpu_to_be64(start
);
529 mem_reg_property
[1] = cpu_to_be64(size
);
531 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
532 off
= fdt_add_subnode(fdt
, 0, mem_name
);
534 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
535 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
536 sizeof(mem_reg_property
))));
537 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
538 sizeof(associativity
))));
542 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
544 MachineState
*machine
= MACHINE(spapr
);
545 hwaddr mem_start
, node_size
;
546 int i
, nb_nodes
= nb_numa_nodes
;
547 NodeInfo
*nodes
= numa_info
;
550 /* No NUMA nodes, assume there is just one node with whole RAM */
551 if (!nb_numa_nodes
) {
553 ramnode
.node_mem
= machine
->ram_size
;
557 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
558 if (!nodes
[i
].node_mem
) {
561 if (mem_start
>= machine
->ram_size
) {
564 node_size
= nodes
[i
].node_mem
;
565 if (node_size
> machine
->ram_size
- mem_start
) {
566 node_size
= machine
->ram_size
- mem_start
;
570 /* ppc_spapr_init() checks for rma_size <= node0_size already */
571 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
572 mem_start
+= spapr
->rma_size
;
573 node_size
-= spapr
->rma_size
;
575 for ( ; node_size
; ) {
576 hwaddr sizetmp
= pow2floor(node_size
);
578 /* mem_start != 0 here */
579 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
580 sizetmp
= 1ULL << ctzl(mem_start
);
583 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
584 node_size
-= sizetmp
;
585 mem_start
+= sizetmp
;
592 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
593 sPAPRMachineState
*spapr
)
595 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
596 CPUPPCState
*env
= &cpu
->env
;
597 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
598 int index
= ppc_get_vcpu_dt_id(cpu
);
599 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
600 0xffffffff, 0xffffffff};
601 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
602 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
603 uint32_t page_sizes_prop
[64];
604 size_t page_sizes_prop_size
;
605 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
606 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
608 /* Note: we keep CI large pages off for now because a 64K capable guest
609 * provisioned with large pages might otherwise try to map a qemu
610 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
611 * even if that qemu runs on a 4k host.
613 * We can later add this bit back when we are confident this is not
614 * an issue (!HV KVM or 64K host)
616 uint8_t pa_features_206
[] = { 6, 0,
617 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
618 uint8_t pa_features_207
[] = { 24, 0,
619 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
620 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
621 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
622 0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
623 uint8_t *pa_features
;
626 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
627 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
629 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
630 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
631 env
->dcache_line_size
)));
632 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
633 env
->dcache_line_size
)));
634 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
635 env
->icache_line_size
)));
636 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
637 env
->icache_line_size
)));
639 if (pcc
->l1_dcache_size
) {
640 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
641 pcc
->l1_dcache_size
)));
643 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
645 if (pcc
->l1_icache_size
) {
646 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
647 pcc
->l1_icache_size
)));
649 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
652 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
653 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
654 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
655 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
656 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
657 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
659 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
660 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
663 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
664 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
665 segs
, sizeof(segs
))));
668 /* Advertise VMX/VSX (vector extensions) if available
669 * 0 / no property == no vector extensions
670 * 1 == VMX / Altivec available
671 * 2 == VSX available */
672 if (env
->insns_flags
& PPC_ALTIVEC
) {
673 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
675 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
678 /* Advertise DFP (Decimal Floating Point) if available
679 * 0 / no property == no DFP
680 * 1 == DFP available */
681 if (env
->insns_flags2
& PPC2_DFP
) {
682 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
685 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
686 sizeof(page_sizes_prop
));
687 if (page_sizes_prop_size
) {
688 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
689 page_sizes_prop
, page_sizes_prop_size
)));
692 /* Do the ibm,pa-features property, adjust it for ci-large-pages */
693 if (env
->mmu_model
== POWERPC_MMU_2_06
) {
694 pa_features
= pa_features_206
;
695 pa_size
= sizeof(pa_features_206
);
696 } else /* env->mmu_model == POWERPC_MMU_2_07 */ {
697 pa_features
= pa_features_207
;
698 pa_size
= sizeof(pa_features_207
);
700 if (env
->ci_large_pages
) {
701 pa_features
[3] |= 0x20;
703 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
705 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
706 cs
->cpu_index
/ vcpus_per_socket
)));
708 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
709 pft_size_prop
, sizeof(pft_size_prop
))));
711 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
713 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
714 ppc_get_compat_smt_threads(cpu
)));
717 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
722 int smt
= kvmppc_smt_threads();
724 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
726 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
727 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
730 * We walk the CPUs in reverse order to ensure that CPU DT nodes
731 * created by fdt_add_subnode() end up in the right order in FDT
732 * for the guest kernel the enumerate the CPUs correctly.
734 CPU_FOREACH_REVERSE(cs
) {
735 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
736 int index
= ppc_get_vcpu_dt_id(cpu
);
737 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
740 if ((index
% smt
) != 0) {
744 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
745 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
748 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
754 * Adds ibm,dynamic-reconfiguration-memory node.
755 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
756 * of this device tree node.
758 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
760 MachineState
*machine
= MACHINE(spapr
);
762 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
763 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
764 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
765 uint32_t *int_buf
, *cur_index
, buf_len
;
766 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
769 * Don't create the node if there are no DR LMBs.
776 * Allocate enough buffer size to fit in ibm,dynamic-memory
777 * or ibm,associativity-lookup-arrays
779 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
781 cur_index
= int_buf
= g_malloc0(buf_len
);
783 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
785 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
786 sizeof(prop_lmb_size
));
791 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
796 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
801 /* ibm,dynamic-memory */
802 int_buf
[0] = cpu_to_be32(nr_lmbs
);
804 for (i
= 0; i
< nr_lmbs
; i
++) {
805 sPAPRDRConnector
*drc
;
806 sPAPRDRConnectorClass
*drck
;
807 uint64_t addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;;
808 uint32_t *dynamic_memory
= cur_index
;
810 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
813 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
815 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
816 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
817 dynamic_memory
[2] = cpu_to_be32(drck
->get_index(drc
));
818 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
819 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
820 if (addr
< machine
->ram_size
||
821 memory_region_present(get_system_memory(), addr
)) {
822 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
824 dynamic_memory
[5] = cpu_to_be32(0);
827 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
829 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
834 /* ibm,associativity-lookup-arrays */
836 int_buf
[0] = cpu_to_be32(nr_nodes
);
837 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
839 for (i
= 0; i
< nr_nodes
; i
++) {
840 uint32_t associativity
[] = {
846 memcpy(cur_index
, associativity
, sizeof(associativity
));
849 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
850 (cur_index
- int_buf
) * sizeof(uint32_t));
856 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
857 target_ulong addr
, target_ulong size
,
858 bool cpu_update
, bool memory_update
)
860 void *fdt
, *fdt_skel
;
861 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
862 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
866 /* Create sceleton */
867 fdt_skel
= g_malloc0(size
);
868 _FDT((fdt_create(fdt_skel
, size
)));
869 _FDT((fdt_begin_node(fdt_skel
, "")));
870 _FDT((fdt_end_node(fdt_skel
)));
871 _FDT((fdt_finish(fdt_skel
)));
872 fdt
= g_malloc0(size
);
873 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
876 /* Fixup cpu nodes */
878 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
881 /* Generate ibm,dynamic-reconfiguration-memory node if required */
882 if (memory_update
&& smc
->dr_lmb_enabled
) {
883 _FDT((spapr_populate_drconf_memory(spapr
, fdt
)));
886 /* Pack resulting tree */
887 _FDT((fdt_pack(fdt
)));
889 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
890 trace_spapr_cas_failed(size
);
894 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
895 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
896 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
902 static void spapr_finalize_fdt(sPAPRMachineState
*spapr
,
907 MachineState
*machine
= MACHINE(qdev_get_machine());
908 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
909 const char *boot_device
= machine
->boot_order
;
916 fdt
= g_malloc(FDT_MAX_SIZE
);
918 /* open out the base tree into a temp buffer for the final tweaks */
919 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
921 ret
= spapr_populate_memory(spapr
, fdt
);
923 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
927 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
929 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
933 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
934 ret
= spapr_rng_populate_dt(fdt
);
936 fprintf(stderr
, "could not set up rng device in the fdt\n");
941 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
942 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
944 error_report("couldn't setup PCI devices in fdt");
950 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
952 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
956 spapr_populate_cpus_dt_node(fdt
, spapr
);
958 bootlist
= get_boot_devices_list(&cb
, true);
959 if (cb
&& bootlist
) {
960 int offset
= fdt_path_offset(fdt
, "/chosen");
964 for (i
= 0; i
< cb
; i
++) {
965 if (bootlist
[i
] == '\n') {
970 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
973 if (boot_device
&& strlen(boot_device
)) {
974 int offset
= fdt_path_offset(fdt
, "/chosen");
979 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
982 if (!spapr
->has_graphics
) {
983 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
986 if (smc
->dr_lmb_enabled
) {
987 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
990 _FDT((fdt_pack(fdt
)));
992 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
993 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
994 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
998 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
999 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1005 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1007 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1010 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
1012 CPUPPCState
*env
= &cpu
->env
;
1015 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1016 env
->gpr
[3] = H_PRIVILEGE
;
1018 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1022 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1023 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1024 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1025 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1026 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1029 * Get the fd to access the kernel htab, re-opening it if necessary
1031 static int get_htab_fd(sPAPRMachineState
*spapr
)
1033 if (spapr
->htab_fd
>= 0) {
1034 return spapr
->htab_fd
;
1037 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1038 if (spapr
->htab_fd
< 0) {
1039 error_report("Unable to open fd for reading hash table from KVM: %s",
1043 return spapr
->htab_fd
;
1046 static void close_htab_fd(sPAPRMachineState
*spapr
)
1048 if (spapr
->htab_fd
>= 0) {
1049 close(spapr
->htab_fd
);
1051 spapr
->htab_fd
= -1;
1054 static int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1058 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1059 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1060 * that's much more than is needed for Linux guests */
1061 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1062 shift
= MAX(shift
, 18); /* Minimum architected size */
1063 shift
= MIN(shift
, 46); /* Maximum architected size */
1067 static void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1072 /* Clean up any HPT info from a previous boot */
1073 g_free(spapr
->htab
);
1075 spapr
->htab_shift
= 0;
1076 close_htab_fd(spapr
);
1078 rc
= kvmppc_reset_htab(shift
);
1080 /* kernel-side HPT needed, but couldn't allocate one */
1081 error_setg_errno(errp
, errno
,
1082 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1084 /* This is almost certainly fatal, but if the caller really
1085 * wants to carry on with shift == 0, it's welcome to try */
1086 } else if (rc
> 0) {
1087 /* kernel-side HPT allocated */
1090 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1094 spapr
->htab_shift
= shift
;
1097 /* kernel-side HPT not needed, allocate in userspace instead */
1098 size_t size
= 1ULL << shift
;
1101 spapr
->htab
= qemu_memalign(size
, size
);
1103 error_setg_errno(errp
, errno
,
1104 "Could not allocate HPT of order %d", shift
);
1108 memset(spapr
->htab
, 0, size
);
1109 spapr
->htab_shift
= shift
;
1111 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1112 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1117 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1119 bool matched
= false;
1121 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1126 error_report("Device %s is not supported by this machine yet.",
1127 qdev_fw_name(DEVICE(sbdev
)));
1134 static void ppc_spapr_reset(void)
1136 MachineState
*machine
= MACHINE(qdev_get_machine());
1137 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1138 PowerPCCPU
*first_ppc_cpu
;
1139 uint32_t rtas_limit
;
1141 /* Check for unknown sysbus devices */
1142 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1144 /* Allocate and/or reset the hash page table */
1145 spapr_reallocate_hpt(spapr
,
1146 spapr_hpt_shift_for_ramsize(machine
->maxram_size
),
1149 /* Update the RMA size if necessary */
1150 if (spapr
->vrma_adjust
) {
1151 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
1155 qemu_devices_reset();
1158 * We place the device tree and RTAS just below either the top of the RMA,
1159 * or just below 2GB, whichever is lowere, so that it can be
1160 * processed with 32-bit real mode code if necessary
1162 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1163 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1164 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1167 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
1170 /* Copy RTAS over */
1171 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
1174 /* Set up the entry state */
1175 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1176 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
1177 first_ppc_cpu
->env
.gpr
[5] = 0;
1178 first_cpu
->halted
= 0;
1179 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1183 static void spapr_cpu_reset(void *opaque
)
1185 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
1186 PowerPCCPU
*cpu
= opaque
;
1187 CPUState
*cs
= CPU(cpu
);
1188 CPUPPCState
*env
= &cpu
->env
;
1192 /* All CPUs start halted. CPU0 is unhalted from the machine level
1193 * reset code and the rest are explicitly started up by the guest
1194 * using an RTAS call */
1197 env
->spr
[SPR_HIOR
] = 0;
1199 ppc_hash64_set_external_hpt(cpu
, spapr
->htab
, spapr
->htab_shift
,
1203 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1205 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1206 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1209 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1213 qdev_init_nofail(dev
);
1215 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1218 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1220 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1222 qdev_init_nofail(dev
);
1225 object_property_add_alias(qdev_get_machine(), "rtc-time",
1226 OBJECT(spapr
->rtc
), "date", NULL
);
1229 /* Returns whether we want to use VGA or not */
1230 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1232 switch (vga_interface_type
) {
1239 return pci_vga_init(pci_bus
) != NULL
;
1242 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1247 static int spapr_post_load(void *opaque
, int version_id
)
1249 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1252 /* In earlier versions, there was no separate qdev for the PAPR
1253 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1254 * So when migrating from those versions, poke the incoming offset
1255 * value into the RTC device */
1256 if (version_id
< 3) {
1257 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1263 static bool version_before_3(void *opaque
, int version_id
)
1265 return version_id
< 3;
1268 static const VMStateDescription vmstate_spapr
= {
1271 .minimum_version_id
= 1,
1272 .post_load
= spapr_post_load
,
1273 .fields
= (VMStateField
[]) {
1274 /* used to be @next_irq */
1275 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1278 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1280 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1281 VMSTATE_END_OF_LIST()
1285 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1287 sPAPRMachineState
*spapr
= opaque
;
1289 /* "Iteration" header */
1290 qemu_put_be32(f
, spapr
->htab_shift
);
1293 spapr
->htab_save_index
= 0;
1294 spapr
->htab_first_pass
= true;
1296 assert(kvm_enabled());
1303 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1306 bool has_timeout
= max_ns
!= -1;
1307 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1308 int index
= spapr
->htab_save_index
;
1309 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1311 assert(spapr
->htab_first_pass
);
1316 /* Consume invalid HPTEs */
1317 while ((index
< htabslots
)
1318 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1320 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1323 /* Consume valid HPTEs */
1325 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1326 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1328 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1331 if (index
> chunkstart
) {
1332 int n_valid
= index
- chunkstart
;
1334 qemu_put_be32(f
, chunkstart
);
1335 qemu_put_be16(f
, n_valid
);
1336 qemu_put_be16(f
, 0);
1337 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1338 HASH_PTE_SIZE_64
* n_valid
);
1341 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1345 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1347 if (index
>= htabslots
) {
1348 assert(index
== htabslots
);
1350 spapr
->htab_first_pass
= false;
1352 spapr
->htab_save_index
= index
;
1355 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1358 bool final
= max_ns
< 0;
1359 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1360 int examined
= 0, sent
= 0;
1361 int index
= spapr
->htab_save_index
;
1362 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1364 assert(!spapr
->htab_first_pass
);
1367 int chunkstart
, invalidstart
;
1369 /* Consume non-dirty HPTEs */
1370 while ((index
< htabslots
)
1371 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1377 /* Consume valid dirty HPTEs */
1378 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1379 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1380 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1381 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1386 invalidstart
= index
;
1387 /* Consume invalid dirty HPTEs */
1388 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1389 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1390 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1391 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1396 if (index
> chunkstart
) {
1397 int n_valid
= invalidstart
- chunkstart
;
1398 int n_invalid
= index
- invalidstart
;
1400 qemu_put_be32(f
, chunkstart
);
1401 qemu_put_be16(f
, n_valid
);
1402 qemu_put_be16(f
, n_invalid
);
1403 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1404 HASH_PTE_SIZE_64
* n_valid
);
1405 sent
+= index
- chunkstart
;
1407 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1412 if (examined
>= htabslots
) {
1416 if (index
>= htabslots
) {
1417 assert(index
== htabslots
);
1420 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1422 if (index
>= htabslots
) {
1423 assert(index
== htabslots
);
1427 spapr
->htab_save_index
= index
;
1429 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1432 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1433 #define MAX_KVM_BUF_SIZE 2048
1435 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1437 sPAPRMachineState
*spapr
= opaque
;
1441 /* Iteration header */
1442 qemu_put_be32(f
, 0);
1445 assert(kvm_enabled());
1447 fd
= get_htab_fd(spapr
);
1452 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1456 } else if (spapr
->htab_first_pass
) {
1457 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1459 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1463 qemu_put_be32(f
, 0);
1464 qemu_put_be16(f
, 0);
1465 qemu_put_be16(f
, 0);
1470 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1472 sPAPRMachineState
*spapr
= opaque
;
1475 /* Iteration header */
1476 qemu_put_be32(f
, 0);
1481 assert(kvm_enabled());
1483 fd
= get_htab_fd(spapr
);
1488 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
1492 close_htab_fd(spapr
);
1494 if (spapr
->htab_first_pass
) {
1495 htab_save_first_pass(f
, spapr
, -1);
1497 htab_save_later_pass(f
, spapr
, -1);
1501 qemu_put_be32(f
, 0);
1502 qemu_put_be16(f
, 0);
1503 qemu_put_be16(f
, 0);
1508 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1510 sPAPRMachineState
*spapr
= opaque
;
1511 uint32_t section_hdr
;
1514 if (version_id
< 1 || version_id
> 1) {
1515 error_report("htab_load() bad version");
1519 section_hdr
= qemu_get_be32(f
);
1522 Error
*local_err
= NULL
;
1524 /* First section gives the htab size */
1525 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
1527 error_report_err(local_err
);
1534 assert(kvm_enabled());
1536 fd
= kvmppc_get_htab_fd(true);
1538 error_report("Unable to open fd to restore KVM hash table: %s",
1545 uint16_t n_valid
, n_invalid
;
1547 index
= qemu_get_be32(f
);
1548 n_valid
= qemu_get_be16(f
);
1549 n_invalid
= qemu_get_be16(f
);
1551 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1556 if ((index
+ n_valid
+ n_invalid
) >
1557 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1558 /* Bad index in stream */
1560 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
1561 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
1567 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1568 HASH_PTE_SIZE_64
* n_valid
);
1571 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1572 HASH_PTE_SIZE_64
* n_invalid
);
1579 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1594 static SaveVMHandlers savevm_htab_handlers
= {
1595 .save_live_setup
= htab_save_setup
,
1596 .save_live_iterate
= htab_save_iterate
,
1597 .save_live_complete_precopy
= htab_save_complete
,
1598 .load_state
= htab_load
,
1601 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1604 MachineState
*machine
= MACHINE(qdev_get_machine());
1605 machine
->boot_order
= g_strdup(boot_device
);
1608 static void spapr_cpu_init(sPAPRMachineState
*spapr
, PowerPCCPU
*cpu
,
1611 CPUPPCState
*env
= &cpu
->env
;
1613 /* Set time-base frequency to 512 MHz */
1614 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1616 /* Enable PAPR mode in TCG or KVM */
1617 cpu_ppc_set_papr(cpu
);
1619 if (cpu
->max_compat
) {
1620 Error
*local_err
= NULL
;
1622 ppc_set_compat(cpu
, cpu
->max_compat
, &local_err
);
1624 error_propagate(errp
, local_err
);
1629 xics_cpu_setup(spapr
->icp
, cpu
);
1631 qemu_register_reset(spapr_cpu_reset
, cpu
);
1635 * Reset routine for LMB DR devices.
1637 * Unlike PCI DR devices, LMB DR devices explicitly register this reset
1638 * routine. Reset for PCI DR devices will be handled by PHB reset routine
1639 * when it walks all its children devices. LMB devices reset occurs
1640 * as part of spapr_ppc_reset().
1642 static void spapr_drc_reset(void *opaque
)
1644 sPAPRDRConnector
*drc
= opaque
;
1645 DeviceState
*d
= DEVICE(drc
);
1652 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
1654 MachineState
*machine
= MACHINE(spapr
);
1655 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
1656 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
1659 for (i
= 0; i
< nr_lmbs
; i
++) {
1660 sPAPRDRConnector
*drc
;
1663 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
1664 drc
= spapr_dr_connector_new(OBJECT(spapr
), SPAPR_DR_CONNECTOR_TYPE_LMB
,
1666 qemu_register_reset(spapr_drc_reset
, drc
);
1671 * If RAM size, maxmem size and individual node mem sizes aren't aligned
1672 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
1673 * since we can't support such unaligned sizes with DRCONF_MEMORY.
1675 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
1679 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1680 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
1681 " is not aligned to %llu MiB",
1683 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1687 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
1688 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
1689 " is not aligned to %llu MiB",
1691 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1695 for (i
= 0; i
< nb_numa_nodes
; i
++) {
1696 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
1698 "Node %d memory size 0x%" PRIx64
1699 " is not aligned to %llu MiB",
1700 i
, numa_info
[i
].node_mem
,
1701 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
1707 /* pSeries LPAR / sPAPR hardware init */
1708 static void ppc_spapr_init(MachineState
*machine
)
1710 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1711 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1712 const char *kernel_filename
= machine
->kernel_filename
;
1713 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1714 const char *initrd_filename
= machine
->initrd_filename
;
1718 MemoryRegion
*sysmem
= get_system_memory();
1719 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1720 MemoryRegion
*rma_region
;
1722 hwaddr rma_alloc_size
;
1723 hwaddr node0_size
= spapr_node0_size();
1724 uint32_t initrd_base
= 0;
1725 long kernel_size
= 0, initrd_size
= 0;
1726 long load_limit
, fw_size
;
1727 bool kernel_le
= false;
1730 msi_nonbroken
= true;
1732 QLIST_INIT(&spapr
->phbs
);
1734 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1736 /* Allocate RMA if necessary */
1737 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1739 if (rma_alloc_size
== -1) {
1740 error_report("Unable to create RMA");
1744 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1745 spapr
->rma_size
= rma_alloc_size
;
1747 spapr
->rma_size
= node0_size
;
1749 /* With KVM, we don't actually know whether KVM supports an
1750 * unbounded RMA (PR KVM) or is limited by the hash table size
1751 * (HV KVM using VRMA), so we always assume the latter
1753 * In that case, we also limit the initial allocations for RTAS
1754 * etc... to 256M since we have no way to know what the VRMA size
1755 * is going to be as it depends on the size of the hash table
1756 * isn't determined yet.
1758 if (kvm_enabled()) {
1759 spapr
->vrma_adjust
= 1;
1760 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1764 if (spapr
->rma_size
> node0_size
) {
1765 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
1770 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1771 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1773 /* Set up Interrupt Controller before we create the VCPUs */
1774 spapr
->icp
= xics_system_init(machine
,
1775 DIV_ROUND_UP(max_cpus
* kvmppc_smt_threads(),
1777 XICS_IRQS
, &error_fatal
);
1779 if (smc
->dr_lmb_enabled
) {
1780 spapr_validate_node_memory(machine
, &error_fatal
);
1784 if (machine
->cpu_model
== NULL
) {
1785 machine
->cpu_model
= kvm_enabled() ? "host" : "POWER7";
1787 for (i
= 0; i
< smp_cpus
; i
++) {
1788 cpu
= cpu_ppc_init(machine
->cpu_model
);
1790 error_report("Unable to find PowerPC CPU definition");
1793 spapr_cpu_init(spapr
, cpu
, &error_fatal
);
1796 if (kvm_enabled()) {
1797 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1798 kvmppc_enable_logical_ci_hcalls();
1799 kvmppc_enable_set_mode_hcall();
1803 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1805 memory_region_add_subregion(sysmem
, 0, ram
);
1807 if (rma_alloc_size
&& rma
) {
1808 rma_region
= g_new(MemoryRegion
, 1);
1809 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1810 rma_alloc_size
, rma
);
1811 vmstate_register_ram_global(rma_region
);
1812 memory_region_add_subregion(sysmem
, 0, rma_region
);
1815 /* initialize hotplug memory address space */
1816 if (machine
->ram_size
< machine
->maxram_size
) {
1817 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
1819 if (machine
->ram_slots
> SPAPR_MAX_RAM_SLOTS
) {
1820 error_report("Specified number of memory slots %"
1821 PRIu64
" exceeds max supported %d",
1822 machine
->ram_slots
, SPAPR_MAX_RAM_SLOTS
);
1826 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
1827 SPAPR_HOTPLUG_MEM_ALIGN
);
1828 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
1829 "hotplug-memory", hotplug_mem_size
);
1830 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
1831 &spapr
->hotplug_memory
.mr
);
1834 if (smc
->dr_lmb_enabled
) {
1835 spapr_create_lmb_dr_connectors(spapr
);
1838 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1840 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1843 spapr
->rtas_size
= get_image_size(filename
);
1844 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1845 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1846 error_report("Could not load LPAR rtas '%s'", filename
);
1849 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1850 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1851 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1856 /* Set up EPOW events infrastructure */
1857 spapr_events_init(spapr
);
1859 /* Set up the RTC RTAS interfaces */
1860 spapr_rtc_create(spapr
);
1862 /* Set up VIO bus */
1863 spapr
->vio_bus
= spapr_vio_bus_init();
1865 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1866 if (serial_hds
[i
]) {
1867 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1871 /* We always have at least the nvram device on VIO */
1872 spapr_create_nvram(spapr
);
1875 spapr_pci_rtas_init();
1877 phb
= spapr_create_phb(spapr
, 0);
1879 for (i
= 0; i
< nb_nics
; i
++) {
1880 NICInfo
*nd
= &nd_table
[i
];
1883 nd
->model
= g_strdup("ibmveth");
1886 if (strcmp(nd
->model
, "ibmveth") == 0) {
1887 spapr_vlan_create(spapr
->vio_bus
, nd
);
1889 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1893 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1894 spapr_vscsi_create(spapr
->vio_bus
);
1898 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
1899 spapr
->has_graphics
= true;
1900 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1904 if (smc
->use_ohci_by_default
) {
1905 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1907 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
1910 if (spapr
->has_graphics
) {
1911 USBBus
*usb_bus
= usb_bus_find(-1);
1913 usb_create_simple(usb_bus
, "usb-kbd");
1914 usb_create_simple(usb_bus
, "usb-mouse");
1918 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1920 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
1925 if (kernel_filename
) {
1926 uint64_t lowaddr
= 0;
1928 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1929 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
1931 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1932 kernel_size
= load_elf(kernel_filename
,
1933 translate_kernel_address
, NULL
,
1934 NULL
, &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
1936 kernel_le
= kernel_size
> 0;
1938 if (kernel_size
< 0) {
1939 error_report("error loading %s: %s",
1940 kernel_filename
, load_elf_strerror(kernel_size
));
1945 if (initrd_filename
) {
1946 /* Try to locate the initrd in the gap between the kernel
1947 * and the firmware. Add a bit of space just in case
1949 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1950 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1951 load_limit
- initrd_base
);
1952 if (initrd_size
< 0) {
1953 error_report("could not load initial ram disk '%s'",
1963 if (bios_name
== NULL
) {
1964 bios_name
= FW_FILE_NAME
;
1966 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1968 error_report("Could not find LPAR firmware '%s'", bios_name
);
1971 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1973 error_report("Could not load LPAR firmware '%s'", filename
);
1978 /* FIXME: Should register things through the MachineState's qdev
1979 * interface, this is a legacy from the sPAPREnvironment structure
1980 * which predated MachineState but had a similar function */
1981 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1982 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1983 &savevm_htab_handlers
, spapr
);
1985 /* Prepare the device tree */
1986 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1987 kernel_size
, kernel_le
,
1989 spapr
->check_exception_irq
);
1990 assert(spapr
->fdt_skel
!= NULL
);
1993 QTAILQ_INIT(&spapr
->ccs_list
);
1994 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
1996 qemu_register_boot_set(spapr_boot_set
, spapr
);
1999 static int spapr_kvm_type(const char *vm_type
)
2005 if (!strcmp(vm_type
, "HV")) {
2009 if (!strcmp(vm_type
, "PR")) {
2013 error_report("Unknown kvm-type specified '%s'", vm_type
);
2018 * Implementation of an interface to adjust firmware path
2019 * for the bootindex property handling.
2021 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2024 #define CAST(type, obj, name) \
2025 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2026 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2027 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2030 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2031 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2032 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2036 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2037 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2038 * in the top 16 bits of the 64-bit LUN
2040 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2041 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2042 (uint64_t)id
<< 48);
2043 } else if (virtio
) {
2045 * We use SRP luns of the form 01000000 | (target << 8) | lun
2046 * in the top 32 bits of the 64-bit LUN
2047 * Note: the quote above is from SLOF and it is wrong,
2048 * the actual binding is:
2049 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2051 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2052 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2053 (uint64_t)id
<< 32);
2056 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2057 * in the top 32 bits of the 64-bit LUN
2059 unsigned usb_port
= atoi(usb
->port
->path
);
2060 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2061 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2062 (uint64_t)id
<< 32);
2067 /* Replace "pci" with "pci@800000020000000" */
2068 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2074 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2076 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2078 return g_strdup(spapr
->kvm_type
);
2081 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2083 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2085 g_free(spapr
->kvm_type
);
2086 spapr
->kvm_type
= g_strdup(value
);
2089 static void spapr_machine_initfn(Object
*obj
)
2091 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2093 spapr
->htab_fd
= -1;
2094 object_property_add_str(obj
, "kvm-type",
2095 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2096 object_property_set_description(obj
, "kvm-type",
2097 "Specifies the KVM virtualization mode (HV, PR)",
2101 static void spapr_machine_finalizefn(Object
*obj
)
2103 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2105 g_free(spapr
->kvm_type
);
2108 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
2112 cpu_synchronize_state(cs
);
2113 ppc_cpu_do_system_reset(cs
);
2116 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2121 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
2125 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr
, uint64_t size
,
2126 uint32_t node
, Error
**errp
)
2128 sPAPRDRConnector
*drc
;
2129 sPAPRDRConnectorClass
*drck
;
2130 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2131 int i
, fdt_offset
, fdt_size
;
2135 * Check for DRC connectors and send hotplug notification to the
2136 * guest only in case of hotplugged memory. This allows cold plugged
2137 * memory to be specified at boot time.
2139 if (!dev
->hotplugged
) {
2143 for (i
= 0; i
< nr_lmbs
; i
++) {
2144 drc
= spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2145 addr
/SPAPR_MEMORY_BLOCK_SIZE
);
2148 fdt
= create_device_tree(&fdt_size
);
2149 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2150 SPAPR_MEMORY_BLOCK_SIZE
);
2152 drck
= SPAPR_DR_CONNECTOR_GET_CLASS(drc
);
2153 drck
->attach(drc
, dev
, fdt
, fdt_offset
, !dev
->hotplugged
, errp
);
2154 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2156 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
, nr_lmbs
);
2159 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2160 uint32_t node
, Error
**errp
)
2162 Error
*local_err
= NULL
;
2163 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2164 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2165 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2166 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
);
2167 uint64_t align
= memory_region_get_alignment(mr
);
2168 uint64_t size
= memory_region_size(mr
);
2171 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2172 error_setg(&local_err
, "Hotplugged memory size must be a multiple of "
2173 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/M_BYTE
);
2177 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2182 addr
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
, &local_err
);
2184 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2188 spapr_add_lmbs(dev
, addr
, size
, node
, &error_abort
);
2191 error_propagate(errp
, local_err
);
2194 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
2195 DeviceState
*dev
, Error
**errp
)
2197 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(qdev_get_machine());
2199 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2202 if (!smc
->dr_lmb_enabled
) {
2203 error_setg(errp
, "Memory hotplug not supported for this machine");
2206 node
= object_property_get_int(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
2210 if (node
< 0 || node
>= MAX_NODES
) {
2211 error_setg(errp
, "Invaild node %d", node
);
2216 * Currently PowerPC kernel doesn't allow hot-adding memory to
2217 * memory-less node, but instead will silently add the memory
2218 * to the first node that has some memory. This causes two
2219 * unexpected behaviours for the user.
2221 * - Memory gets hotplugged to a different node than what the user
2223 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
2224 * to memory-less node, a reboot will set things accordingly
2225 * and the previously hotplugged memory now ends in the right node.
2226 * This appears as if some memory moved from one node to another.
2228 * So until kernel starts supporting memory hotplug to memory-less
2229 * nodes, just prevent such attempts upfront in QEMU.
2231 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
2232 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
2237 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
2241 static void spapr_machine_device_unplug(HotplugHandler
*hotplug_dev
,
2242 DeviceState
*dev
, Error
**errp
)
2244 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2245 error_setg(errp
, "Memory hot unplug not supported by sPAPR");
2249 static HotplugHandler
*spapr_get_hotpug_handler(MachineState
*machine
,
2252 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
2253 return HOTPLUG_HANDLER(machine
);
2258 static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index
)
2260 /* Allocate to NUMA nodes on a "socket" basis (not that concept of
2261 * socket means much for the paravirtualized PAPR platform) */
2262 return cpu_index
/ smp_threads
/ smp_cores
;
2265 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
2267 MachineClass
*mc
= MACHINE_CLASS(oc
);
2268 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
2269 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
2270 NMIClass
*nc
= NMI_CLASS(oc
);
2271 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
2273 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
2276 * We set up the default / latest behaviour here. The class_init
2277 * functions for the specific versioned machine types can override
2278 * these details for backwards compatibility
2280 mc
->init
= ppc_spapr_init
;
2281 mc
->reset
= ppc_spapr_reset
;
2282 mc
->block_default_type
= IF_SCSI
;
2283 mc
->max_cpus
= MAX_CPUMASK_BITS
;
2284 mc
->no_parallel
= 1;
2285 mc
->default_boot_order
= "";
2286 mc
->default_ram_size
= 512 * M_BYTE
;
2287 mc
->kvm_type
= spapr_kvm_type
;
2288 mc
->has_dynamic_sysbus
= true;
2289 mc
->pci_allow_0_address
= true;
2290 mc
->get_hotplug_handler
= spapr_get_hotpug_handler
;
2291 hc
->plug
= spapr_machine_device_plug
;
2292 hc
->unplug
= spapr_machine_device_unplug
;
2293 mc
->cpu_index_to_socket_id
= spapr_cpu_index_to_socket_id
;
2295 smc
->dr_lmb_enabled
= true;
2296 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
2297 nc
->nmi_monitor_handler
= spapr_nmi
;
2300 static const TypeInfo spapr_machine_info
= {
2301 .name
= TYPE_SPAPR_MACHINE
,
2302 .parent
= TYPE_MACHINE
,
2304 .instance_size
= sizeof(sPAPRMachineState
),
2305 .instance_init
= spapr_machine_initfn
,
2306 .instance_finalize
= spapr_machine_finalizefn
,
2307 .class_size
= sizeof(sPAPRMachineClass
),
2308 .class_init
= spapr_machine_class_init
,
2309 .interfaces
= (InterfaceInfo
[]) {
2310 { TYPE_FW_PATH_PROVIDER
},
2312 { TYPE_HOTPLUG_HANDLER
},
2317 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
2318 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
2321 MachineClass *mc = MACHINE_CLASS(oc); \
2322 spapr_machine_##suffix##_class_options(mc); \
2324 mc->alias = "pseries"; \
2325 mc->is_default = 1; \
2328 static void spapr_machine_##suffix##_instance_init(Object *obj) \
2330 MachineState *machine = MACHINE(obj); \
2331 spapr_machine_##suffix##_instance_options(machine); \
2333 static const TypeInfo spapr_machine_##suffix##_info = { \
2334 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
2335 .parent = TYPE_SPAPR_MACHINE, \
2336 .class_init = spapr_machine_##suffix##_class_init, \
2337 .instance_init = spapr_machine_##suffix##_instance_init, \
2339 static void spapr_machine_register_##suffix(void) \
2341 type_register(&spapr_machine_##suffix##_info); \
2343 type_init(spapr_machine_register_##suffix)
2348 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
2352 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
2354 /* Defaults for the latest behaviour inherited from the base class */
2357 DEFINE_SPAPR_MACHINE(2_6
, "2.6", true);
2362 #define SPAPR_COMPAT_2_5 \
2365 .driver = "spapr-vlan", \
2366 .property = "use-rx-buffer-pools", \
2370 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
2374 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
2376 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2378 spapr_machine_2_6_class_options(mc
);
2379 smc
->use_ohci_by_default
= true;
2380 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
2383 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
2388 #define SPAPR_COMPAT_2_4 \
2392 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
2394 spapr_machine_2_5_instance_options(machine
);
2397 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
2399 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
2401 spapr_machine_2_5_class_options(mc
);
2402 smc
->dr_lmb_enabled
= false;
2403 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
2406 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
2411 #define SPAPR_COMPAT_2_3 \
2415 .driver = "spapr-pci-host-bridge",\
2416 .property = "dynamic-reconfiguration",\
2420 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
2422 spapr_machine_2_4_instance_options(machine
);
2423 savevm_skip_section_footers();
2424 global_state_set_optional();
2425 savevm_skip_configuration();
2428 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
2430 spapr_machine_2_4_class_options(mc
);
2431 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
2433 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
2439 #define SPAPR_COMPAT_2_2 \
2443 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
2444 .property = "mem_win_size",\
2445 .value = "0x20000000",\
2448 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
2450 spapr_machine_2_3_instance_options(machine
);
2451 machine
->suppress_vmdesc
= true;
2454 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
2456 spapr_machine_2_3_class_options(mc
);
2457 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
2459 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
2464 #define SPAPR_COMPAT_2_1 \
2468 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
2470 spapr_machine_2_2_instance_options(machine
);
2473 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
2475 spapr_machine_2_2_class_options(mc
);
2476 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
2478 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
2480 static void spapr_machine_register_types(void)
2482 type_register_static(&spapr_machine_info
);
2485 type_init(spapr_machine_register_types
)