4 * Copyright (c) 2010-2012 Guan Xuetao
5 * Copyright (c) 2012 SUSE LINUX Products GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Contributions from 2012-04-01 on are considered under GPL version 2,
12 * or (at your option) any later version.
16 #include "qemu-common.h"
17 #include "migration/vmstate.h"
19 static void uc32_cpu_set_pc(CPUState
*cs
, vaddr value
)
21 UniCore32CPU
*cpu
= UNICORE32_CPU(cs
);
23 cpu
->env
.regs
[31] = value
;
26 static inline void set_feature(CPUUniCore32State
*env
, int feature
)
28 env
->features
|= feature
;
33 static ObjectClass
*uc32_cpu_class_by_name(const char *cpu_model
)
38 if (cpu_model
== NULL
) {
42 typename
= g_strdup_printf("%s-" TYPE_UNICORE32_CPU
, cpu_model
);
43 oc
= object_class_by_name(typename
);
45 if (oc
!= NULL
&& (!object_class_dynamic_cast(oc
, TYPE_UNICORE32_CPU
) ||
46 object_class_is_abstract(oc
))) {
52 typedef struct UniCore32CPUInfo
{
54 void (*instance_init
)(Object
*obj
);
57 static void unicore_ii_cpu_initfn(Object
*obj
)
59 UniCore32CPU
*cpu
= UNICORE32_CPU(obj
);
60 CPUUniCore32State
*env
= &cpu
->env
;
62 env
->cp0
.c0_cpuid
= 0x4d000863;
63 env
->cp0
.c0_cachetype
= 0x0d152152;
64 env
->cp0
.c1_sys
= 0x2000;
65 env
->cp0
.c2_base
= 0x0;
66 env
->cp0
.c3_faultstatus
= 0x0;
67 env
->cp0
.c4_faultaddr
= 0x0;
68 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = 0;
70 set_feature(env
, UC32_HWCAP_CMOV
);
71 set_feature(env
, UC32_HWCAP_UCF64
);
74 static void uc32_any_cpu_initfn(Object
*obj
)
76 UniCore32CPU
*cpu
= UNICORE32_CPU(obj
);
77 CPUUniCore32State
*env
= &cpu
->env
;
79 env
->cp0
.c0_cpuid
= 0xffffffff;
80 env
->ucf64
.xregs
[UC32_UCF64_FPSCR
] = 0;
82 set_feature(env
, UC32_HWCAP_CMOV
);
83 set_feature(env
, UC32_HWCAP_UCF64
);
86 static const UniCore32CPUInfo uc32_cpus
[] = {
87 { .name
= "UniCore-II", .instance_init
= unicore_ii_cpu_initfn
},
88 { .name
= "any", .instance_init
= uc32_any_cpu_initfn
},
91 static void uc32_cpu_realizefn(DeviceState
*dev
, Error
**errp
)
93 UniCore32CPUClass
*ucc
= UNICORE32_CPU_GET_CLASS(dev
);
95 qemu_init_vcpu(CPU(dev
));
97 ucc
->parent_realize(dev
, errp
);
100 static void uc32_cpu_initfn(Object
*obj
)
102 CPUState
*cs
= CPU(obj
);
103 UniCore32CPU
*cpu
= UNICORE32_CPU(obj
);
104 CPUUniCore32State
*env
= &cpu
->env
;
110 #ifdef CONFIG_USER_ONLY
111 env
->uncached_asr
= ASR_MODE_USER
;
114 env
->uncached_asr
= ASR_MODE_PRIV
;
115 env
->regs
[31] = 0x03000000;
120 if (tcg_enabled() && !inited
) {
122 uc32_translate_init();
126 static const VMStateDescription vmstate_uc32_cpu
= {
131 static void uc32_cpu_class_init(ObjectClass
*oc
, void *data
)
133 DeviceClass
*dc
= DEVICE_CLASS(oc
);
134 CPUClass
*cc
= CPU_CLASS(oc
);
135 UniCore32CPUClass
*ucc
= UNICORE32_CPU_CLASS(oc
);
137 ucc
->parent_realize
= dc
->realize
;
138 dc
->realize
= uc32_cpu_realizefn
;
140 cc
->class_by_name
= uc32_cpu_class_by_name
;
141 cc
->do_interrupt
= uc32_cpu_do_interrupt
;
142 cc
->dump_state
= uc32_cpu_dump_state
;
143 cc
->set_pc
= uc32_cpu_set_pc
;
144 #ifndef CONFIG_USER_ONLY
145 cc
->get_phys_page_debug
= uc32_cpu_get_phys_page_debug
;
147 dc
->vmsd
= &vmstate_uc32_cpu
;
150 static void uc32_register_cpu_type(const UniCore32CPUInfo
*info
)
152 TypeInfo type_info
= {
153 .parent
= TYPE_UNICORE32_CPU
,
154 .instance_init
= info
->instance_init
,
157 type_info
.name
= g_strdup_printf("%s-" TYPE_UNICORE32_CPU
, info
->name
);
158 type_register(&type_info
);
159 g_free((void *)type_info
.name
);
162 static const TypeInfo uc32_cpu_type_info
= {
163 .name
= TYPE_UNICORE32_CPU
,
165 .instance_size
= sizeof(UniCore32CPU
),
166 .instance_init
= uc32_cpu_initfn
,
168 .class_size
= sizeof(UniCore32CPUClass
),
169 .class_init
= uc32_cpu_class_init
,
172 static void uc32_cpu_register_types(void)
176 type_register_static(&uc32_cpu_type_info
);
177 for (i
= 0; i
< ARRAY_SIZE(uc32_cpus
); i
++) {
178 uc32_register_cpu_type(&uc32_cpus
[i
]);
182 type_init(uc32_cpu_register_types
)