4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #include "host-utils.h"
26 //#define CRIS_OP_HELPER_DEBUG
29 #ifdef CRIS_OP_HELPER_DEBUG
31 #define D_LOG(...) qemu_log(__VA__ARGS__)
34 #define D_LOG(...) do { } while (0)
37 #if !defined(CONFIG_USER_ONLY)
39 #define MMUSUFFIX _mmu
42 #include "softmmu_template.h"
45 #include "softmmu_template.h"
48 #include "softmmu_template.h"
51 #include "softmmu_template.h"
53 /* Try to fill the TLB and return an exception if error. If retaddr is
54 NULL, it means that the function was called in C code (i.e. not
55 from generated code or from helper.c) */
56 /* XXX: fix it to restore all registers */
57 void tlb_fill (target_ulong addr
, int is_write
, int mmu_idx
, void *retaddr
)
64 /* XXX: hack to restore env in all cases, even if not called from
69 D_LOG("%s pc=%x tpc=%x ra=%x\n", __func__
,
70 env
->pc
, env
->debug1
, retaddr
);
71 ret
= cpu_cris_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
, 1);
74 /* now we have a real cpu fault */
75 pc
= (unsigned long)retaddr
;
78 /* the PC is inside the translated code. It means that we have
79 a virtual CPU fault */
80 cpu_restore_state(tb
, env
, pc
, NULL
);
82 /* Evaluate flags after retranslation. */
83 helper_top_evaluate_flags();
93 void helper_raise_exception(uint32_t index
)
95 env
->exception_index
= index
;
99 void helper_tlb_flush_pid(uint32_t pid
)
101 #if !defined(CONFIG_USER_ONLY)
103 if (pid
!= (env
->pregs
[PR_PID
] & 0xff))
104 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
108 void helper_spc_write(uint32_t new_spc
)
110 #if !defined(CONFIG_USER_ONLY)
111 tlb_flush_page(env
, env
->pregs
[PR_SPC
]);
112 tlb_flush_page(env
, new_spc
);
116 void helper_dump(uint32_t a0
, uint32_t a1
, uint32_t a2
)
118 qemu_log("%s: a0=%x a1=%x\n", __func__
, a0
, a1
);
121 /* Used by the tlb decoder. */
122 #define EXTRACT_FIELD(src, start, end) \
123 (((src) >> start) & ((1 << (end - start + 1)) - 1))
125 void helper_movl_sreg_reg (uint32_t sreg
, uint32_t reg
)
128 srs
= env
->pregs
[PR_SRS
];
130 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
132 #if !defined(CONFIG_USER_ONLY)
133 if (srs
== 1 || srs
== 2) {
135 /* Writes to tlb-hi write to mm_cause as a side
137 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
138 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
140 else if (sreg
== 5) {
147 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
152 /* We've just made a write to tlb_lo. */
153 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
154 /* Writes are done via r_mm_cause. */
155 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
157 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].hi
,
159 vaddr
<<= TARGET_PAGE_BITS
;
160 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].lo
,
162 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
163 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
165 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
166 vaddr
, tlb_v
, env
->pc
);
167 tlb_flush_page(env
, vaddr
);
173 void helper_movl_reg_sreg (uint32_t reg
, uint32_t sreg
)
176 env
->pregs
[PR_SRS
] &= 3;
177 srs
= env
->pregs
[PR_SRS
];
179 #if !defined(CONFIG_USER_ONLY)
180 if (srs
== 1 || srs
== 2)
186 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
191 /* Update the mirror regs. */
192 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
193 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
194 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
195 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
198 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
201 static void cris_ccs_rshift(CPUState
*env
)
205 /* Apply the ccs shift. */
206 ccs
= env
->pregs
[PR_CCS
];
207 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
210 /* Enter user mode. */
211 env
->ksp
= env
->regs
[R_SP
];
212 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
215 env
->pregs
[PR_CCS
] = ccs
;
218 void helper_rfe(void)
220 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
222 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
223 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
227 cris_ccs_rshift(env
);
229 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
231 env
->pregs
[PR_CCS
] |= P_FLAG
;
234 void helper_rfn(void)
236 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
238 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
239 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
243 cris_ccs_rshift(env
);
245 /* Set the P_FLAG only if the R_FLAG is not set. */
247 env
->pregs
[PR_CCS
] |= P_FLAG
;
249 /* Always set the M flag. */
250 env
->pregs
[PR_CCS
] |= M_FLAG
;
253 uint32_t helper_lz(uint32_t t0
)
258 uint32_t helper_btst(uint32_t t0
, uint32_t t1
, uint32_t ccs
)
260 /* FIXME: clean this up. */
263 The N flag is set according to the selected bit in the dest reg.
264 The Z flag is set if the selected bit and all bits to the right are
266 The X flag is cleared.
267 Other flags are left untouched.
268 The destination reg is not affected.*/
269 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
272 bset
= !!(t0
& (1 << sbit
));
273 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
274 masked_t0
= t0
& mask
;
275 fz
= !(masked_t0
| bset
);
277 /* Clear the X, N and Z flags. */
278 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
279 if (env
->pregs
[PR_VR
] < 32)
280 ccs
&= ~(V_FLAG
| C_FLAG
);
281 /* Set the N and Z flags accordingly. */
282 ccs
|= (bset
<< 3) | (fz
<< 2);
286 static inline uint32_t evaluate_flags_writeback(uint32_t flags
, uint32_t ccs
)
288 unsigned int x
, z
, mask
;
290 /* Extended arithmetics, leave the z flag alone. */
292 mask
= env
->cc_mask
| X_FLAG
;
299 /* all insn clear the x-flag except setf or clrf. */
305 uint32_t helper_evaluate_flags_muls(uint32_t ccs
, uint32_t res
, uint32_t mof
)
311 dneg
= ((int32_t)res
) < 0;
320 if ((dneg
&& mof
!= -1)
321 || (!dneg
&& mof
!= 0))
323 return evaluate_flags_writeback(flags
, ccs
);
326 uint32_t helper_evaluate_flags_mulu(uint32_t ccs
, uint32_t res
, uint32_t mof
)
341 return evaluate_flags_writeback(flags
, ccs
);
344 uint32_t helper_evaluate_flags_mcp(uint32_t ccs
,
345 uint32_t src
, uint32_t dst
, uint32_t res
)
349 src
= src
& 0x80000000;
350 dst
= dst
& 0x80000000;
352 if ((res
& 0x80000000L
) != 0L)
370 return evaluate_flags_writeback(flags
, ccs
);
373 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs
,
374 uint32_t src
, uint32_t dst
, uint32_t res
)
378 src
= src
& 0x80000000;
379 dst
= dst
& 0x80000000;
381 if ((res
& 0x80000000L
) != 0L)
399 return evaluate_flags_writeback(flags
, ccs
);
402 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs
,
403 uint32_t src
, uint32_t dst
, uint32_t res
)
407 src
= (~src
) & 0x80000000;
408 dst
= dst
& 0x80000000;
410 if ((res
& 0x80000000L
) != 0L)
429 return evaluate_flags_writeback(flags
, ccs
);
432 uint32_t helper_evaluate_flags_move_4(uint32_t ccs
, uint32_t res
)
436 if ((int32_t)res
< 0)
441 return evaluate_flags_writeback(flags
, ccs
);
443 uint32_t helper_evaluate_flags_move_2(uint32_t ccs
, uint32_t res
)
447 if ((int16_t)res
< 0L)
452 return evaluate_flags_writeback(flags
, ccs
);
455 /* TODO: This is expensive. We could split things up and only evaluate part of
456 CCR on a need to know basis. For now, we simply re-evaluate everything. */
457 void helper_evaluate_flags(void)
459 uint32_t src
, dst
, res
;
464 res
= env
->cc_result
;
466 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
469 /* Now, evaluate the flags. This stuff is based on
470 Per Zander's CRISv10 simulator. */
471 switch (env
->cc_size
)
474 if ((res
& 0x80L
) != 0L)
477 if (((src
& 0x80L
) == 0L)
478 && ((dst
& 0x80L
) == 0L))
482 else if (((src
& 0x80L
) != 0L)
483 && ((dst
& 0x80L
) != 0L))
490 if ((res
& 0xFFL
) == 0L)
494 if (((src
& 0x80L
) != 0L)
495 && ((dst
& 0x80L
) != 0L))
499 if ((dst
& 0x80L
) != 0L
500 || (src
& 0x80L
) != 0L)
507 if ((res
& 0x8000L
) != 0L)
510 if (((src
& 0x8000L
) == 0L)
511 && ((dst
& 0x8000L
) == 0L))
515 else if (((src
& 0x8000L
) != 0L)
516 && ((dst
& 0x8000L
) != 0L))
523 if ((res
& 0xFFFFL
) == 0L)
527 if (((src
& 0x8000L
) != 0L)
528 && ((dst
& 0x8000L
) != 0L))
532 if ((dst
& 0x8000L
) != 0L
533 || (src
& 0x8000L
) != 0L)
540 if ((res
& 0x80000000L
) != 0L)
543 if (((src
& 0x80000000L
) == 0L)
544 && ((dst
& 0x80000000L
) == 0L))
548 else if (((src
& 0x80000000L
) != 0L) &&
549 ((dst
& 0x80000000L
) != 0L))
558 if (((src
& 0x80000000L
) != 0L)
559 && ((dst
& 0x80000000L
) != 0L))
561 if ((dst
& 0x80000000L
) != 0L
562 || (src
& 0x80000000L
) != 0L)
570 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
573 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(flags
, env
->pregs
[PR_CCS
]);
576 void helper_top_evaluate_flags(void)
581 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mcp(
582 env
->pregs
[PR_CCS
], env
->cc_src
,
583 env
->cc_dest
, env
->cc_result
);
586 env
->pregs
[PR_CCS
] = helper_evaluate_flags_muls(
587 env
->pregs
[PR_CCS
], env
->cc_result
,
591 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mulu(
592 env
->pregs
[PR_CCS
], env
->cc_result
,
602 switch (env
->cc_size
)
606 helper_evaluate_flags_move_4(
612 helper_evaluate_flags_move_2(
617 helper_evaluate_flags();
626 if (env
->cc_size
== 4)
628 helper_evaluate_flags_sub_4(
630 env
->cc_src
, env
->cc_dest
,
633 helper_evaluate_flags();
637 switch (env
->cc_size
)
641 helper_evaluate_flags_alu_4(
643 env
->cc_src
, env
->cc_dest
,
647 helper_evaluate_flags();