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target-tricore: Add instructions of RR opcode format, that have 0xb as the first...
[qemu.git]
/
target-lm32
/
Makefile.objs
blob
c3e1bd6bd61aa1b1453a788e5ddc0057a2707358
1
obj-y += translate.o op_helper.o helper.o cpu.o
2
obj-y += gdbstub.o
3
obj-y += lm32-semi.o
4
obj-$(CONFIG_SOFTMMU) += machine.o
