target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "config.h"
  20 #include "dyngen-exec.h"
  21
  22 /* XXX: factorize this mess */
  23 #ifdef TARGET_X86_64
  24 #define TARGET_LONG_BITS 64
  25 #else
  26 #define TARGET_LONG_BITS 32
  27 #endif
  28
  29 #include "cpu-defs.h"
  30
  31 register struct CPUX86State *env asm(AREG0);
  32
  33 #include "qemu-common.h"
  34 #include "qemu-log.h"
  35
  36 #undef EAX
  37 #define EAX (env->regs[R_EAX])
  38 #undef ECX
  39 #define ECX (env->regs[R_ECX])
  40 #undef EDX
  41 #define EDX (env->regs[R_EDX])
  42 #undef EBX
  43 #define EBX (env->regs[R_EBX])
  44 #undef ESP
  45 #define ESP (env->regs[R_ESP])
  46 #undef EBP
  47 #define EBP (env->regs[R_EBP])
  48 #undef ESI
  49 #define ESI (env->regs[R_ESI])
  50 #undef EDI
  51 #define EDI (env->regs[R_EDI])
  52 #undef EIP
  53 #define EIP (env->eip)
  54 #define DF  (env->df)
  55
  56 #define CC_SRC (env->cc_src)
  57 #define CC_DST (env->cc_dst)
  58 #define CC_OP  (env->cc_op)
  59
  60 /* float macros */
  61 #define FT0    (env->ft0)
  62 #define ST0    (env->fpregs[env->fpstt].d)
  63 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  64 #define ST1    ST(1)
  65
  66 #include "cpu.h"
  67 #include "exec-all.h"
  68
  69 /* op_helper.c */
  70 void do_interrupt(int intno, int is_int, int error_code,
  71                   target_ulong next_eip, int is_hw);
  72 void do_interrupt_user(int intno, int is_int, int error_code,
  73                        target_ulong next_eip);
  74 void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
  75 void QEMU_NORETURN raise_exception(int exception_index);
  76 void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
  77 void do_smm_enter(void);
  78
  79 /* n must be a constant to be efficient */
  80 static inline target_long lshift(target_long x, int n)
  81 {
  82     if (n >= 0)
  83         return x << n;
  84     else
  85         return x >> (-n);
  86 }
  87
  88 #include "helper.h"
  89
  90 static inline void svm_check_intercept(uint32_t type)
  91 {
  92     helper_svm_check_intercept_param(type, 0);
  93 }
  94
  95 #if !defined(CONFIG_USER_ONLY)
  96
  97 #include "softmmu_exec.h"
  98
  99 #endif /* !defined(CONFIG_USER_ONLY) */
 100
 101 #ifdef USE_X86LDOUBLE
 102 /* use long double functions */
 103 #define floatx_to_int32 floatx80_to_int32
 104 #define floatx_to_int64 floatx80_to_int64
 105 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
 106 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
 107 #define int32_to_floatx int32_to_floatx80
 108 #define int64_to_floatx int64_to_floatx80
 109 #define float32_to_floatx float32_to_floatx80
 110 #define float64_to_floatx float64_to_floatx80
 111 #define floatx_to_float32 floatx80_to_float32
 112 #define floatx_to_float64 floatx80_to_float64
 113 #define floatx_add floatx80_add
 114 #define floatx_div floatx80_div
 115 #define floatx_mul floatx80_mul
 116 #define floatx_sub floatx80_sub
 117 #define floatx_sqrt floatx80_sqrt
 118 #define floatx_abs floatx80_abs
 119 #define floatx_chs floatx80_chs
 120 #define floatx_scalbn floatx80_scalbn
 121 #define floatx_round_to_int floatx80_round_to_int
 122 #define floatx_compare floatx80_compare
 123 #define floatx_compare_quiet floatx80_compare_quiet
 124 #define floatx_is_any_nan floatx80_is_any_nan
 125 #define floatx_is_neg floatx80_is_neg
 126 #define floatx_is_zero floatx80_is_zero
 127 #define floatx_zero floatx80_zero
 128 #define floatx_one floatx80_one
 129 #define floatx_ln2 floatx80_ln2
 130 #define floatx_pi floatx80_pi
 131 #else
 132 #define floatx_to_int32 float64_to_int32
 133 #define floatx_to_int64 float64_to_int64
 134 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
 135 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
 136 #define int32_to_floatx int32_to_float64
 137 #define int64_to_floatx int64_to_float64
 138 #define float32_to_floatx float32_to_float64
 139 #define float64_to_floatx(x, e) (x)
 140 #define floatx_to_float32 float64_to_float32
 141 #define floatx_to_float64(x, e) (x)
 142 #define floatx_add float64_add
 143 #define floatx_div float64_div
 144 #define floatx_mul float64_mul
 145 #define floatx_sub float64_sub
 146 #define floatx_sqrt float64_sqrt
 147 #define floatx_abs float64_abs
 148 #define floatx_chs float64_chs
 149 #define floatx_scalbn float64_scalbn
 150 #define floatx_round_to_int float64_round_to_int
 151 #define floatx_compare float64_compare
 152 #define floatx_compare_quiet float64_compare_quiet
 153 #define floatx_is_any_nan float64_is_any_nan
 154 #define floatx_is_neg float64_is_neg
 155 #define floatx_is_zero float64_is_zero
 156 #define floatx_zero float64_zero
 157 #define floatx_one float64_one
 158 #define floatx_ln2 float64_ln2
 159 #define floatx_pi float64_pi
 160 #endif
 161
 162 #define RC_MASK         0xc00
 163 #define RC_NEAR         0x000
 164 #define RC_DOWN         0x400
 165 #define RC_UP           0x800
 166 #define RC_CHOP         0xc00
 167
 168 #define MAXTAN 9223372036854775808.0
 169
 170 #ifdef USE_X86LDOUBLE
 171
 172 /* only for x86 */
 173 typedef CPU_LDoubleU CPU86_LDoubleU;
 174
 175 /* the following deal with x86 long double-precision numbers */
 176 #define MAXEXPD 0x7fff
 177 #define EXPBIAS 16383
 178 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 179 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 180 #define MANTD(fp)       (fp.l.lower)
 181 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 182
 183 #else
 184
 185 typedef CPU_DoubleU CPU86_LDoubleU;
 186
 187 /* the following deal with IEEE double-precision numbers */
 188 #define MAXEXPD 0x7ff
 189 #define EXPBIAS 1023
 190 #define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 191 #define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 192 #ifdef __arm__
 193 #define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 194 #else
 195 #define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 196 #endif
 197 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 198 #endif
 199
 200 static inline void fpush(void)
 201 {
 202     env->fpstt = (env->fpstt - 1) & 7;
 203     env->fptags[env->fpstt] = 0; /* validate stack entry */
 204 }
 205
 206 static inline void fpop(void)
 207 {
 208     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 209     env->fpstt = (env->fpstt + 1) & 7;
 210 }
 211
 212 #ifndef USE_X86LDOUBLE
 213 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 214 {
 215     CPU86_LDoubleU temp;
 216     int upper, e;
 217     uint64_t ll;
 218
 219     /* mantissa */
 220     upper = lduw(ptr + 8);
 221     /* XXX: handle overflow ? */
 222     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 223     e |= (upper >> 4) & 0x800; /* sign */
 224     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 225 #ifdef __arm__
 226     temp.l.upper = (e << 20) | (ll >> 32);
 227     temp.l.lower = ll;
 228 #else
 229     temp.ll = ll | ((uint64_t)e << 52);
 230 #endif
 231     return temp.d;
 232 }
 233
 234 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 235 {
 236     CPU86_LDoubleU temp;
 237     int e;
 238
 239     temp.d = f;
 240     /* mantissa */
 241     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 242     /* exponent + sign */
 243     e = EXPD(temp) - EXPBIAS + 16383;
 244     e |= SIGND(temp) >> 16;
 245     stw(ptr + 8, e);
 246 }
 247 #else
 248
 249 /* we use memory access macros */
 250
 251 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 252 {
 253     CPU86_LDoubleU temp;
 254
 255     temp.l.lower = ldq(ptr);
 256     temp.l.upper = lduw(ptr + 8);
 257     return temp.d;
 258 }
 259
 260 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 261 {
 262     CPU86_LDoubleU temp;
 263
 264     temp.d = f;
 265     stq(ptr, temp.l.lower);
 266     stw(ptr + 8, temp.l.upper);
 267 }
 268
 269 #endif /* USE_X86LDOUBLE */
 270
 271 #define FPUS_IE (1 << 0)
 272 #define FPUS_DE (1 << 1)
 273 #define FPUS_ZE (1 << 2)
 274 #define FPUS_OE (1 << 3)
 275 #define FPUS_UE (1 << 4)
 276 #define FPUS_PE (1 << 5)
 277 #define FPUS_SF (1 << 6)
 278 #define FPUS_SE (1 << 7)
 279 #define FPUS_B  (1 << 15)
 280
 281 #define FPUC_EM 0x3f
 282
 283 static inline uint32_t compute_eflags(void)
 284 {
 285     return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
 286 }
 287
 288 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 289 static inline void load_eflags(int eflags, int update_mask)
 290 {
 291     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 292     DF = 1 - (2 * ((eflags >> 10) & 1));
 293     env->eflags = (env->eflags & ~update_mask) |
 294         (eflags & update_mask) | 0x2;
 295 }
 296
 297 static inline int cpu_has_work(CPUState *env)
 298 {
 299     return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 300             (env->eflags & IF_MASK)) ||
 301            (env->interrupt_request & (CPU_INTERRUPT_NMI |
 302                                       CPU_INTERRUPT_INIT |
 303                                       CPU_INTERRUPT_SIPI |
 304                                       CPU_INTERRUPT_MCE));
 305 }
 306
 307 /* load efer and update the corresponding hflags. XXX: do consistency
 308    checks with cpuid bits ? */
 309 static inline void cpu_load_efer(CPUState *env, uint64_t val)
 310 {
 311     env->efer = val;
 312     env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
 313     if (env->efer & MSR_EFER_LMA)
 314         env->hflags |= HF_LMA_MASK;
 315     if (env->efer & MSR_EFER_SVME)
 316         env->hflags |= HF_SVME_MASK;
 317 }
 318
 319 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
 320 {
 321     env->eip = tb->pc - tb->cs_base;
 322 }
 323