2 * QEMU internal VGA defines.
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #define HW_VGA_INT_H 1
28 #include "qapi/error.h"
29 #include "exec/memory.h"
31 #define ST01_V_RETRACE 0x08
32 #define ST01_DISP_ENABLE 0x01
34 #define VBE_DISPI_MAX_XRES 16000
35 #define VBE_DISPI_MAX_YRES 12000
36 #define VBE_DISPI_MAX_BPP 32
38 #define VBE_DISPI_INDEX_ID 0x0
39 #define VBE_DISPI_INDEX_XRES 0x1
40 #define VBE_DISPI_INDEX_YRES 0x2
41 #define VBE_DISPI_INDEX_BPP 0x3
42 #define VBE_DISPI_INDEX_ENABLE 0x4
43 #define VBE_DISPI_INDEX_BANK 0x5
44 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
45 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
46 #define VBE_DISPI_INDEX_X_OFFSET 0x8
47 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
48 #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
49 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
51 #define VBE_DISPI_ID0 0xB0C0
52 #define VBE_DISPI_ID1 0xB0C1
53 #define VBE_DISPI_ID2 0xB0C2
54 #define VBE_DISPI_ID3 0xB0C3
55 #define VBE_DISPI_ID4 0xB0C4
56 #define VBE_DISPI_ID5 0xB0C5
58 #define VBE_DISPI_DISABLED 0x00
59 #define VBE_DISPI_ENABLED 0x01
60 #define VBE_DISPI_GETCAPS 0x02
61 #define VBE_DISPI_8BIT_DAC 0x20
62 #define VBE_DISPI_LFB_ENABLED 0x40
63 #define VBE_DISPI_NOCLEARMEM 0x80
65 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
67 #define CH_ATTR_SIZE (160 * 100)
68 #define VGA_MAX_HEIGHT 2048
70 struct vga_precise_retrace
{
71 int64_t ticks_per_char
;
82 struct vga_precise_retrace precise
;
85 struct VGACommonState
;
86 typedef uint8_t (* vga_retrace_fn
)(struct VGACommonState
*s
);
87 typedef void (* vga_update_retrace_info_fn
)(struct VGACommonState
*s
);
89 typedef struct VGACommonState
{
90 MemoryRegion
*legacy_address_space
;
93 MemoryRegion vram_vbe
;
95 uint32_t vram_size_mb
; /* property */
98 bool has_chain4_alias
;
99 MemoryRegion chain4_alias
;
108 uint8_t cr
[256]; /* CRT registers */
109 uint8_t msr
; /* Misc Output Register */
110 uint8_t fcr
; /* Feature Control Register */
111 uint8_t st00
; /* status 0 */
112 uint8_t st01
; /* status 1 */
114 uint8_t dac_sub_index
;
115 uint8_t dac_read_index
;
116 uint8_t dac_write_index
;
117 uint8_t dac_cache
[3]; /* used when writing */
119 uint8_t palette
[768];
121 int (*get_bpp
)(struct VGACommonState
*s
);
122 void (*get_offsets
)(struct VGACommonState
*s
,
123 uint32_t *pline_offset
,
124 uint32_t *pstart_addr
,
125 uint32_t *pline_compare
);
126 void (*get_resolution
)(struct VGACommonState
*s
,
129 PortioList vga_port_list
;
130 PortioList vbe_port_list
;
131 /* bochs vbe state */
133 uint16_t vbe_regs
[VBE_DISPI_INDEX_NB
];
134 uint32_t vbe_start_addr
;
135 uint32_t vbe_line_offset
;
136 uint32_t vbe_bank_mask
;
138 /* display refresh support */
140 uint32_t font_offsets
[2];
142 uint8_t shift_control
;
144 uint32_t line_offset
;
145 uint32_t line_compare
;
147 uint32_t plane_updated
;
148 uint32_t last_line_offset
;
149 uint8_t last_cw
, last_ch
;
150 uint32_t last_width
, last_height
; /* in chars or pixels */
151 uint32_t last_scr_width
, last_scr_height
; /* in pixels */
152 uint32_t last_depth
; /* in bits */
153 uint8_t cursor_start
, cursor_end
;
154 bool cursor_visible_phase
;
155 int64_t cursor_blink_time
;
156 uint32_t cursor_offset
;
157 const GraphicHwOps
*hw_ops
;
158 bool full_update_text
;
159 bool full_update_gfx
;
160 /* hardware mouse cursor support */
161 uint32_t invalidated_y_table
[VGA_MAX_HEIGHT
/ 32];
162 void (*cursor_invalidate
)(struct VGACommonState
*s
);
163 void (*cursor_draw_line
)(struct VGACommonState
*s
, uint8_t *d
, int y
);
164 /* tell for each page if it has been updated since the last time */
165 uint32_t last_palette
[256];
166 uint32_t last_ch_attr
[CH_ATTR_SIZE
]; /* XXX: make it dynamic */
168 vga_retrace_fn retrace
;
169 vga_update_retrace_info_fn update_retrace_info
;
170 union vga_retrace retrace_info
;
171 uint8_t is_vbe_vmstate
;
174 static inline int c6_to_8(int v
)
179 return (v
<< 2) | (b
<< 1) | b
;
182 void vga_common_init(VGACommonState
*s
, Object
*obj
, bool global_vmstate
);
183 void vga_init(VGACommonState
*s
, Object
*obj
, MemoryRegion
*address_space
,
184 MemoryRegion
*address_space_io
, bool init_vga_ports
);
185 MemoryRegion
*vga_init_io(VGACommonState
*s
, Object
*obj
,
186 const MemoryRegionPortio
**vga_ports
,
187 const MemoryRegionPortio
**vbe_ports
);
188 void vga_common_reset(VGACommonState
*s
);
190 void vga_sync_dirty_bitmap(VGACommonState
*s
);
191 void vga_dirty_log_start(VGACommonState
*s
);
192 void vga_dirty_log_stop(VGACommonState
*s
);
194 extern const VMStateDescription vmstate_vga_common
;
195 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
);
196 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
);
197 uint32_t vga_mem_readb(VGACommonState
*s
, hwaddr addr
);
198 void vga_mem_writeb(VGACommonState
*s
, hwaddr addr
, uint32_t val
);
199 void vga_invalidate_scanlines(VGACommonState
*s
, int y1
, int y2
);
201 int vga_ioport_invalid(VGACommonState
*s
, uint32_t addr
);
203 void vga_init_vbe(VGACommonState
*s
, Object
*obj
, MemoryRegion
*address_space
);
204 uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
);
205 void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
);
206 void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
);
208 extern const uint8_t sr_mask
[8];
209 extern const uint8_t gr_mask
[16];
211 #define VGABIOS_FILENAME "vgabios.bin"
212 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
214 extern const MemoryRegionOps vga_mem_ops
;