include/sysemu/dma.h

   1 /*
   2  * DMA helper functions
   3  *
   4  * Copyright (c) 2009 Red Hat
   5  *
   6  * This work is licensed under the terms of the GNU General Public License
   7  * (GNU GPL), version 2 or later.
   8  */
   9
  10 #ifndef DMA_H
  11 #define DMA_H
  12
  13 #include "exec/memory.h"
  14 #include "exec/address-spaces.h"
  15 #include "hw/hw.h"
  16 #include "block/block.h"
  17 #include "block/accounting.h"
  18
  19 typedef struct ScatterGatherEntry ScatterGatherEntry;
  20
  21 typedef enum {
  22     DMA_DIRECTION_TO_DEVICE = 0,
  23     DMA_DIRECTION_FROM_DEVICE = 1,
  24 } DMADirection;
  25
  26 struct QEMUSGList {
  27     ScatterGatherEntry *sg;
  28     int nsg;
  29     int nalloc;
  30     size_t size;
  31     DeviceState *dev;
  32     AddressSpace *as;
  33 };
  34
  35 #ifndef CONFIG_USER_ONLY
  36
  37 /*
  38  * When an IOMMU is present, bus addresses become distinct from
  39  * CPU/memory physical addresses and may be a different size.  Because
  40  * the IOVA size depends more on the bus than on the platform, we more
  41  * or less have to treat these as 64-bit always to cover all (or at
  42  * least most) cases.
  43  */
  44 typedef uint64_t dma_addr_t;
  45
  46 #define DMA_ADDR_BITS 64
  47 #define DMA_ADDR_FMT "%" PRIx64
  48
  49 static inline void dma_barrier(AddressSpace *as, DMADirection dir)
  50 {
  51     /*
  52      * This is called before DMA read and write operations
  53      * unless the _relaxed form is used and is responsible
  54      * for providing some sane ordering of accesses vs
  55      * concurrently running VCPUs.
  56      *
  57      * Users of map(), unmap() or lower level st/ld_*
  58      * operations are responsible for providing their own
  59      * ordering via barriers.
  60      *
  61      * This primitive implementation does a simple smp_mb()
  62      * before each operation which provides pretty much full
  63      * ordering.
  64      *
  65      * A smarter implementation can be devised if needed to
  66      * use lighter barriers based on the direction of the
  67      * transfer, the DMA context, etc...
  68      */
  69     smp_mb();
  70 }
  71
  72 /* Checks that the given range of addresses is valid for DMA.  This is
  73  * useful for certain cases, but usually you should just use
  74  * dma_memory_{read,write}() and check for errors */
  75 static inline bool dma_memory_valid(AddressSpace *as,
  76                                     dma_addr_t addr, dma_addr_t len,
  77                                     DMADirection dir)
  78 {
  79     return address_space_access_valid(as, addr, len,
  80                                       dir == DMA_DIRECTION_FROM_DEVICE,
  81                                       MEMTXATTRS_UNSPECIFIED);
  82 }
  83
  84 static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
  85                                         void *buf, dma_addr_t len,
  86                                         DMADirection dir)
  87 {
  88     return (bool)address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
  89                                   buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
  90 }
  91
  92 static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
  93                                           void *buf, dma_addr_t len)
  94 {
  95     return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
  96 }
  97
  98 static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
  99                                            const void *buf, dma_addr_t len)
 100 {
 101     return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
 102                                  DMA_DIRECTION_FROM_DEVICE);
 103 }
 104
 105 static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
 106                                 void *buf, dma_addr_t len,
 107                                 DMADirection dir)
 108 {
 109     dma_barrier(as, dir);
 110
 111     return dma_memory_rw_relaxed(as, addr, buf, len, dir);
 112 }
 113
 114 static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
 115                                   void *buf, dma_addr_t len)
 116 {
 117     return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
 118 }
 119
 120 static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
 121                                    const void *buf, dma_addr_t len)
 122 {
 123     return dma_memory_rw(as, addr, (void *)buf, len,
 124                          DMA_DIRECTION_FROM_DEVICE);
 125 }
 126
 127 int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
 128
 129 static inline void *dma_memory_map(AddressSpace *as,
 130                                    dma_addr_t addr, dma_addr_t *len,
 131                                    DMADirection dir)
 132 {
 133     hwaddr xlen = *len;
 134     void *p;
 135
 136     p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE,
 137                           MEMTXATTRS_UNSPECIFIED);
 138     *len = xlen;
 139     return p;
 140 }
 141
 142 static inline void dma_memory_unmap(AddressSpace *as,
 143                                     void *buffer, dma_addr_t len,
 144                                     DMADirection dir, dma_addr_t access_len)
 145 {
 146     address_space_unmap(as, buffer, (hwaddr)len,
 147                         dir == DMA_DIRECTION_FROM_DEVICE, access_len);
 148 }
 149
 150 #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
 151     static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \
 152                                                             dma_addr_t addr) \
 153     {                                                                   \
 154         uint##_bits##_t val;                                            \
 155         dma_memory_read(as, addr, &val, (_bits) / 8);                   \
 156         return _end##_bits##_to_cpu(val);                               \
 157     }                                                                   \
 158     static inline void st##_sname##_##_end##_dma(AddressSpace *as,      \
 159                                                  dma_addr_t addr,       \
 160                                                  uint##_bits##_t val)   \
 161     {                                                                   \
 162         val = cpu_to_##_end##_bits(val);                                \
 163         dma_memory_write(as, addr, &val, (_bits) / 8);                  \
 164     }
 165
 166 static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
 167 {
 168     uint8_t val;
 169
 170     dma_memory_read(as, addr, &val, 1);
 171     return val;
 172 }
 173
 174 static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
 175 {
 176     dma_memory_write(as, addr, &val, 1);
 177 }
 178
 179 DEFINE_LDST_DMA(uw, w, 16, le);
 180 DEFINE_LDST_DMA(l, l, 32, le);
 181 DEFINE_LDST_DMA(q, q, 64, le);
 182 DEFINE_LDST_DMA(uw, w, 16, be);
 183 DEFINE_LDST_DMA(l, l, 32, be);
 184 DEFINE_LDST_DMA(q, q, 64, be);
 185
 186 #undef DEFINE_LDST_DMA
 187
 188 struct ScatterGatherEntry {
 189     dma_addr_t base;
 190     dma_addr_t len;
 191 };
 192
 193 void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
 194                       AddressSpace *as);
 195 void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
 196 void qemu_sglist_destroy(QEMUSGList *qsg);
 197 #endif
 198
 199 typedef BlockAIOCB *DMAIOFunc(int64_t offset, QEMUIOVector *iov,
 200                               BlockCompletionFunc *cb, void *cb_opaque,
 201                               void *opaque);
 202
 203 BlockAIOCB *dma_blk_io(AioContext *ctx,
 204                        QEMUSGList *sg, uint64_t offset, uint32_t align,
 205                        DMAIOFunc *io_func, void *io_func_opaque,
 206                        BlockCompletionFunc *cb, void *opaque, DMADirection dir);
 207 BlockAIOCB *dma_blk_read(BlockBackend *blk,
 208                          QEMUSGList *sg, uint64_t offset, uint32_t align,
 209                          BlockCompletionFunc *cb, void *opaque);
 210 BlockAIOCB *dma_blk_write(BlockBackend *blk,
 211                           QEMUSGList *sg, uint64_t offset, uint32_t align,
 212                           BlockCompletionFunc *cb, void *opaque);
 213 uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);
 214 uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);
 215
 216 void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
 217                     QEMUSGList *sg, enum BlockAcctType type);
 218
 219 #endif