4 * Copyright (c) 2017 Linaro Ltd
5 * Written by Peter Maydell <peter.maydell@linaro.org>
7 * This code is licensed under the GPL version 2 or later.
10 #ifndef HW_ARM_ARMV7M_NVIC_H
11 #define HW_ARM_ARMV7M_NVIC_H
13 #include "target/arm/cpu.h"
14 #include "hw/sysbus.h"
15 #include "hw/timer/armv7m_systick.h"
17 #define TYPE_NVIC "armv7m_nvic"
20 OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
22 /* Highest permitted number of exceptions (architectural limit) */
23 #define NVIC_MAX_VECTORS 512
25 typedef struct VecInfo
{
26 /* Exception priorities can range from -3 to 255; only the unmodifiable
27 * priority values for RESET, NMI and HardFault can be negative.
33 uint8_t level
; /* exceptions <=15 never set level */
36 typedef struct NVICState
{
38 SysBusDevice parent_obj
;
43 VecInfo vectors
[NVIC_MAX_VECTORS
];
46 /* vectpending and exception_prio are both cached state that can
47 * be recalculated from the vectors[] array and the prigroup field.
49 unsigned int vectpending
; /* highest prio pending enabled exception */
50 int exception_prio
; /* group prio of the highest prio active exception */
52 MemoryRegion sysregmem
;
53 MemoryRegion container
;