2 * vfio based device assignment support
4 * Copyright Red Hat, Inc. 2012
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
21 #include "qemu/osdep.h"
22 #include <linux/vfio.h>
23 #include <sys/ioctl.h>
25 #include "hw/pci/msi.h"
26 #include "hw/pci/msix.h"
27 #include "hw/pci/pci_bridge.h"
28 #include "qemu/error-report.h"
29 #include "qemu/range.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/sysemu.h"
34 #include "qapi/error.h"
36 #define MSIX_CAP_LENGTH 12
38 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
);
39 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
);
42 * Disabling BAR mmaping can be slow, but toggling it around INTx can
43 * also be a huge overhead. We try to get the best of both worlds by
44 * waiting until an interrupt to disable mmaps (subsequent transitions
45 * to the same state are effectively no overhead). If the interrupt has
46 * been serviced and the time gap is long enough, we re-enable mmaps for
47 * performance. This works well for things like graphics cards, which
48 * may not use their interrupt at all and are penalized to an unusable
49 * level by read/write BAR traps. Other devices, like NICs, have more
50 * regular interrupts and see much better latency by staying in non-mmap
51 * mode. We therefore set the default mmap_timeout such that a ping
52 * is just enough to keep the mmap disabled. Users can experiment with
53 * other options with the x-intx-mmap-timeout-ms parameter (a value of
54 * zero disables the timer).
56 static void vfio_intx_mmap_enable(void *opaque
)
58 VFIOPCIDevice
*vdev
= opaque
;
60 if (vdev
->intx
.pending
) {
61 timer_mod(vdev
->intx
.mmap_timer
,
62 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
66 vfio_mmap_set_enabled(vdev
, true);
69 static void vfio_intx_interrupt(void *opaque
)
71 VFIOPCIDevice
*vdev
= opaque
;
73 if (!event_notifier_test_and_clear(&vdev
->intx
.interrupt
)) {
77 trace_vfio_intx_interrupt(vdev
->vbasedev
.name
, 'A' + vdev
->intx
.pin
);
79 vdev
->intx
.pending
= true;
80 pci_irq_assert(&vdev
->pdev
);
81 vfio_mmap_set_enabled(vdev
, false);
82 if (vdev
->intx
.mmap_timeout
) {
83 timer_mod(vdev
->intx
.mmap_timer
,
84 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL
) + vdev
->intx
.mmap_timeout
);
88 static void vfio_intx_eoi(VFIODevice
*vbasedev
)
90 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
92 if (!vdev
->intx
.pending
) {
96 trace_vfio_intx_eoi(vbasedev
->name
);
98 vdev
->intx
.pending
= false;
99 pci_irq_deassert(&vdev
->pdev
);
100 vfio_unmask_single_irqindex(vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
103 static void vfio_intx_enable_kvm(VFIOPCIDevice
*vdev
)
106 struct kvm_irqfd irqfd
= {
107 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
108 .gsi
= vdev
->intx
.route
.irq
,
109 .flags
= KVM_IRQFD_FLAG_RESAMPLE
,
111 struct vfio_irq_set
*irq_set
;
115 if (vdev
->no_kvm_intx
|| !kvm_irqfds_enabled() ||
116 vdev
->intx
.route
.mode
!= PCI_INTX_ENABLED
||
117 !kvm_resamplefds_enabled()) {
121 /* Get to a known interrupt state */
122 qemu_set_fd_handler(irqfd
.fd
, NULL
, NULL
, vdev
);
123 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
124 vdev
->intx
.pending
= false;
125 pci_irq_deassert(&vdev
->pdev
);
127 /* Get an eventfd for resample/unmask */
128 if (event_notifier_init(&vdev
->intx
.unmask
, 0)) {
129 error_report("vfio: Error: event_notifier_init failed eoi");
133 /* KVM triggers it, VFIO listens for it */
134 irqfd
.resamplefd
= event_notifier_get_fd(&vdev
->intx
.unmask
);
136 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
137 error_report("vfio: Error: Failed to setup resample irqfd: %m");
141 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
143 irq_set
= g_malloc0(argsz
);
144 irq_set
->argsz
= argsz
;
145 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_UNMASK
;
146 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
149 pfd
= (int32_t *)&irq_set
->data
;
151 *pfd
= irqfd
.resamplefd
;
153 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
156 error_report("vfio: Error: Failed to setup INTx unmask fd: %m");
161 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
163 vdev
->intx
.kvm_accel
= true;
165 trace_vfio_intx_enable_kvm(vdev
->vbasedev
.name
);
170 irqfd
.flags
= KVM_IRQFD_FLAG_DEASSIGN
;
171 kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
);
173 event_notifier_cleanup(&vdev
->intx
.unmask
);
175 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
176 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
180 static void vfio_intx_disable_kvm(VFIOPCIDevice
*vdev
)
183 struct kvm_irqfd irqfd
= {
184 .fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
),
185 .gsi
= vdev
->intx
.route
.irq
,
186 .flags
= KVM_IRQFD_FLAG_DEASSIGN
,
189 if (!vdev
->intx
.kvm_accel
) {
194 * Get to a known state, hardware masked, QEMU ready to accept new
195 * interrupts, QEMU IRQ de-asserted.
197 vfio_mask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
198 vdev
->intx
.pending
= false;
199 pci_irq_deassert(&vdev
->pdev
);
201 /* Tell KVM to stop listening for an INTx irqfd */
202 if (kvm_vm_ioctl(kvm_state
, KVM_IRQFD
, &irqfd
)) {
203 error_report("vfio: Error: Failed to disable INTx irqfd: %m");
206 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
207 event_notifier_cleanup(&vdev
->intx
.unmask
);
209 /* QEMU starts listening for interrupt events. */
210 qemu_set_fd_handler(irqfd
.fd
, vfio_intx_interrupt
, NULL
, vdev
);
212 vdev
->intx
.kvm_accel
= false;
214 /* If we've missed an event, let it re-fire through QEMU */
215 vfio_unmask_single_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
217 trace_vfio_intx_disable_kvm(vdev
->vbasedev
.name
);
221 static void vfio_intx_update(PCIDevice
*pdev
)
223 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
226 if (vdev
->interrupt
!= VFIO_INT_INTx
) {
230 route
= pci_device_route_intx_to_irq(&vdev
->pdev
, vdev
->intx
.pin
);
232 if (!pci_intx_route_changed(&vdev
->intx
.route
, &route
)) {
233 return; /* Nothing changed */
236 trace_vfio_intx_update(vdev
->vbasedev
.name
,
237 vdev
->intx
.route
.irq
, route
.irq
);
239 vfio_intx_disable_kvm(vdev
);
241 vdev
->intx
.route
= route
;
243 if (route
.mode
!= PCI_INTX_ENABLED
) {
247 vfio_intx_enable_kvm(vdev
);
249 /* Re-enable the interrupt in cased we missed an EOI */
250 vfio_intx_eoi(&vdev
->vbasedev
);
253 static int vfio_intx_enable(VFIOPCIDevice
*vdev
)
255 uint8_t pin
= vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1);
257 struct vfio_irq_set
*irq_set
;
264 vfio_disable_interrupts(vdev
);
266 vdev
->intx
.pin
= pin
- 1; /* Pin A (1) -> irq[0] */
267 pci_config_set_interrupt_pin(vdev
->pdev
.config
, pin
);
271 * Only conditional to avoid generating error messages on platforms
272 * where we won't actually use the result anyway.
274 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) {
275 vdev
->intx
.route
= pci_device_route_intx_to_irq(&vdev
->pdev
,
280 ret
= event_notifier_init(&vdev
->intx
.interrupt
, 0);
282 error_report("vfio: Error: event_notifier_init failed");
286 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
288 irq_set
= g_malloc0(argsz
);
289 irq_set
->argsz
= argsz
;
290 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
291 irq_set
->index
= VFIO_PCI_INTX_IRQ_INDEX
;
294 pfd
= (int32_t *)&irq_set
->data
;
296 *pfd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
297 qemu_set_fd_handler(*pfd
, vfio_intx_interrupt
, NULL
, vdev
);
299 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
302 error_report("vfio: Error: Failed to setup INTx fd: %m");
303 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
304 event_notifier_cleanup(&vdev
->intx
.interrupt
);
308 vfio_intx_enable_kvm(vdev
);
310 vdev
->interrupt
= VFIO_INT_INTx
;
312 trace_vfio_intx_enable(vdev
->vbasedev
.name
);
317 static void vfio_intx_disable(VFIOPCIDevice
*vdev
)
321 timer_del(vdev
->intx
.mmap_timer
);
322 vfio_intx_disable_kvm(vdev
);
323 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_INTX_IRQ_INDEX
);
324 vdev
->intx
.pending
= false;
325 pci_irq_deassert(&vdev
->pdev
);
326 vfio_mmap_set_enabled(vdev
, true);
328 fd
= event_notifier_get_fd(&vdev
->intx
.interrupt
);
329 qemu_set_fd_handler(fd
, NULL
, NULL
, vdev
);
330 event_notifier_cleanup(&vdev
->intx
.interrupt
);
332 vdev
->interrupt
= VFIO_INT_NONE
;
334 trace_vfio_intx_disable(vdev
->vbasedev
.name
);
340 static void vfio_msi_interrupt(void *opaque
)
342 VFIOMSIVector
*vector
= opaque
;
343 VFIOPCIDevice
*vdev
= vector
->vdev
;
344 MSIMessage (*get_msg
)(PCIDevice
*dev
, unsigned vector
);
345 void (*notify
)(PCIDevice
*dev
, unsigned vector
);
347 int nr
= vector
- vdev
->msi_vectors
;
349 if (!event_notifier_test_and_clear(&vector
->interrupt
)) {
353 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
354 get_msg
= msix_get_message
;
355 notify
= msix_notify
;
357 /* A masked vector firing needs to use the PBA, enable it */
358 if (msix_is_masked(&vdev
->pdev
, nr
)) {
359 set_bit(nr
, vdev
->msix
->pending
);
360 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, true);
361 trace_vfio_msix_pba_enable(vdev
->vbasedev
.name
);
363 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
364 get_msg
= msi_get_message
;
370 msg
= get_msg(&vdev
->pdev
, nr
);
371 trace_vfio_msi_interrupt(vdev
->vbasedev
.name
, nr
, msg
.address
, msg
.data
);
372 notify(&vdev
->pdev
, nr
);
375 static int vfio_enable_vectors(VFIOPCIDevice
*vdev
, bool msix
)
377 struct vfio_irq_set
*irq_set
;
378 int ret
= 0, i
, argsz
;
381 argsz
= sizeof(*irq_set
) + (vdev
->nr_vectors
* sizeof(*fds
));
383 irq_set
= g_malloc0(argsz
);
384 irq_set
->argsz
= argsz
;
385 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
| VFIO_IRQ_SET_ACTION_TRIGGER
;
386 irq_set
->index
= msix
? VFIO_PCI_MSIX_IRQ_INDEX
: VFIO_PCI_MSI_IRQ_INDEX
;
388 irq_set
->count
= vdev
->nr_vectors
;
389 fds
= (int32_t *)&irq_set
->data
;
391 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
395 * MSI vs MSI-X - The guest has direct access to MSI mask and pending
396 * bits, therefore we always use the KVM signaling path when setup.
397 * MSI-X mask and pending bits are emulated, so we want to use the
398 * KVM signaling path only when configured and unmasked.
400 if (vdev
->msi_vectors
[i
].use
) {
401 if (vdev
->msi_vectors
[i
].virq
< 0 ||
402 (msix
&& msix_is_masked(&vdev
->pdev
, i
))) {
403 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].interrupt
);
405 fd
= event_notifier_get_fd(&vdev
->msi_vectors
[i
].kvm_interrupt
);
412 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
419 static void vfio_add_kvm_msi_virq(VFIOPCIDevice
*vdev
, VFIOMSIVector
*vector
,
420 int vector_n
, bool msix
)
424 if ((msix
&& vdev
->no_kvm_msix
) || (!msix
&& vdev
->no_kvm_msi
)) {
428 if (event_notifier_init(&vector
->kvm_interrupt
, 0)) {
432 virq
= kvm_irqchip_add_msi_route(kvm_state
, vector_n
, &vdev
->pdev
);
434 event_notifier_cleanup(&vector
->kvm_interrupt
);
438 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
440 kvm_irqchip_release_virq(kvm_state
, virq
);
441 event_notifier_cleanup(&vector
->kvm_interrupt
);
448 static void vfio_remove_kvm_msi_virq(VFIOMSIVector
*vector
)
450 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, &vector
->kvm_interrupt
,
452 kvm_irqchip_release_virq(kvm_state
, vector
->virq
);
454 event_notifier_cleanup(&vector
->kvm_interrupt
);
457 static void vfio_update_kvm_msi_virq(VFIOMSIVector
*vector
, MSIMessage msg
,
460 kvm_irqchip_update_msi_route(kvm_state
, vector
->virq
, msg
, pdev
);
463 static int vfio_msix_vector_do_use(PCIDevice
*pdev
, unsigned int nr
,
464 MSIMessage
*msg
, IOHandler
*handler
)
466 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
467 VFIOMSIVector
*vector
;
470 trace_vfio_msix_vector_do_use(vdev
->vbasedev
.name
, nr
);
472 vector
= &vdev
->msi_vectors
[nr
];
477 if (event_notifier_init(&vector
->interrupt
, 0)) {
478 error_report("vfio: Error: event_notifier_init failed");
481 msix_vector_use(pdev
, nr
);
484 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
485 handler
, NULL
, vector
);
488 * Attempt to enable route through KVM irqchip,
489 * default to userspace handling if unavailable.
491 if (vector
->virq
>= 0) {
493 vfio_remove_kvm_msi_virq(vector
);
495 vfio_update_kvm_msi_virq(vector
, *msg
, pdev
);
498 vfio_add_kvm_msi_virq(vdev
, vector
, nr
, true);
502 * We don't want to have the host allocate all possible MSI vectors
503 * for a device if they're not in use, so we shutdown and incrementally
504 * increase them as needed.
506 if (vdev
->nr_vectors
< nr
+ 1) {
507 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
508 vdev
->nr_vectors
= nr
+ 1;
509 ret
= vfio_enable_vectors(vdev
, true);
511 error_report("vfio: failed to enable vectors, %d", ret
);
515 struct vfio_irq_set
*irq_set
;
518 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
520 irq_set
= g_malloc0(argsz
);
521 irq_set
->argsz
= argsz
;
522 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
523 VFIO_IRQ_SET_ACTION_TRIGGER
;
524 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
527 pfd
= (int32_t *)&irq_set
->data
;
529 if (vector
->virq
>= 0) {
530 *pfd
= event_notifier_get_fd(&vector
->kvm_interrupt
);
532 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
535 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
538 error_report("vfio: failed to modify vector, %d", ret
);
542 /* Disable PBA emulation when nothing more is pending. */
543 clear_bit(nr
, vdev
->msix
->pending
);
544 if (find_first_bit(vdev
->msix
->pending
,
545 vdev
->nr_vectors
) == vdev
->nr_vectors
) {
546 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
547 trace_vfio_msix_pba_disable(vdev
->vbasedev
.name
);
553 static int vfio_msix_vector_use(PCIDevice
*pdev
,
554 unsigned int nr
, MSIMessage msg
)
556 return vfio_msix_vector_do_use(pdev
, nr
, &msg
, vfio_msi_interrupt
);
559 static void vfio_msix_vector_release(PCIDevice
*pdev
, unsigned int nr
)
561 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
562 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[nr
];
564 trace_vfio_msix_vector_release(vdev
->vbasedev
.name
, nr
);
567 * There are still old guests that mask and unmask vectors on every
568 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of
569 * the KVM setup in place, simply switch VFIO to use the non-bypass
570 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X
571 * core will mask the interrupt and set pending bits, allowing it to
572 * be re-asserted on unmask. Nothing to do if already using QEMU mode.
574 if (vector
->virq
>= 0) {
576 struct vfio_irq_set
*irq_set
;
579 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
581 irq_set
= g_malloc0(argsz
);
582 irq_set
->argsz
= argsz
;
583 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
584 VFIO_IRQ_SET_ACTION_TRIGGER
;
585 irq_set
->index
= VFIO_PCI_MSIX_IRQ_INDEX
;
588 pfd
= (int32_t *)&irq_set
->data
;
590 *pfd
= event_notifier_get_fd(&vector
->interrupt
);
592 ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
598 static void vfio_msix_enable(VFIOPCIDevice
*vdev
)
600 vfio_disable_interrupts(vdev
);
602 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->msix
->entries
);
604 vdev
->interrupt
= VFIO_INT_MSIX
;
607 * Some communication channels between VF & PF or PF & fw rely on the
608 * physical state of the device and expect that enabling MSI-X from the
609 * guest enables the same on the host. When our guest is Linux, the
610 * guest driver call to pci_enable_msix() sets the enabling bit in the
611 * MSI-X capability, but leaves the vector table masked. We therefore
612 * can't rely on a vector_use callback (from request_irq() in the guest)
613 * to switch the physical device into MSI-X mode because that may come a
614 * long time after pci_enable_msix(). This code enables vector 0 with
615 * triggering to userspace, then immediately release the vector, leaving
616 * the physical device with no vectors enabled, but MSI-X enabled, just
617 * like the guest view.
619 vfio_msix_vector_do_use(&vdev
->pdev
, 0, NULL
, NULL
);
620 vfio_msix_vector_release(&vdev
->pdev
, 0);
622 if (msix_set_vector_notifiers(&vdev
->pdev
, vfio_msix_vector_use
,
623 vfio_msix_vector_release
, NULL
)) {
624 error_report("vfio: msix_set_vector_notifiers failed");
627 trace_vfio_msix_enable(vdev
->vbasedev
.name
);
630 static void vfio_msi_enable(VFIOPCIDevice
*vdev
)
634 vfio_disable_interrupts(vdev
);
636 vdev
->nr_vectors
= msi_nr_vectors_allocated(&vdev
->pdev
);
638 vdev
->msi_vectors
= g_new0(VFIOMSIVector
, vdev
->nr_vectors
);
640 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
641 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
647 if (event_notifier_init(&vector
->interrupt
, 0)) {
648 error_report("vfio: Error: event_notifier_init failed");
651 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
652 vfio_msi_interrupt
, NULL
, vector
);
655 * Attempt to enable route through KVM irqchip,
656 * default to userspace handling if unavailable.
658 vfio_add_kvm_msi_virq(vdev
, vector
, i
, false);
661 /* Set interrupt type prior to possible interrupts */
662 vdev
->interrupt
= VFIO_INT_MSI
;
664 ret
= vfio_enable_vectors(vdev
, false);
667 error_report("vfio: Error: Failed to setup MSI fds: %m");
668 } else if (ret
!= vdev
->nr_vectors
) {
669 error_report("vfio: Error: Failed to enable %d "
670 "MSI vectors, retry with %d", vdev
->nr_vectors
, ret
);
673 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
674 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
675 if (vector
->virq
>= 0) {
676 vfio_remove_kvm_msi_virq(vector
);
678 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
680 event_notifier_cleanup(&vector
->interrupt
);
683 g_free(vdev
->msi_vectors
);
685 if (ret
> 0 && ret
!= vdev
->nr_vectors
) {
686 vdev
->nr_vectors
= ret
;
689 vdev
->nr_vectors
= 0;
692 * Failing to setup MSI doesn't really fall within any specification.
693 * Let's try leaving interrupts disabled and hope the guest figures
694 * out to fall back to INTx for this device.
696 error_report("vfio: Error: Failed to enable MSI");
697 vdev
->interrupt
= VFIO_INT_NONE
;
702 trace_vfio_msi_enable(vdev
->vbasedev
.name
, vdev
->nr_vectors
);
705 static void vfio_msi_disable_common(VFIOPCIDevice
*vdev
)
709 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
710 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
711 if (vdev
->msi_vectors
[i
].use
) {
712 if (vector
->virq
>= 0) {
713 vfio_remove_kvm_msi_virq(vector
);
715 qemu_set_fd_handler(event_notifier_get_fd(&vector
->interrupt
),
717 event_notifier_cleanup(&vector
->interrupt
);
721 g_free(vdev
->msi_vectors
);
722 vdev
->msi_vectors
= NULL
;
723 vdev
->nr_vectors
= 0;
724 vdev
->interrupt
= VFIO_INT_NONE
;
726 vfio_intx_enable(vdev
);
729 static void vfio_msix_disable(VFIOPCIDevice
*vdev
)
733 msix_unset_vector_notifiers(&vdev
->pdev
);
736 * MSI-X will only release vectors if MSI-X is still enabled on the
737 * device, check through the rest and release it ourselves if necessary.
739 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
740 if (vdev
->msi_vectors
[i
].use
) {
741 vfio_msix_vector_release(&vdev
->pdev
, i
);
742 msix_vector_unuse(&vdev
->pdev
, i
);
746 if (vdev
->nr_vectors
) {
747 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSIX_IRQ_INDEX
);
750 vfio_msi_disable_common(vdev
);
752 memset(vdev
->msix
->pending
, 0,
753 BITS_TO_LONGS(vdev
->msix
->entries
) * sizeof(unsigned long));
755 trace_vfio_msix_disable(vdev
->vbasedev
.name
);
758 static void vfio_msi_disable(VFIOPCIDevice
*vdev
)
760 vfio_disable_irqindex(&vdev
->vbasedev
, VFIO_PCI_MSI_IRQ_INDEX
);
761 vfio_msi_disable_common(vdev
);
763 trace_vfio_msi_disable(vdev
->vbasedev
.name
);
766 static void vfio_update_msi(VFIOPCIDevice
*vdev
)
770 for (i
= 0; i
< vdev
->nr_vectors
; i
++) {
771 VFIOMSIVector
*vector
= &vdev
->msi_vectors
[i
];
774 if (!vector
->use
|| vector
->virq
< 0) {
778 msg
= msi_get_message(&vdev
->pdev
, i
);
779 vfio_update_kvm_msi_virq(vector
, msg
, &vdev
->pdev
);
783 static void vfio_pci_load_rom(VFIOPCIDevice
*vdev
)
785 struct vfio_region_info
*reg_info
;
790 if (vfio_get_region_info(&vdev
->vbasedev
,
791 VFIO_PCI_ROM_REGION_INDEX
, ®_info
)) {
792 error_report("vfio: Error getting ROM info: %m");
796 trace_vfio_pci_load_rom(vdev
->vbasedev
.name
, (unsigned long)reg_info
->size
,
797 (unsigned long)reg_info
->offset
,
798 (unsigned long)reg_info
->flags
);
800 vdev
->rom_size
= size
= reg_info
->size
;
801 vdev
->rom_offset
= reg_info
->offset
;
805 if (!vdev
->rom_size
) {
806 vdev
->rom_read_failed
= true;
807 error_report("vfio-pci: Cannot read device rom at "
808 "%s", vdev
->vbasedev
.name
);
809 error_printf("Device option ROM contents are probably invalid "
810 "(check dmesg).\nSkip option ROM probe with rombar=0, "
811 "or load from file with romfile=\n");
815 vdev
->rom
= g_malloc(size
);
816 memset(vdev
->rom
, 0xff, size
);
819 bytes
= pread(vdev
->vbasedev
.fd
, vdev
->rom
+ off
,
820 size
, vdev
->rom_offset
+ off
);
823 } else if (bytes
> 0) {
827 if (errno
== EINTR
|| errno
== EAGAIN
) {
830 error_report("vfio: Error reading device ROM: %m");
836 * Test the ROM signature against our device, if the vendor is correct
837 * but the device ID doesn't match, store the correct device ID and
838 * recompute the checksum. Intel IGD devices need this and are known
839 * to have bogus checksums so we can't simply adjust the checksum.
841 if (pci_get_word(vdev
->rom
) == 0xaa55 &&
842 pci_get_word(vdev
->rom
+ 0x18) + 8 < vdev
->rom_size
&&
843 !memcmp(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18), "PCIR", 4)) {
846 vid
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 4);
847 did
= pci_get_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6);
849 if (vid
== vdev
->vendor_id
&& did
!= vdev
->device_id
) {
851 uint8_t csum
, *data
= vdev
->rom
;
853 pci_set_word(vdev
->rom
+ pci_get_word(vdev
->rom
+ 0x18) + 6,
857 for (csum
= 0, i
= 0; i
< vdev
->rom_size
; i
++) {
866 static uint64_t vfio_rom_read(void *opaque
, hwaddr addr
, unsigned size
)
868 VFIOPCIDevice
*vdev
= opaque
;
877 /* Load the ROM lazily when the guest tries to read it */
878 if (unlikely(!vdev
->rom
&& !vdev
->rom_read_failed
)) {
879 vfio_pci_load_rom(vdev
);
882 memcpy(&val
, vdev
->rom
+ addr
,
883 (addr
< vdev
->rom_size
) ? MIN(size
, vdev
->rom_size
- addr
) : 0);
890 data
= le16_to_cpu(val
.word
);
893 data
= le32_to_cpu(val
.dword
);
896 hw_error("vfio: unsupported read size, %d bytes\n", size
);
900 trace_vfio_rom_read(vdev
->vbasedev
.name
, addr
, size
, data
);
905 static void vfio_rom_write(void *opaque
, hwaddr addr
,
906 uint64_t data
, unsigned size
)
910 static const MemoryRegionOps vfio_rom_ops
= {
911 .read
= vfio_rom_read
,
912 .write
= vfio_rom_write
,
913 .endianness
= DEVICE_LITTLE_ENDIAN
,
916 static void vfio_pci_size_rom(VFIOPCIDevice
*vdev
)
918 uint32_t orig
, size
= cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK
);
919 off_t offset
= vdev
->config_offset
+ PCI_ROM_ADDRESS
;
920 DeviceState
*dev
= DEVICE(vdev
);
922 int fd
= vdev
->vbasedev
.fd
;
924 if (vdev
->pdev
.romfile
|| !vdev
->pdev
.rom_bar
) {
925 /* Since pci handles romfile, just print a message and return */
926 if (vfio_blacklist_opt_rom(vdev
) && vdev
->pdev
.romfile
) {
927 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified romfile\n",
928 vdev
->vbasedev
.name
);
934 * Use the same size ROM BAR as the physical device. The contents
935 * will get filled in later when the guest tries to read it.
937 if (pread(fd
, &orig
, 4, offset
) != 4 ||
938 pwrite(fd
, &size
, 4, offset
) != 4 ||
939 pread(fd
, &size
, 4, offset
) != 4 ||
940 pwrite(fd
, &orig
, 4, offset
) != 4) {
941 error_report("%s(%s) failed: %m", __func__
, vdev
->vbasedev
.name
);
945 size
= ~(le32_to_cpu(size
) & PCI_ROM_ADDRESS_MASK
) + 1;
951 if (vfio_blacklist_opt_rom(vdev
)) {
952 if (dev
->opts
&& qemu_opt_get(dev
->opts
, "rombar")) {
953 error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified non zero value for rombar\n",
954 vdev
->vbasedev
.name
);
956 error_printf("Warning : Rom loading for device at %s has been disabled due to system instability issues. Specify rombar=1 or romfile to force\n",
957 vdev
->vbasedev
.name
);
962 trace_vfio_pci_size_rom(vdev
->vbasedev
.name
, size
);
964 name
= g_strdup_printf("vfio[%s].rom", vdev
->vbasedev
.name
);
966 memory_region_init_io(&vdev
->pdev
.rom
, OBJECT(vdev
),
967 &vfio_rom_ops
, vdev
, name
, size
);
970 pci_register_bar(&vdev
->pdev
, PCI_ROM_SLOT
,
971 PCI_BASE_ADDRESS_SPACE_MEMORY
, &vdev
->pdev
.rom
);
973 vdev
->pdev
.has_rom
= true;
974 vdev
->rom_read_failed
= false;
977 void vfio_vga_write(void *opaque
, hwaddr addr
,
978 uint64_t data
, unsigned size
)
980 VFIOVGARegion
*region
= opaque
;
981 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
988 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
995 buf
.word
= cpu_to_le16(data
);
998 buf
.dword
= cpu_to_le32(data
);
1001 hw_error("vfio: unsupported write size, %d bytes", size
);
1005 if (pwrite(vga
->fd
, &buf
, size
, offset
) != size
) {
1006 error_report("%s(,0x%"HWADDR_PRIx
", 0x%"PRIx64
", %d) failed: %m",
1007 __func__
, region
->offset
+ addr
, data
, size
);
1010 trace_vfio_vga_write(region
->offset
+ addr
, data
, size
);
1013 uint64_t vfio_vga_read(void *opaque
, hwaddr addr
, unsigned size
)
1015 VFIOVGARegion
*region
= opaque
;
1016 VFIOVGA
*vga
= container_of(region
, VFIOVGA
, region
[region
->nr
]);
1024 off_t offset
= vga
->fd_offset
+ region
->offset
+ addr
;
1026 if (pread(vga
->fd
, &buf
, size
, offset
) != size
) {
1027 error_report("%s(,0x%"HWADDR_PRIx
", %d) failed: %m",
1028 __func__
, region
->offset
+ addr
, size
);
1029 return (uint64_t)-1;
1037 data
= le16_to_cpu(buf
.word
);
1040 data
= le32_to_cpu(buf
.dword
);
1043 hw_error("vfio: unsupported read size, %d bytes", size
);
1047 trace_vfio_vga_read(region
->offset
+ addr
, size
, data
);
1052 static const MemoryRegionOps vfio_vga_ops
= {
1053 .read
= vfio_vga_read
,
1054 .write
= vfio_vga_write
,
1055 .endianness
= DEVICE_LITTLE_ENDIAN
,
1061 uint32_t vfio_pci_read_config(PCIDevice
*pdev
, uint32_t addr
, int len
)
1063 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1064 uint32_t emu_bits
= 0, emu_val
= 0, phys_val
= 0, val
;
1066 memcpy(&emu_bits
, vdev
->emulated_config_bits
+ addr
, len
);
1067 emu_bits
= le32_to_cpu(emu_bits
);
1070 emu_val
= pci_default_read_config(pdev
, addr
, len
);
1073 if (~emu_bits
& (0xffffffffU
>> (32 - len
* 8))) {
1076 ret
= pread(vdev
->vbasedev
.fd
, &phys_val
, len
,
1077 vdev
->config_offset
+ addr
);
1079 error_report("%s(%s, 0x%x, 0x%x) failed: %m",
1080 __func__
, vdev
->vbasedev
.name
, addr
, len
);
1083 phys_val
= le32_to_cpu(phys_val
);
1086 val
= (emu_val
& emu_bits
) | (phys_val
& ~emu_bits
);
1088 trace_vfio_pci_read_config(vdev
->vbasedev
.name
, addr
, len
, val
);
1093 void vfio_pci_write_config(PCIDevice
*pdev
,
1094 uint32_t addr
, uint32_t val
, int len
)
1096 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
1097 uint32_t val_le
= cpu_to_le32(val
);
1099 trace_vfio_pci_write_config(vdev
->vbasedev
.name
, addr
, val
, len
);
1101 /* Write everything to VFIO, let it filter out what we can't write */
1102 if (pwrite(vdev
->vbasedev
.fd
, &val_le
, len
, vdev
->config_offset
+ addr
)
1104 error_report("%s(%s, 0x%x, 0x%x, 0x%x) failed: %m",
1105 __func__
, vdev
->vbasedev
.name
, addr
, val
, len
);
1108 /* MSI/MSI-X Enabling/Disabling */
1109 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
&&
1110 ranges_overlap(addr
, len
, pdev
->msi_cap
, vdev
->msi_cap_size
)) {
1111 int is_enabled
, was_enabled
= msi_enabled(pdev
);
1113 pci_default_write_config(pdev
, addr
, val
, len
);
1115 is_enabled
= msi_enabled(pdev
);
1119 vfio_msi_enable(vdev
);
1123 vfio_msi_disable(vdev
);
1125 vfio_update_msi(vdev
);
1128 } else if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
&&
1129 ranges_overlap(addr
, len
, pdev
->msix_cap
, MSIX_CAP_LENGTH
)) {
1130 int is_enabled
, was_enabled
= msix_enabled(pdev
);
1132 pci_default_write_config(pdev
, addr
, val
, len
);
1134 is_enabled
= msix_enabled(pdev
);
1136 if (!was_enabled
&& is_enabled
) {
1137 vfio_msix_enable(vdev
);
1138 } else if (was_enabled
&& !is_enabled
) {
1139 vfio_msix_disable(vdev
);
1142 /* Write everything to QEMU to keep emulated bits correct */
1143 pci_default_write_config(pdev
, addr
, val
, len
);
1150 static void vfio_disable_interrupts(VFIOPCIDevice
*vdev
)
1153 * More complicated than it looks. Disabling MSI/X transitions the
1154 * device to INTx mode (if supported). Therefore we need to first
1155 * disable MSI/X and then cleanup by disabling INTx.
1157 if (vdev
->interrupt
== VFIO_INT_MSIX
) {
1158 vfio_msix_disable(vdev
);
1159 } else if (vdev
->interrupt
== VFIO_INT_MSI
) {
1160 vfio_msi_disable(vdev
);
1163 if (vdev
->interrupt
== VFIO_INT_INTx
) {
1164 vfio_intx_disable(vdev
);
1168 static int vfio_msi_setup(VFIOPCIDevice
*vdev
, int pos
)
1171 bool msi_64bit
, msi_maskbit
;
1175 if (pread(vdev
->vbasedev
.fd
, &ctrl
, sizeof(ctrl
),
1176 vdev
->config_offset
+ pos
+ PCI_CAP_FLAGS
) != sizeof(ctrl
)) {
1179 ctrl
= le16_to_cpu(ctrl
);
1181 msi_64bit
= !!(ctrl
& PCI_MSI_FLAGS_64BIT
);
1182 msi_maskbit
= !!(ctrl
& PCI_MSI_FLAGS_MASKBIT
);
1183 entries
= 1 << ((ctrl
& PCI_MSI_FLAGS_QMASK
) >> 1);
1185 trace_vfio_msi_setup(vdev
->vbasedev
.name
, pos
);
1187 ret
= msi_init(&vdev
->pdev
, pos
, entries
, msi_64bit
, msi_maskbit
, &err
);
1189 if (ret
== -ENOTSUP
) {
1192 error_prepend(&err
, "vfio: msi_init failed: ");
1193 error_report_err(err
);
1196 vdev
->msi_cap_size
= 0xa + (msi_maskbit
? 0xa : 0) + (msi_64bit
? 0x4 : 0);
1201 static void vfio_pci_fixup_msix_region(VFIOPCIDevice
*vdev
)
1204 VFIORegion
*region
= &vdev
->bars
[vdev
->msix
->table_bar
].region
;
1207 * We expect to find a single mmap covering the whole BAR, anything else
1208 * means it's either unsupported or already setup.
1210 if (region
->nr_mmaps
!= 1 || region
->mmaps
[0].offset
||
1211 region
->size
!= region
->mmaps
[0].size
) {
1215 /* MSI-X table start and end aligned to host page size */
1216 start
= vdev
->msix
->table_offset
& qemu_real_host_page_mask
;
1217 end
= REAL_HOST_PAGE_ALIGN((uint64_t)vdev
->msix
->table_offset
+
1218 (vdev
->msix
->entries
* PCI_MSIX_ENTRY_SIZE
));
1221 * Does the MSI-X table cover the beginning of the BAR? The whole BAR?
1222 * NB - Host page size is necessarily a power of two and so is the PCI
1223 * BAR (not counting EA yet), therefore if we have host page aligned
1224 * @start and @end, then any remainder of the BAR before or after those
1225 * must be at least host page sized and therefore mmap'able.
1228 if (end
>= region
->size
) {
1229 region
->nr_mmaps
= 0;
1230 g_free(region
->mmaps
);
1231 region
->mmaps
= NULL
;
1232 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1233 vdev
->msix
->table_bar
, 0, 0);
1235 region
->mmaps
[0].offset
= end
;
1236 region
->mmaps
[0].size
= region
->size
- end
;
1237 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1238 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1239 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1242 /* Maybe it's aligned at the end of the BAR */
1243 } else if (end
>= region
->size
) {
1244 region
->mmaps
[0].size
= start
;
1245 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1246 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1247 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1249 /* Otherwise it must split the BAR */
1251 region
->nr_mmaps
= 2;
1252 region
->mmaps
= g_renew(VFIOMmap
, region
->mmaps
, 2);
1254 memcpy(®ion
->mmaps
[1], ®ion
->mmaps
[0], sizeof(VFIOMmap
));
1256 region
->mmaps
[0].size
= start
;
1257 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1258 vdev
->msix
->table_bar
, region
->mmaps
[0].offset
,
1259 region
->mmaps
[0].offset
+ region
->mmaps
[0].size
);
1261 region
->mmaps
[1].offset
= end
;
1262 region
->mmaps
[1].size
= region
->size
- end
;
1263 trace_vfio_msix_fixup(vdev
->vbasedev
.name
,
1264 vdev
->msix
->table_bar
, region
->mmaps
[1].offset
,
1265 region
->mmaps
[1].offset
+ region
->mmaps
[1].size
);
1270 * We don't have any control over how pci_add_capability() inserts
1271 * capabilities into the chain. In order to setup MSI-X we need a
1272 * MemoryRegion for the BAR. In order to setup the BAR and not
1273 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1274 * need to first look for where the MSI-X table lives. So we
1275 * unfortunately split MSI-X setup across two functions.
1277 static int vfio_msix_early_setup(VFIOPCIDevice
*vdev
)
1281 uint32_t table
, pba
;
1282 int fd
= vdev
->vbasedev
.fd
;
1285 pos
= pci_find_capability(&vdev
->pdev
, PCI_CAP_ID_MSIX
);
1290 if (pread(fd
, &ctrl
, sizeof(ctrl
),
1291 vdev
->config_offset
+ pos
+ PCI_MSIX_FLAGS
) != sizeof(ctrl
)) {
1295 if (pread(fd
, &table
, sizeof(table
),
1296 vdev
->config_offset
+ pos
+ PCI_MSIX_TABLE
) != sizeof(table
)) {
1300 if (pread(fd
, &pba
, sizeof(pba
),
1301 vdev
->config_offset
+ pos
+ PCI_MSIX_PBA
) != sizeof(pba
)) {
1305 ctrl
= le16_to_cpu(ctrl
);
1306 table
= le32_to_cpu(table
);
1307 pba
= le32_to_cpu(pba
);
1309 msix
= g_malloc0(sizeof(*msix
));
1310 msix
->table_bar
= table
& PCI_MSIX_FLAGS_BIRMASK
;
1311 msix
->table_offset
= table
& ~PCI_MSIX_FLAGS_BIRMASK
;
1312 msix
->pba_bar
= pba
& PCI_MSIX_FLAGS_BIRMASK
;
1313 msix
->pba_offset
= pba
& ~PCI_MSIX_FLAGS_BIRMASK
;
1314 msix
->entries
= (ctrl
& PCI_MSIX_FLAGS_QSIZE
) + 1;
1317 * Test the size of the pba_offset variable and catch if it extends outside
1318 * of the specified BAR. If it is the case, we need to apply a hardware
1319 * specific quirk if the device is known or we have a broken configuration.
1321 if (msix
->pba_offset
>= vdev
->bars
[msix
->pba_bar
].region
.size
) {
1323 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5
1324 * adapters. The T5 hardware returns an incorrect value of 0x8000 for
1325 * the VF PBA offset while the BAR itself is only 8k. The correct value
1326 * is 0x1000, so we hard code that here.
1328 if (vdev
->vendor_id
== PCI_VENDOR_ID_CHELSIO
&&
1329 (vdev
->device_id
& 0xff00) == 0x5800) {
1330 msix
->pba_offset
= 0x1000;
1332 error_report("vfio: Hardware reports invalid configuration, "
1333 "MSIX PBA outside of specified BAR");
1339 trace_vfio_msix_early_setup(vdev
->vbasedev
.name
, pos
, msix
->table_bar
,
1340 msix
->table_offset
, msix
->entries
);
1343 vfio_pci_fixup_msix_region(vdev
);
1348 static int vfio_msix_setup(VFIOPCIDevice
*vdev
, int pos
)
1352 vdev
->msix
->pending
= g_malloc0(BITS_TO_LONGS(vdev
->msix
->entries
) *
1353 sizeof(unsigned long));
1354 ret
= msix_init(&vdev
->pdev
, vdev
->msix
->entries
,
1355 vdev
->bars
[vdev
->msix
->table_bar
].region
.mem
,
1356 vdev
->msix
->table_bar
, vdev
->msix
->table_offset
,
1357 vdev
->bars
[vdev
->msix
->pba_bar
].region
.mem
,
1358 vdev
->msix
->pba_bar
, vdev
->msix
->pba_offset
, pos
);
1360 if (ret
== -ENOTSUP
) {
1363 error_report("vfio: msix_init failed");
1368 * The PCI spec suggests that devices provide additional alignment for
1369 * MSI-X structures and avoid overlapping non-MSI-X related registers.
1370 * For an assigned device, this hopefully means that emulation of MSI-X
1371 * structures does not affect the performance of the device. If devices
1372 * fail to provide that alignment, a significant performance penalty may
1373 * result, for instance Mellanox MT27500 VFs:
1374 * http://www.spinics.net/lists/kvm/msg125881.html
1376 * The PBA is simply not that important for such a serious regression and
1377 * most drivers do not appear to look at it. The solution for this is to
1378 * disable the PBA MemoryRegion unless it's being used. We disable it
1379 * here and only enable it if a masked vector fires through QEMU. As the
1380 * vector-use notifier is called, which occurs on unmask, we test whether
1381 * PBA emulation is needed and again disable if not.
1383 memory_region_set_enabled(&vdev
->pdev
.msix_pba_mmio
, false);
1388 static void vfio_teardown_msi(VFIOPCIDevice
*vdev
)
1390 msi_uninit(&vdev
->pdev
);
1393 msix_uninit(&vdev
->pdev
,
1394 vdev
->bars
[vdev
->msix
->table_bar
].region
.mem
,
1395 vdev
->bars
[vdev
->msix
->pba_bar
].region
.mem
);
1396 g_free(vdev
->msix
->pending
);
1403 static void vfio_mmap_set_enabled(VFIOPCIDevice
*vdev
, bool enabled
)
1407 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1408 vfio_region_mmaps_set_enabled(&vdev
->bars
[i
].region
, enabled
);
1412 static void vfio_bar_setup(VFIOPCIDevice
*vdev
, int nr
)
1414 VFIOBAR
*bar
= &vdev
->bars
[nr
];
1420 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1421 if (!bar
->region
.size
) {
1425 /* Determine what type of BAR this is for registration */
1426 ret
= pread(vdev
->vbasedev
.fd
, &pci_bar
, sizeof(pci_bar
),
1427 vdev
->config_offset
+ PCI_BASE_ADDRESS_0
+ (4 * nr
));
1428 if (ret
!= sizeof(pci_bar
)) {
1429 error_report("vfio: Failed to read BAR %d (%m)", nr
);
1433 pci_bar
= le32_to_cpu(pci_bar
);
1434 bar
->ioport
= (pci_bar
& PCI_BASE_ADDRESS_SPACE_IO
);
1435 bar
->mem64
= bar
->ioport
? 0 : (pci_bar
& PCI_BASE_ADDRESS_MEM_TYPE_64
);
1436 type
= pci_bar
& (bar
->ioport
? ~PCI_BASE_ADDRESS_IO_MASK
:
1437 ~PCI_BASE_ADDRESS_MEM_MASK
);
1439 if (vfio_region_mmap(&bar
->region
)) {
1440 error_report("Failed to mmap %s BAR %d. Performance may be slow",
1441 vdev
->vbasedev
.name
, nr
);
1444 pci_register_bar(&vdev
->pdev
, nr
, type
, bar
->region
.mem
);
1447 static void vfio_bars_setup(VFIOPCIDevice
*vdev
)
1451 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1452 vfio_bar_setup(vdev
, i
);
1456 static void vfio_bars_exit(VFIOPCIDevice
*vdev
)
1460 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1461 vfio_bar_quirk_exit(vdev
, i
);
1462 vfio_region_exit(&vdev
->bars
[i
].region
);
1466 pci_unregister_vga(&vdev
->pdev
);
1467 vfio_vga_quirk_exit(vdev
);
1471 static void vfio_bars_finalize(VFIOPCIDevice
*vdev
)
1475 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
1476 vfio_bar_quirk_finalize(vdev
, i
);
1477 vfio_region_finalize(&vdev
->bars
[i
].region
);
1481 vfio_vga_quirk_finalize(vdev
);
1482 for (i
= 0; i
< ARRAY_SIZE(vdev
->vga
->region
); i
++) {
1483 object_unparent(OBJECT(&vdev
->vga
->region
[i
].mem
));
1492 static uint8_t vfio_std_cap_max_size(PCIDevice
*pdev
, uint8_t pos
)
1495 uint16_t next
= PCI_CONFIG_SPACE_SIZE
;
1497 for (tmp
= pdev
->config
[PCI_CAPABILITY_LIST
]; tmp
;
1498 tmp
= pdev
->config
[tmp
+ PCI_CAP_LIST_NEXT
]) {
1499 if (tmp
> pos
&& tmp
< next
) {
1508 static uint16_t vfio_ext_cap_max_size(const uint8_t *config
, uint16_t pos
)
1510 uint16_t tmp
, next
= PCIE_CONFIG_SPACE_SIZE
;
1512 for (tmp
= PCI_CONFIG_SPACE_SIZE
; tmp
;
1513 tmp
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ tmp
))) {
1514 if (tmp
> pos
&& tmp
< next
) {
1522 static void vfio_set_word_bits(uint8_t *buf
, uint16_t val
, uint16_t mask
)
1524 pci_set_word(buf
, (pci_get_word(buf
) & ~mask
) | val
);
1527 static void vfio_add_emulated_word(VFIOPCIDevice
*vdev
, int pos
,
1528 uint16_t val
, uint16_t mask
)
1530 vfio_set_word_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1531 vfio_set_word_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1532 vfio_set_word_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1535 static void vfio_set_long_bits(uint8_t *buf
, uint32_t val
, uint32_t mask
)
1537 pci_set_long(buf
, (pci_get_long(buf
) & ~mask
) | val
);
1540 static void vfio_add_emulated_long(VFIOPCIDevice
*vdev
, int pos
,
1541 uint32_t val
, uint32_t mask
)
1543 vfio_set_long_bits(vdev
->pdev
.config
+ pos
, val
, mask
);
1544 vfio_set_long_bits(vdev
->pdev
.wmask
+ pos
, ~mask
, mask
);
1545 vfio_set_long_bits(vdev
->emulated_config_bits
+ pos
, mask
, mask
);
1548 static int vfio_setup_pcie_cap(VFIOPCIDevice
*vdev
, int pos
, uint8_t size
)
1553 flags
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_CAP_FLAGS
);
1554 type
= (flags
& PCI_EXP_FLAGS_TYPE
) >> 4;
1556 if (type
!= PCI_EXP_TYPE_ENDPOINT
&&
1557 type
!= PCI_EXP_TYPE_LEG_END
&&
1558 type
!= PCI_EXP_TYPE_RC_END
) {
1560 error_report("vfio: Assignment of PCIe type 0x%x "
1561 "devices is not currently supported", type
);
1565 if (!pci_bus_is_express(vdev
->pdev
.bus
)) {
1566 PCIBus
*bus
= vdev
->pdev
.bus
;
1570 * Traditionally PCI device assignment exposes the PCIe capability
1571 * as-is on non-express buses. The reason being that some drivers
1572 * simply assume that it's there, for example tg3. However when
1573 * we're running on a native PCIe machine type, like Q35, we need
1574 * to hide the PCIe capability. The reason for this is twofold;
1575 * first Windows guests get a Code 10 error when the PCIe capability
1576 * is exposed in this configuration. Therefore express devices won't
1577 * work at all unless they're attached to express buses in the VM.
1578 * Second, a native PCIe machine introduces the possibility of fine
1579 * granularity IOMMUs supporting both translation and isolation.
1580 * Guest code to discover the IOMMU visibility of a device, such as
1581 * IOMMU grouping code on Linux, is very aware of device types and
1582 * valid transitions between bus types. An express device on a non-
1583 * express bus is not a valid combination on bare metal systems.
1585 * Drivers that require a PCIe capability to make the device
1586 * functional are simply going to need to have their devices placed
1587 * on a PCIe bus in the VM.
1589 while (!pci_bus_is_root(bus
)) {
1590 bridge
= pci_bridge_get_device(bus
);
1594 if (pci_bus_is_express(bus
)) {
1598 } else if (pci_bus_is_root(vdev
->pdev
.bus
)) {
1600 * On a Root Complex bus Endpoints become Root Complex Integrated
1601 * Endpoints, which changes the type and clears the LNK & LNK2 fields.
1603 if (type
== PCI_EXP_TYPE_ENDPOINT
) {
1604 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1605 PCI_EXP_TYPE_RC_END
<< 4,
1606 PCI_EXP_FLAGS_TYPE
);
1608 /* Link Capabilities, Status, and Control goes away */
1609 if (size
> PCI_EXP_LNKCTL
) {
1610 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
, 0, ~0);
1611 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1612 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
, 0, ~0);
1614 #ifndef PCI_EXP_LNKCAP2
1615 #define PCI_EXP_LNKCAP2 44
1617 #ifndef PCI_EXP_LNKSTA2
1618 #define PCI_EXP_LNKSTA2 50
1620 /* Link 2 Capabilities, Status, and Control goes away */
1621 if (size
> PCI_EXP_LNKCAP2
) {
1622 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP2
, 0, ~0);
1623 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL2
, 0, ~0);
1624 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA2
, 0, ~0);
1628 } else if (type
== PCI_EXP_TYPE_LEG_END
) {
1630 * Legacy endpoints don't belong on the root complex. Windows
1631 * seems to be happier with devices if we skip the capability.
1638 * Convert Root Complex Integrated Endpoints to regular endpoints.
1639 * These devices don't support LNK/LNK2 capabilities, so make them up.
1641 if (type
== PCI_EXP_TYPE_RC_END
) {
1642 vfio_add_emulated_word(vdev
, pos
+ PCI_CAP_FLAGS
,
1643 PCI_EXP_TYPE_ENDPOINT
<< 4,
1644 PCI_EXP_FLAGS_TYPE
);
1645 vfio_add_emulated_long(vdev
, pos
+ PCI_EXP_LNKCAP
,
1646 PCI_EXP_LNK_MLW_1
| PCI_EXP_LNK_LS_25
, ~0);
1647 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKCTL
, 0, ~0);
1650 /* Mark the Link Status bits as emulated to allow virtual negotiation */
1651 vfio_add_emulated_word(vdev
, pos
+ PCI_EXP_LNKSTA
,
1652 pci_get_word(vdev
->pdev
.config
+ pos
+
1654 PCI_EXP_LNKCAP_MLW
| PCI_EXP_LNKCAP_SLS
);
1657 pos
= pci_add_capability(&vdev
->pdev
, PCI_CAP_ID_EXP
, pos
, size
);
1659 vdev
->pdev
.exp
.exp_cap
= pos
;
1665 static void vfio_check_pcie_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1667 uint32_t cap
= pci_get_long(vdev
->pdev
.config
+ pos
+ PCI_EXP_DEVCAP
);
1669 if (cap
& PCI_EXP_DEVCAP_FLR
) {
1670 trace_vfio_check_pcie_flr(vdev
->vbasedev
.name
);
1671 vdev
->has_flr
= true;
1675 static void vfio_check_pm_reset(VFIOPCIDevice
*vdev
, uint8_t pos
)
1677 uint16_t csr
= pci_get_word(vdev
->pdev
.config
+ pos
+ PCI_PM_CTRL
);
1679 if (!(csr
& PCI_PM_CTRL_NO_SOFT_RESET
)) {
1680 trace_vfio_check_pm_reset(vdev
->vbasedev
.name
);
1681 vdev
->has_pm_reset
= true;
1685 static void vfio_check_af_flr(VFIOPCIDevice
*vdev
, uint8_t pos
)
1687 uint8_t cap
= pci_get_byte(vdev
->pdev
.config
+ pos
+ PCI_AF_CAP
);
1689 if ((cap
& PCI_AF_CAP_TP
) && (cap
& PCI_AF_CAP_FLR
)) {
1690 trace_vfio_check_af_flr(vdev
->vbasedev
.name
);
1691 vdev
->has_flr
= true;
1695 static int vfio_add_std_cap(VFIOPCIDevice
*vdev
, uint8_t pos
)
1697 PCIDevice
*pdev
= &vdev
->pdev
;
1698 uint8_t cap_id
, next
, size
;
1701 cap_id
= pdev
->config
[pos
];
1702 next
= pdev
->config
[pos
+ PCI_CAP_LIST_NEXT
];
1705 * If it becomes important to configure capabilities to their actual
1706 * size, use this as the default when it's something we don't recognize.
1707 * Since QEMU doesn't actually handle many of the config accesses,
1708 * exact size doesn't seem worthwhile.
1710 size
= vfio_std_cap_max_size(pdev
, pos
);
1713 * pci_add_capability always inserts the new capability at the head
1714 * of the chain. Therefore to end up with a chain that matches the
1715 * physical device, we insert from the end by making this recursive.
1716 * This is also why we pre-calculate size above as cached config space
1717 * will be changed as we unwind the stack.
1720 ret
= vfio_add_std_cap(vdev
, next
);
1725 /* Begin the rebuild, use QEMU emulated list bits */
1726 pdev
->config
[PCI_CAPABILITY_LIST
] = 0;
1727 vdev
->emulated_config_bits
[PCI_CAPABILITY_LIST
] = 0xff;
1728 vdev
->emulated_config_bits
[PCI_STATUS
] |= PCI_STATUS_CAP_LIST
;
1731 /* Use emulated next pointer to allow dropping caps */
1732 pci_set_byte(vdev
->emulated_config_bits
+ pos
+ PCI_CAP_LIST_NEXT
, 0xff);
1735 case PCI_CAP_ID_MSI
:
1736 ret
= vfio_msi_setup(vdev
, pos
);
1738 case PCI_CAP_ID_EXP
:
1739 vfio_check_pcie_flr(vdev
, pos
);
1740 ret
= vfio_setup_pcie_cap(vdev
, pos
, size
);
1742 case PCI_CAP_ID_MSIX
:
1743 ret
= vfio_msix_setup(vdev
, pos
);
1746 vfio_check_pm_reset(vdev
, pos
);
1748 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
);
1751 vfio_check_af_flr(vdev
, pos
);
1752 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
);
1755 ret
= pci_add_capability(pdev
, cap_id
, pos
, size
);
1760 error_report("vfio: %s Error adding PCI capability "
1761 "0x%x[0x%x]@0x%x: %d", vdev
->vbasedev
.name
,
1762 cap_id
, size
, pos
, ret
);
1769 static int vfio_add_ext_cap(VFIOPCIDevice
*vdev
)
1771 PCIDevice
*pdev
= &vdev
->pdev
;
1773 uint16_t cap_id
, next
, size
;
1777 /* Only add extended caps if we have them and the guest can see them */
1778 if (!pci_is_express(pdev
) || !pci_bus_is_express(pdev
->bus
) ||
1779 !pci_get_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
)) {
1784 * pcie_add_capability always inserts the new capability at the tail
1785 * of the chain. Therefore to end up with a chain that matches the
1786 * physical device, we cache the config space to avoid overwriting
1787 * the original config space when we parse the extended capabilities.
1789 config
= g_memdup(pdev
->config
, vdev
->config_size
);
1792 * Extended capabilities are chained with each pointing to the next, so we
1793 * can drop anything other than the head of the chain simply by modifying
1794 * the previous next pointer. For the head of the chain, we can modify the
1795 * capability ID to something that cannot match a valid capability. ID
1796 * 0 is reserved for this since absence of capabilities is indicated by
1797 * 0 for the ID, version, AND next pointer. However, pcie_add_capability()
1798 * uses ID 0 as reserved for list management and will incorrectly match and
1799 * assert if we attempt to pre-load the head of the chain with with this
1800 * ID. Use ID 0xFFFF temporarily since it is also seems to be reserved in
1801 * part for identifying absence of capabilities in a root complex register
1802 * block. If the ID still exists after adding capabilities, switch back to
1803 * zero. We'll mark this entire first dword as emulated for this purpose.
1805 pci_set_long(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
,
1806 PCI_EXT_CAP(0xFFFF, 0, 0));
1807 pci_set_long(pdev
->wmask
+ PCI_CONFIG_SPACE_SIZE
, 0);
1808 pci_set_long(vdev
->emulated_config_bits
+ PCI_CONFIG_SPACE_SIZE
, ~0);
1810 for (next
= PCI_CONFIG_SPACE_SIZE
; next
;
1811 next
= PCI_EXT_CAP_NEXT(pci_get_long(config
+ next
))) {
1812 header
= pci_get_long(config
+ next
);
1813 cap_id
= PCI_EXT_CAP_ID(header
);
1814 cap_ver
= PCI_EXT_CAP_VER(header
);
1817 * If it becomes important to configure extended capabilities to their
1818 * actual size, use this as the default when it's something we don't
1819 * recognize. Since QEMU doesn't actually handle many of the config
1820 * accesses, exact size doesn't seem worthwhile.
1822 size
= vfio_ext_cap_max_size(config
, next
);
1824 /* Use emulated next pointer to allow dropping extended caps */
1825 pci_long_test_and_set_mask(vdev
->emulated_config_bits
+ next
,
1826 PCI_EXT_CAP_NEXT_MASK
);
1829 case PCI_EXT_CAP_ID_SRIOV
: /* Read-only VF BARs confuse OVMF */
1830 case PCI_EXT_CAP_ID_ARI
: /* XXX Needs next function virtualization */
1831 trace_vfio_add_ext_cap_dropped(vdev
->vbasedev
.name
, cap_id
, next
);
1834 pcie_add_capability(pdev
, cap_id
, cap_ver
, next
, size
);
1839 /* Cleanup chain head ID if necessary */
1840 if (pci_get_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
) == 0xFFFF) {
1841 pci_set_word(pdev
->config
+ PCI_CONFIG_SPACE_SIZE
, 0);
1848 static int vfio_add_capabilities(VFIOPCIDevice
*vdev
)
1850 PCIDevice
*pdev
= &vdev
->pdev
;
1853 if (!(pdev
->config
[PCI_STATUS
] & PCI_STATUS_CAP_LIST
) ||
1854 !pdev
->config
[PCI_CAPABILITY_LIST
]) {
1855 return 0; /* Nothing to add */
1858 ret
= vfio_add_std_cap(vdev
, pdev
->config
[PCI_CAPABILITY_LIST
]);
1863 return vfio_add_ext_cap(vdev
);
1866 static void vfio_pci_pre_reset(VFIOPCIDevice
*vdev
)
1868 PCIDevice
*pdev
= &vdev
->pdev
;
1871 vfio_disable_interrupts(vdev
);
1873 /* Make sure the device is in D0 */
1878 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
1879 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
1881 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
1882 vfio_pci_write_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, pmcsr
, 2);
1883 /* vfio handles the necessary delay here */
1884 pmcsr
= vfio_pci_read_config(pdev
, vdev
->pm_cap
+ PCI_PM_CTRL
, 2);
1885 state
= pmcsr
& PCI_PM_CTRL_STATE_MASK
;
1887 error_report("vfio: Unable to power on device, stuck in D%d",
1894 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1895 * Also put INTx Disable in known state.
1897 cmd
= vfio_pci_read_config(pdev
, PCI_COMMAND
, 2);
1898 cmd
&= ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
1899 PCI_COMMAND_INTX_DISABLE
);
1900 vfio_pci_write_config(pdev
, PCI_COMMAND
, cmd
, 2);
1903 static void vfio_pci_post_reset(VFIOPCIDevice
*vdev
)
1905 vfio_intx_enable(vdev
);
1908 static bool vfio_pci_host_match(PCIHostDeviceAddress
*addr
, const char *name
)
1912 sprintf(tmp
, "%04x:%02x:%02x.%1x", addr
->domain
,
1913 addr
->bus
, addr
->slot
, addr
->function
);
1915 return (strcmp(tmp
, name
) == 0);
1918 static int vfio_pci_hot_reset(VFIOPCIDevice
*vdev
, bool single
)
1921 struct vfio_pci_hot_reset_info
*info
;
1922 struct vfio_pci_dependent_device
*devices
;
1923 struct vfio_pci_hot_reset
*reset
;
1928 trace_vfio_pci_hot_reset(vdev
->vbasedev
.name
, single
? "one" : "multi");
1930 vfio_pci_pre_reset(vdev
);
1931 vdev
->vbasedev
.needs_reset
= false;
1933 info
= g_malloc0(sizeof(*info
));
1934 info
->argsz
= sizeof(*info
);
1936 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
1937 if (ret
&& errno
!= ENOSPC
) {
1939 if (!vdev
->has_pm_reset
) {
1940 error_report("vfio: Cannot reset device %s, "
1941 "no available reset mechanism.", vdev
->vbasedev
.name
);
1946 count
= info
->count
;
1947 info
= g_realloc(info
, sizeof(*info
) + (count
* sizeof(*devices
)));
1948 info
->argsz
= sizeof(*info
) + (count
* sizeof(*devices
));
1949 devices
= &info
->devices
[0];
1951 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO
, info
);
1954 error_report("vfio: hot reset info failed: %m");
1958 trace_vfio_pci_hot_reset_has_dep_devices(vdev
->vbasedev
.name
);
1960 /* Verify that we have all the groups required */
1961 for (i
= 0; i
< info
->count
; i
++) {
1962 PCIHostDeviceAddress host
;
1964 VFIODevice
*vbasedev_iter
;
1966 host
.domain
= devices
[i
].segment
;
1967 host
.bus
= devices
[i
].bus
;
1968 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
1969 host
.function
= PCI_FUNC(devices
[i
].devfn
);
1971 trace_vfio_pci_hot_reset_dep_devices(host
.domain
,
1972 host
.bus
, host
.slot
, host
.function
, devices
[i
].group_id
);
1974 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
1978 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
1979 if (group
->groupid
== devices
[i
].group_id
) {
1985 if (!vdev
->has_pm_reset
) {
1986 error_report("vfio: Cannot reset device %s, "
1987 "depends on group %d which is not owned.",
1988 vdev
->vbasedev
.name
, devices
[i
].group_id
);
1994 /* Prep dependent devices for reset and clear our marker. */
1995 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
1996 if (vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
1999 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2000 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2005 vfio_pci_pre_reset(tmp
);
2006 tmp
->vbasedev
.needs_reset
= false;
2013 if (!single
&& !multi
) {
2018 /* Determine how many group fds need to be passed */
2020 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2021 for (i
= 0; i
< info
->count
; i
++) {
2022 if (group
->groupid
== devices
[i
].group_id
) {
2029 reset
= g_malloc0(sizeof(*reset
) + (count
* sizeof(*fds
)));
2030 reset
->argsz
= sizeof(*reset
) + (count
* sizeof(*fds
));
2031 fds
= &reset
->group_fds
[0];
2033 /* Fill in group fds */
2034 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2035 for (i
= 0; i
< info
->count
; i
++) {
2036 if (group
->groupid
== devices
[i
].group_id
) {
2037 fds
[reset
->count
++] = group
->fd
;
2044 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_PCI_HOT_RESET
, reset
);
2047 trace_vfio_pci_hot_reset_result(vdev
->vbasedev
.name
,
2048 ret
? "%m" : "Success");
2051 /* Re-enable INTx on affected devices */
2052 for (i
= 0; i
< info
->count
; i
++) {
2053 PCIHostDeviceAddress host
;
2055 VFIODevice
*vbasedev_iter
;
2057 host
.domain
= devices
[i
].segment
;
2058 host
.bus
= devices
[i
].bus
;
2059 host
.slot
= PCI_SLOT(devices
[i
].devfn
);
2060 host
.function
= PCI_FUNC(devices
[i
].devfn
);
2062 if (vfio_pci_host_match(&host
, vdev
->vbasedev
.name
)) {
2066 QLIST_FOREACH(group
, &vfio_group_list
, next
) {
2067 if (group
->groupid
== devices
[i
].group_id
) {
2076 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2077 if (vbasedev_iter
->type
!= VFIO_DEVICE_TYPE_PCI
) {
2080 tmp
= container_of(vbasedev_iter
, VFIOPCIDevice
, vbasedev
);
2081 if (vfio_pci_host_match(&host
, tmp
->vbasedev
.name
)) {
2082 vfio_pci_post_reset(tmp
);
2088 vfio_pci_post_reset(vdev
);
2095 * We want to differentiate hot reset of mulitple in-use devices vs hot reset
2096 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case
2097 * of doing hot resets when there is only a single device per bus. The in-use
2098 * here refers to how many VFIODevices are affected. A hot reset that affects
2099 * multiple devices, but only a single in-use device, means that we can call
2100 * it from our bus ->reset() callback since the extent is effectively a single
2101 * device. This allows us to make use of it in the hotplug path. When there
2102 * are multiple in-use devices, we can only trigger the hot reset during a
2103 * system reset and thus from our reset handler. We separate _one vs _multi
2104 * here so that we don't overlap and do a double reset on the system reset
2105 * path where both our reset handler and ->reset() callback are used. Calling
2106 * _one() will only do a hot reset for the one in-use devices case, calling
2107 * _multi() will do nothing if a _one() would have been sufficient.
2109 static int vfio_pci_hot_reset_one(VFIOPCIDevice
*vdev
)
2111 return vfio_pci_hot_reset(vdev
, true);
2114 static int vfio_pci_hot_reset_multi(VFIODevice
*vbasedev
)
2116 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2117 return vfio_pci_hot_reset(vdev
, false);
2120 static void vfio_pci_compute_needs_reset(VFIODevice
*vbasedev
)
2122 VFIOPCIDevice
*vdev
= container_of(vbasedev
, VFIOPCIDevice
, vbasedev
);
2123 if (!vbasedev
->reset_works
|| (!vdev
->has_flr
&& vdev
->has_pm_reset
)) {
2124 vbasedev
->needs_reset
= true;
2128 static VFIODeviceOps vfio_pci_ops
= {
2129 .vfio_compute_needs_reset
= vfio_pci_compute_needs_reset
,
2130 .vfio_hot_reset_multi
= vfio_pci_hot_reset_multi
,
2131 .vfio_eoi
= vfio_intx_eoi
,
2134 int vfio_populate_vga(VFIOPCIDevice
*vdev
)
2136 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2137 struct vfio_region_info
*reg_info
;
2140 ret
= vfio_get_region_info(vbasedev
, VFIO_PCI_VGA_REGION_INDEX
, ®_info
);
2145 if (!(reg_info
->flags
& VFIO_REGION_INFO_FLAG_READ
) ||
2146 !(reg_info
->flags
& VFIO_REGION_INFO_FLAG_WRITE
) ||
2147 reg_info
->size
< 0xbffff + 1) {
2148 error_report("vfio: Unexpected VGA info, flags 0x%lx, size 0x%lx",
2149 (unsigned long)reg_info
->flags
,
2150 (unsigned long)reg_info
->size
);
2155 vdev
->vga
= g_new0(VFIOVGA
, 1);
2157 vdev
->vga
->fd_offset
= reg_info
->offset
;
2158 vdev
->vga
->fd
= vdev
->vbasedev
.fd
;
2162 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].offset
= QEMU_PCI_VGA_MEM_BASE
;
2163 vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].nr
= QEMU_PCI_VGA_MEM
;
2164 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].quirks
);
2166 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2167 OBJECT(vdev
), &vfio_vga_ops
,
2168 &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
],
2169 "vfio-vga-mmio@0xa0000",
2170 QEMU_PCI_VGA_MEM_SIZE
);
2172 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].offset
= QEMU_PCI_VGA_IO_LO_BASE
;
2173 vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].nr
= QEMU_PCI_VGA_IO_LO
;
2174 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].quirks
);
2176 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2177 OBJECT(vdev
), &vfio_vga_ops
,
2178 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
],
2179 "vfio-vga-io@0x3b0",
2180 QEMU_PCI_VGA_IO_LO_SIZE
);
2182 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].offset
= QEMU_PCI_VGA_IO_HI_BASE
;
2183 vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].nr
= QEMU_PCI_VGA_IO_HI
;
2184 QLIST_INIT(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].quirks
);
2186 memory_region_init_io(&vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
,
2187 OBJECT(vdev
), &vfio_vga_ops
,
2188 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
],
2189 "vfio-vga-io@0x3c0",
2190 QEMU_PCI_VGA_IO_HI_SIZE
);
2192 pci_register_vga(&vdev
->pdev
, &vdev
->vga
->region
[QEMU_PCI_VGA_MEM
].mem
,
2193 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_LO
].mem
,
2194 &vdev
->vga
->region
[QEMU_PCI_VGA_IO_HI
].mem
);
2199 static int vfio_populate_device(VFIOPCIDevice
*vdev
)
2201 VFIODevice
*vbasedev
= &vdev
->vbasedev
;
2202 struct vfio_region_info
*reg_info
;
2203 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
) };
2206 /* Sanity check device */
2207 if (!(vbasedev
->flags
& VFIO_DEVICE_FLAGS_PCI
)) {
2208 error_report("vfio: Um, this isn't a PCI device");
2212 if (vbasedev
->num_regions
< VFIO_PCI_CONFIG_REGION_INDEX
+ 1) {
2213 error_report("vfio: unexpected number of io regions %u",
2214 vbasedev
->num_regions
);
2218 if (vbasedev
->num_irqs
< VFIO_PCI_MSIX_IRQ_INDEX
+ 1) {
2219 error_report("vfio: unexpected number of irqs %u", vbasedev
->num_irqs
);
2223 for (i
= VFIO_PCI_BAR0_REGION_INDEX
; i
< VFIO_PCI_ROM_REGION_INDEX
; i
++) {
2224 char *name
= g_strdup_printf("%s BAR %d", vbasedev
->name
, i
);
2226 ret
= vfio_region_setup(OBJECT(vdev
), vbasedev
,
2227 &vdev
->bars
[i
].region
, i
, name
);
2231 error_report("vfio: Error getting region %d info: %m", i
);
2235 QLIST_INIT(&vdev
->bars
[i
].quirks
);
2238 ret
= vfio_get_region_info(vbasedev
,
2239 VFIO_PCI_CONFIG_REGION_INDEX
, ®_info
);
2241 error_report("vfio: Error getting config info: %m");
2245 trace_vfio_populate_device_config(vdev
->vbasedev
.name
,
2246 (unsigned long)reg_info
->size
,
2247 (unsigned long)reg_info
->offset
,
2248 (unsigned long)reg_info
->flags
);
2250 vdev
->config_size
= reg_info
->size
;
2251 if (vdev
->config_size
== PCI_CONFIG_SPACE_SIZE
) {
2252 vdev
->pdev
.cap_present
&= ~QEMU_PCI_CAP_EXPRESS
;
2254 vdev
->config_offset
= reg_info
->offset
;
2258 if (vdev
->features
& VFIO_FEATURE_ENABLE_VGA
) {
2259 ret
= vfio_populate_vga(vdev
);
2262 "vfio: Device does not support requested feature x-vga");
2267 irq_info
.index
= VFIO_PCI_ERR_IRQ_INDEX
;
2269 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
);
2271 /* This can fail for an old kernel or legacy PCI dev */
2272 trace_vfio_populate_device_get_irq_info_failure();
2274 } else if (irq_info
.count
== 1) {
2275 vdev
->pci_aer
= true;
2277 error_report("vfio: %s "
2278 "Could not enable error recovery for the device",
2286 static void vfio_put_device(VFIOPCIDevice
*vdev
)
2288 g_free(vdev
->vbasedev
.name
);
2291 vfio_put_base_device(&vdev
->vbasedev
);
2294 static void vfio_err_notifier_handler(void *opaque
)
2296 VFIOPCIDevice
*vdev
= opaque
;
2298 if (!event_notifier_test_and_clear(&vdev
->err_notifier
)) {
2303 * TBD. Retrieve the error details and decide what action
2304 * needs to be taken. One of the actions could be to pass
2305 * the error to the guest and have the guest driver recover
2306 * from the error. This requires that PCIe capabilities be
2307 * exposed to the guest. For now, we just terminate the
2308 * guest to contain the error.
2311 error_report("%s(%s) Unrecoverable error detected. Please collect any data possible and then kill the guest", __func__
, vdev
->vbasedev
.name
);
2313 vm_stop(RUN_STATE_INTERNAL_ERROR
);
2317 * Registers error notifier for devices supporting error recovery.
2318 * If we encounter a failure in this function, we report an error
2319 * and continue after disabling error recovery support for the
2322 static void vfio_register_err_notifier(VFIOPCIDevice
*vdev
)
2326 struct vfio_irq_set
*irq_set
;
2329 if (!vdev
->pci_aer
) {
2333 if (event_notifier_init(&vdev
->err_notifier
, 0)) {
2334 error_report("vfio: Unable to init event notifier for error detection");
2335 vdev
->pci_aer
= false;
2339 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2341 irq_set
= g_malloc0(argsz
);
2342 irq_set
->argsz
= argsz
;
2343 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2344 VFIO_IRQ_SET_ACTION_TRIGGER
;
2345 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2348 pfd
= (int32_t *)&irq_set
->data
;
2350 *pfd
= event_notifier_get_fd(&vdev
->err_notifier
);
2351 qemu_set_fd_handler(*pfd
, vfio_err_notifier_handler
, NULL
, vdev
);
2353 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2355 error_report("vfio: Failed to set up error notification");
2356 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2357 event_notifier_cleanup(&vdev
->err_notifier
);
2358 vdev
->pci_aer
= false;
2363 static void vfio_unregister_err_notifier(VFIOPCIDevice
*vdev
)
2366 struct vfio_irq_set
*irq_set
;
2370 if (!vdev
->pci_aer
) {
2374 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2376 irq_set
= g_malloc0(argsz
);
2377 irq_set
->argsz
= argsz
;
2378 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2379 VFIO_IRQ_SET_ACTION_TRIGGER
;
2380 irq_set
->index
= VFIO_PCI_ERR_IRQ_INDEX
;
2383 pfd
= (int32_t *)&irq_set
->data
;
2386 ret
= ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
);
2388 error_report("vfio: Failed to de-assign error fd: %m");
2391 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->err_notifier
),
2393 event_notifier_cleanup(&vdev
->err_notifier
);
2396 static void vfio_req_notifier_handler(void *opaque
)
2398 VFIOPCIDevice
*vdev
= opaque
;
2400 if (!event_notifier_test_and_clear(&vdev
->req_notifier
)) {
2404 qdev_unplug(&vdev
->pdev
.qdev
, NULL
);
2407 static void vfio_register_req_notifier(VFIOPCIDevice
*vdev
)
2409 struct vfio_irq_info irq_info
= { .argsz
= sizeof(irq_info
),
2410 .index
= VFIO_PCI_REQ_IRQ_INDEX
};
2412 struct vfio_irq_set
*irq_set
;
2415 if (!(vdev
->features
& VFIO_FEATURE_ENABLE_REQ
)) {
2419 if (ioctl(vdev
->vbasedev
.fd
,
2420 VFIO_DEVICE_GET_IRQ_INFO
, &irq_info
) < 0 || irq_info
.count
< 1) {
2424 if (event_notifier_init(&vdev
->req_notifier
, 0)) {
2425 error_report("vfio: Unable to init event notifier for device request");
2429 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2431 irq_set
= g_malloc0(argsz
);
2432 irq_set
->argsz
= argsz
;
2433 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2434 VFIO_IRQ_SET_ACTION_TRIGGER
;
2435 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2438 pfd
= (int32_t *)&irq_set
->data
;
2440 *pfd
= event_notifier_get_fd(&vdev
->req_notifier
);
2441 qemu_set_fd_handler(*pfd
, vfio_req_notifier_handler
, NULL
, vdev
);
2443 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2444 error_report("vfio: Failed to set up device request notification");
2445 qemu_set_fd_handler(*pfd
, NULL
, NULL
, vdev
);
2446 event_notifier_cleanup(&vdev
->req_notifier
);
2448 vdev
->req_enabled
= true;
2454 static void vfio_unregister_req_notifier(VFIOPCIDevice
*vdev
)
2457 struct vfio_irq_set
*irq_set
;
2460 if (!vdev
->req_enabled
) {
2464 argsz
= sizeof(*irq_set
) + sizeof(*pfd
);
2466 irq_set
= g_malloc0(argsz
);
2467 irq_set
->argsz
= argsz
;
2468 irq_set
->flags
= VFIO_IRQ_SET_DATA_EVENTFD
|
2469 VFIO_IRQ_SET_ACTION_TRIGGER
;
2470 irq_set
->index
= VFIO_PCI_REQ_IRQ_INDEX
;
2473 pfd
= (int32_t *)&irq_set
->data
;
2476 if (ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_SET_IRQS
, irq_set
)) {
2477 error_report("vfio: Failed to de-assign device request fd: %m");
2480 qemu_set_fd_handler(event_notifier_get_fd(&vdev
->req_notifier
),
2482 event_notifier_cleanup(&vdev
->req_notifier
);
2484 vdev
->req_enabled
= false;
2487 static int vfio_initfn(PCIDevice
*pdev
)
2489 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2490 VFIODevice
*vbasedev_iter
;
2492 char *tmp
, group_path
[PATH_MAX
], *group_name
;
2498 if (!vdev
->vbasedev
.sysfsdev
) {
2499 vdev
->vbasedev
.sysfsdev
=
2500 g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%01x",
2501 vdev
->host
.domain
, vdev
->host
.bus
,
2502 vdev
->host
.slot
, vdev
->host
.function
);
2505 if (stat(vdev
->vbasedev
.sysfsdev
, &st
) < 0) {
2506 error_report("vfio: error: no such host device: %s",
2507 vdev
->vbasedev
.sysfsdev
);
2511 vdev
->vbasedev
.name
= g_strdup(basename(vdev
->vbasedev
.sysfsdev
));
2512 vdev
->vbasedev
.ops
= &vfio_pci_ops
;
2513 vdev
->vbasedev
.type
= VFIO_DEVICE_TYPE_PCI
;
2515 tmp
= g_strdup_printf("%s/iommu_group", vdev
->vbasedev
.sysfsdev
);
2516 len
= readlink(tmp
, group_path
, sizeof(group_path
));
2519 if (len
<= 0 || len
>= sizeof(group_path
)) {
2520 error_report("vfio: error no iommu_group for device");
2521 return len
< 0 ? -errno
: -ENAMETOOLONG
;
2524 group_path
[len
] = 0;
2526 group_name
= basename(group_path
);
2527 if (sscanf(group_name
, "%d", &groupid
) != 1) {
2528 error_report("vfio: error reading %s: %m", group_path
);
2532 trace_vfio_initfn(vdev
->vbasedev
.name
, groupid
);
2534 group
= vfio_get_group(groupid
, pci_device_iommu_address_space(pdev
));
2536 error_report("vfio: failed to get group %d", groupid
);
2540 QLIST_FOREACH(vbasedev_iter
, &group
->device_list
, next
) {
2541 if (strcmp(vbasedev_iter
->name
, vdev
->vbasedev
.name
) == 0) {
2542 error_report("vfio: error: device %s is already attached",
2543 vdev
->vbasedev
.name
);
2544 vfio_put_group(group
);
2549 ret
= vfio_get_device(group
, vdev
->vbasedev
.name
, &vdev
->vbasedev
);
2551 error_report("vfio: failed to get device %s", vdev
->vbasedev
.name
);
2552 vfio_put_group(group
);
2556 ret
= vfio_populate_device(vdev
);
2561 /* Get a copy of config space */
2562 ret
= pread(vdev
->vbasedev
.fd
, vdev
->pdev
.config
,
2563 MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
),
2564 vdev
->config_offset
);
2565 if (ret
< (int)MIN(pci_config_size(&vdev
->pdev
), vdev
->config_size
)) {
2566 ret
= ret
< 0 ? -errno
: -EFAULT
;
2567 error_report("vfio: Failed to read device config space");
2571 /* vfio emulates a lot for us, but some bits need extra love */
2572 vdev
->emulated_config_bits
= g_malloc0(vdev
->config_size
);
2574 /* QEMU can choose to expose the ROM or not */
2575 memset(vdev
->emulated_config_bits
+ PCI_ROM_ADDRESS
, 0xff, 4);
2578 * The PCI spec reserves vendor ID 0xffff as an invalid value. The
2579 * device ID is managed by the vendor and need only be a 16-bit value.
2580 * Allow any 16-bit value for subsystem so they can be hidden or changed.
2582 if (vdev
->vendor_id
!= PCI_ANY_ID
) {
2583 if (vdev
->vendor_id
>= 0xffff) {
2584 error_report("vfio: Invalid PCI vendor ID provided");
2587 vfio_add_emulated_word(vdev
, PCI_VENDOR_ID
, vdev
->vendor_id
, ~0);
2588 trace_vfio_pci_emulated_vendor_id(vdev
->vbasedev
.name
, vdev
->vendor_id
);
2590 vdev
->vendor_id
= pci_get_word(pdev
->config
+ PCI_VENDOR_ID
);
2593 if (vdev
->device_id
!= PCI_ANY_ID
) {
2594 if (vdev
->device_id
> 0xffff) {
2595 error_report("vfio: Invalid PCI device ID provided");
2598 vfio_add_emulated_word(vdev
, PCI_DEVICE_ID
, vdev
->device_id
, ~0);
2599 trace_vfio_pci_emulated_device_id(vdev
->vbasedev
.name
, vdev
->device_id
);
2601 vdev
->device_id
= pci_get_word(pdev
->config
+ PCI_DEVICE_ID
);
2604 if (vdev
->sub_vendor_id
!= PCI_ANY_ID
) {
2605 if (vdev
->sub_vendor_id
> 0xffff) {
2606 error_report("vfio: Invalid PCI subsystem vendor ID provided");
2609 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_VENDOR_ID
,
2610 vdev
->sub_vendor_id
, ~0);
2611 trace_vfio_pci_emulated_sub_vendor_id(vdev
->vbasedev
.name
,
2612 vdev
->sub_vendor_id
);
2615 if (vdev
->sub_device_id
!= PCI_ANY_ID
) {
2616 if (vdev
->sub_device_id
> 0xffff) {
2617 error_report("vfio: Invalid PCI subsystem device ID provided");
2620 vfio_add_emulated_word(vdev
, PCI_SUBSYSTEM_ID
, vdev
->sub_device_id
, ~0);
2621 trace_vfio_pci_emulated_sub_device_id(vdev
->vbasedev
.name
,
2622 vdev
->sub_device_id
);
2625 /* QEMU can change multi-function devices to single function, or reverse */
2626 vdev
->emulated_config_bits
[PCI_HEADER_TYPE
] =
2627 PCI_HEADER_TYPE_MULTI_FUNCTION
;
2629 /* Restore or clear multifunction, this is always controlled by QEMU */
2630 if (vdev
->pdev
.cap_present
& QEMU_PCI_CAP_MULTIFUNCTION
) {
2631 vdev
->pdev
.config
[PCI_HEADER_TYPE
] |= PCI_HEADER_TYPE_MULTI_FUNCTION
;
2633 vdev
->pdev
.config
[PCI_HEADER_TYPE
] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION
;
2637 * Clear host resource mapping info. If we choose not to register a
2638 * BAR, such as might be the case with the option ROM, we can get
2639 * confusing, unwritable, residual addresses from the host here.
2641 memset(&vdev
->pdev
.config
[PCI_BASE_ADDRESS_0
], 0, 24);
2642 memset(&vdev
->pdev
.config
[PCI_ROM_ADDRESS
], 0, 4);
2644 vfio_pci_size_rom(vdev
);
2646 ret
= vfio_msix_early_setup(vdev
);
2651 vfio_bars_setup(vdev
);
2653 ret
= vfio_add_capabilities(vdev
);
2659 vfio_vga_quirk_setup(vdev
);
2662 for (i
= 0; i
< PCI_ROM_SLOT
; i
++) {
2663 vfio_bar_quirk_setup(vdev
, i
);
2666 if (!vdev
->igd_opregion
&&
2667 vdev
->features
& VFIO_FEATURE_ENABLE_IGD_OPREGION
) {
2668 struct vfio_region_info
*opregion
;
2670 if (vdev
->pdev
.qdev
.hotplugged
) {
2671 error_report("Cannot support IGD OpRegion feature on hotplugged "
2672 "device %s", vdev
->vbasedev
.name
);
2677 ret
= vfio_get_dev_region_info(&vdev
->vbasedev
,
2678 VFIO_REGION_TYPE_PCI_VENDOR_TYPE
| PCI_VENDOR_ID_INTEL
,
2679 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION
, &opregion
);
2681 error_report("Device %s does not support requested IGD OpRegion "
2682 "feature", vdev
->vbasedev
.name
);
2686 ret
= vfio_pci_igd_opregion_init(vdev
, opregion
);
2689 error_report("Device %s IGD OpRegion initialization failed",
2690 vdev
->vbasedev
.name
);
2695 /* QEMU emulates all of MSI & MSIX */
2696 if (pdev
->cap_present
& QEMU_PCI_CAP_MSIX
) {
2697 memset(vdev
->emulated_config_bits
+ pdev
->msix_cap
, 0xff,
2701 if (pdev
->cap_present
& QEMU_PCI_CAP_MSI
) {
2702 memset(vdev
->emulated_config_bits
+ pdev
->msi_cap
, 0xff,
2703 vdev
->msi_cap_size
);
2706 if (vfio_pci_read_config(&vdev
->pdev
, PCI_INTERRUPT_PIN
, 1)) {
2707 vdev
->intx
.mmap_timer
= timer_new_ms(QEMU_CLOCK_VIRTUAL
,
2708 vfio_intx_mmap_enable
, vdev
);
2709 pci_device_set_intx_routing_notifier(&vdev
->pdev
, vfio_intx_update
);
2710 ret
= vfio_intx_enable(vdev
);
2716 vfio_register_err_notifier(vdev
);
2717 vfio_register_req_notifier(vdev
);
2718 vfio_setup_resetfn_quirk(vdev
);
2723 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
2724 vfio_teardown_msi(vdev
);
2725 vfio_bars_exit(vdev
);
2729 static void vfio_instance_finalize(Object
*obj
)
2731 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
2732 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pci_dev
);
2733 VFIOGroup
*group
= vdev
->vbasedev
.group
;
2735 vfio_bars_finalize(vdev
);
2736 g_free(vdev
->emulated_config_bits
);
2739 * XXX Leaking igd_opregion is not an oversight, we can't remove the
2740 * fw_cfg entry therefore leaking this allocation seems like the safest
2743 * g_free(vdev->igd_opregion);
2745 vfio_put_device(vdev
);
2746 vfio_put_group(group
);
2749 static void vfio_exitfn(PCIDevice
*pdev
)
2751 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2753 vfio_unregister_req_notifier(vdev
);
2754 vfio_unregister_err_notifier(vdev
);
2755 pci_device_set_intx_routing_notifier(&vdev
->pdev
, NULL
);
2756 vfio_disable_interrupts(vdev
);
2757 if (vdev
->intx
.mmap_timer
) {
2758 timer_free(vdev
->intx
.mmap_timer
);
2760 vfio_teardown_msi(vdev
);
2761 vfio_bars_exit(vdev
);
2764 static void vfio_pci_reset(DeviceState
*dev
)
2766 PCIDevice
*pdev
= DO_UPCAST(PCIDevice
, qdev
, dev
);
2767 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, pdev
);
2769 trace_vfio_pci_reset(vdev
->vbasedev
.name
);
2771 vfio_pci_pre_reset(vdev
);
2773 if (vdev
->resetfn
&& !vdev
->resetfn(vdev
)) {
2777 if (vdev
->vbasedev
.reset_works
&&
2778 (vdev
->has_flr
|| !vdev
->has_pm_reset
) &&
2779 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
2780 trace_vfio_pci_reset_flr(vdev
->vbasedev
.name
);
2784 /* See if we can do our own bus reset */
2785 if (!vfio_pci_hot_reset_one(vdev
)) {
2789 /* If nothing else works and the device supports PM reset, use it */
2790 if (vdev
->vbasedev
.reset_works
&& vdev
->has_pm_reset
&&
2791 !ioctl(vdev
->vbasedev
.fd
, VFIO_DEVICE_RESET
)) {
2792 trace_vfio_pci_reset_pm(vdev
->vbasedev
.name
);
2797 vfio_pci_post_reset(vdev
);
2800 static void vfio_instance_init(Object
*obj
)
2802 PCIDevice
*pci_dev
= PCI_DEVICE(obj
);
2803 VFIOPCIDevice
*vdev
= DO_UPCAST(VFIOPCIDevice
, pdev
, PCI_DEVICE(obj
));
2805 device_add_bootindex_property(obj
, &vdev
->bootindex
,
2807 &pci_dev
->qdev
, NULL
);
2810 static Property vfio_pci_dev_properties
[] = {
2811 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice
, host
),
2812 DEFINE_PROP_STRING("sysfsdev", VFIOPCIDevice
, vbasedev
.sysfsdev
),
2813 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice
,
2814 intx
.mmap_timeout
, 1100),
2815 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice
, features
,
2816 VFIO_FEATURE_ENABLE_VGA_BIT
, false),
2817 DEFINE_PROP_BIT("x-req", VFIOPCIDevice
, features
,
2818 VFIO_FEATURE_ENABLE_REQ_BIT
, true),
2819 DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice
, features
,
2820 VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT
, false),
2821 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice
, vbasedev
.no_mmap
, false),
2822 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice
, no_kvm_intx
, false),
2823 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice
, no_kvm_msi
, false),
2824 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice
, no_kvm_msix
, false),
2825 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice
, vendor_id
, PCI_ANY_ID
),
2826 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice
, device_id
, PCI_ANY_ID
),
2827 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice
,
2828 sub_vendor_id
, PCI_ANY_ID
),
2829 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice
,
2830 sub_device_id
, PCI_ANY_ID
),
2831 DEFINE_PROP_UINT32("x-igd-gms", VFIOPCIDevice
, igd_gms
, 0),
2833 * TODO - support passed fds... is this necessary?
2834 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
2835 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
2837 DEFINE_PROP_END_OF_LIST(),
2840 static const VMStateDescription vfio_pci_vmstate
= {
2845 static void vfio_pci_dev_class_init(ObjectClass
*klass
, void *data
)
2847 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2848 PCIDeviceClass
*pdc
= PCI_DEVICE_CLASS(klass
);
2850 dc
->reset
= vfio_pci_reset
;
2851 dc
->props
= vfio_pci_dev_properties
;
2852 dc
->vmsd
= &vfio_pci_vmstate
;
2853 dc
->desc
= "VFIO-based PCI device assignment";
2854 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
2855 pdc
->init
= vfio_initfn
;
2856 pdc
->exit
= vfio_exitfn
;
2857 pdc
->config_read
= vfio_pci_read_config
;
2858 pdc
->config_write
= vfio_pci_write_config
;
2859 pdc
->is_express
= 1; /* We might be */
2862 static const TypeInfo vfio_pci_dev_info
= {
2864 .parent
= TYPE_PCI_DEVICE
,
2865 .instance_size
= sizeof(VFIOPCIDevice
),
2866 .class_init
= vfio_pci_dev_class_init
,
2867 .instance_init
= vfio_instance_init
,
2868 .instance_finalize
= vfio_instance_finalize
,
2871 static void register_vfio_pci_dev_type(void)
2873 type_register_static(&vfio_pci_dev_info
);
2876 type_init(register_vfio_pci_dev_type
)