qcow2: style fixes in qcow2-cache.c
[qemu.git] / hw / i2c / versatile_i2c.c
blob3c0c2c10675e58d9a612c4d669cb8eb2d11ecc10
1 /*
2 * ARM Versatile I2C controller
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
7 * This file is derived from hw/realview.c by Paul Brook
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #include "hw/sysbus.h"
25 #include "bitbang_i2c.h"
27 #define TYPE_VERSATILE_I2C "versatile_i2c"
28 #define VERSATILE_I2C(obj) \
29 OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
31 typedef struct VersatileI2CState {
32 SysBusDevice parent_obj;
34 MemoryRegion iomem;
35 bitbang_i2c_interface *bitbang;
36 int out;
37 int in;
38 } VersatileI2CState;
40 static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
41 unsigned size)
43 VersatileI2CState *s = (VersatileI2CState *)opaque;
45 if (offset == 0) {
46 return (s->out & 1) | (s->in << 1);
47 } else {
48 qemu_log_mask(LOG_GUEST_ERROR,
49 "%s: Bad offset 0x%x\n", __func__, (int)offset);
50 return -1;
54 static void versatile_i2c_write(void *opaque, hwaddr offset,
55 uint64_t value, unsigned size)
57 VersatileI2CState *s = (VersatileI2CState *)opaque;
59 switch (offset) {
60 case 0:
61 s->out |= value & 3;
62 break;
63 case 4:
64 s->out &= ~value;
65 break;
66 default:
67 qemu_log_mask(LOG_GUEST_ERROR,
68 "%s: Bad offset 0x%x\n", __func__, (int)offset);
70 bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
71 s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
74 static const MemoryRegionOps versatile_i2c_ops = {
75 .read = versatile_i2c_read,
76 .write = versatile_i2c_write,
77 .endianness = DEVICE_NATIVE_ENDIAN,
80 static int versatile_i2c_init(SysBusDevice *sbd)
82 DeviceState *dev = DEVICE(sbd);
83 VersatileI2CState *s = VERSATILE_I2C(dev);
84 I2CBus *bus;
86 bus = i2c_init_bus(dev, "i2c");
87 s->bitbang = bitbang_i2c_init(bus);
88 memory_region_init_io(&s->iomem, OBJECT(s), &versatile_i2c_ops, s,
89 "versatile_i2c", 0x1000);
90 sysbus_init_mmio(sbd, &s->iomem);
91 return 0;
94 static void versatile_i2c_class_init(ObjectClass *klass, void *data)
96 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
98 k->init = versatile_i2c_init;
101 static const TypeInfo versatile_i2c_info = {
102 .name = TYPE_VERSATILE_I2C,
103 .parent = TYPE_SYS_BUS_DEVICE,
104 .instance_size = sizeof(VersatileI2CState),
105 .class_init = versatile_i2c_class_init,
108 static void versatile_i2c_register_types(void)
110 type_register_static(&versatile_i2c_info);
113 type_init(versatile_i2c_register_types)