linux-user/microblaze/cpu_loop.c

   1 /*
   2  *  qemu user cpu loop
   3  *
   4  *  Copyright (c) 2003-2008 Fabrice Bellard
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu-common.h"
  22 #include "qemu.h"
  23 #include "user-internals.h"
  24 #include "cpu_loop-common.h"
  25 #include "signal-common.h"
  26
  27 void cpu_loop(CPUMBState *env)
  28 {
  29     CPUState *cs = env_cpu(env);
  30     int trapnr, ret, si_code;
  31
  32     while (1) {
  33         cpu_exec_start(cs);
  34         trapnr = cpu_exec(cs);
  35         cpu_exec_end(cs);
  36         process_queued_cpu_work(cs);
  37
  38         switch (trapnr) {
  39         case EXCP_INTERRUPT:
  40             /* just indicate that signals should be handled asap */
  41             break;
  42         case EXCP_SYSCALL:
  43             /* Return address is 4 bytes after the call.  */
  44             env->regs[14] += 4;
  45             env->pc = env->regs[14];
  46             ret = do_syscall(env,
  47                              env->regs[12],
  48                              env->regs[5],
  49                              env->regs[6],
  50                              env->regs[7],
  51                              env->regs[8],
  52                              env->regs[9],
  53                              env->regs[10],
  54                              0, 0);
  55             if (ret == -QEMU_ERESTARTSYS) {
  56                 /* Wind back to before the syscall. */
  57                 env->pc -= 4;
  58             } else if (ret != -QEMU_ESIGRETURN) {
  59                 env->regs[3] = ret;
  60             }
  61             /* All syscall exits result in guest r14 being equal to the
  62              * PC we return to, because the kernel syscall exit "rtbd" does
  63              * this. (This is true even for sigreturn(); note that r14 is
  64              * not a userspace-usable register, as the kernel may clobber it
  65              * at any point.)
  66              */
  67             env->regs[14] = env->pc;
  68             break;
  69
  70         case EXCP_HW_EXCP:
  71             env->regs[17] = env->pc + 4;
  72             if (env->iflags & D_FLAG) {
  73                 env->esr |= 1 << 12;
  74                 env->pc -= 4;
  75                 /* FIXME: if branch was immed, replay the imm as well.  */
  76             }
  77             env->iflags &= ~(IMM_FLAG | D_FLAG);
  78             switch (env->esr & 31) {
  79             case ESR_EC_DIVZERO:
  80                 si_code = TARGET_FPE_INTDIV;
  81                 break;
  82             case ESR_EC_FPU:
  83                 /*
  84                  * Note that the kernel passes along fsr as si_code
  85                  * if there's no recognized bit set.  Possibly this
  86                  * implies that si_code is 0, but follow the structure.
  87                  */
  88                 si_code = env->fsr;
  89                 if (si_code & FSR_IO) {
  90                     si_code = TARGET_FPE_FLTINV;
  91                 } else if (si_code & FSR_OF) {
  92                     si_code = TARGET_FPE_FLTOVF;
  93                 } else if (si_code & FSR_UF) {
  94                     si_code = TARGET_FPE_FLTUND;
  95                 } else if (si_code & FSR_DZ) {
  96                     si_code = TARGET_FPE_FLTDIV;
  97                 } else if (si_code & FSR_DO) {
  98                     si_code = TARGET_FPE_FLTRES;
  99                 }
 100                 break;
 101             default:
 102                 fprintf(stderr, "Unhandled hw-exception: 0x%x\n",
 103                         env->esr & ESR_EC_MASK);
 104                 cpu_dump_state(cs, stderr, 0);
 105                 exit(EXIT_FAILURE);
 106             }
 107             force_sig_fault(TARGET_SIGFPE, si_code, env->pc);
 108             break;
 109
 110         case EXCP_DEBUG:
 111             force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
 112             break;
 113         case EXCP_ATOMIC:
 114             cpu_exec_step_atomic(cs);
 115             break;
 116         default:
 117             fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
 118             cpu_dump_state(cs, stderr, 0);
 119             exit(EXIT_FAILURE);
 120         }
 121         process_pending_signals (env);
 122     }
 123 }
 124
 125 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
 126 {
 127     env->regs[0] = regs->r0;
 128     env->regs[1] = regs->r1;
 129     env->regs[2] = regs->r2;
 130     env->regs[3] = regs->r3;
 131     env->regs[4] = regs->r4;
 132     env->regs[5] = regs->r5;
 133     env->regs[6] = regs->r6;
 134     env->regs[7] = regs->r7;
 135     env->regs[8] = regs->r8;
 136     env->regs[9] = regs->r9;
 137     env->regs[10] = regs->r10;
 138     env->regs[11] = regs->r11;
 139     env->regs[12] = regs->r12;
 140     env->regs[13] = regs->r13;
 141     env->regs[14] = regs->r14;
 142     env->regs[15] = regs->r15;
 143     env->regs[16] = regs->r16;
 144     env->regs[17] = regs->r17;
 145     env->regs[18] = regs->r18;
 146     env->regs[19] = regs->r19;
 147     env->regs[20] = regs->r20;
 148     env->regs[21] = regs->r21;
 149     env->regs[22] = regs->r22;
 150     env->regs[23] = regs->r23;
 151     env->regs[24] = regs->r24;
 152     env->regs[25] = regs->r25;
 153     env->regs[26] = regs->r26;
 154     env->regs[27] = regs->r27;
 155     env->regs[28] = regs->r28;
 156     env->regs[29] = regs->r29;
 157     env->regs[30] = regs->r30;
 158     env->regs[31] = regs->r31;
 159     env->pc = regs->pc;
 160 }