2 * QEMU fulong 2e mini pc support
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
11 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
12 * http://www.linux-mips.org/wiki/Fulong
14 * Loongson 2e user manual:
15 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
27 #include "mips_cpudevs.h"
30 #include "qemu-char.h"
32 #include "audio/audio.h"
35 #include "mips-bios.h"
39 #include "mc146818rtc.h"
41 #include "exec-memory.h"
43 #define DEBUG_FULONG2E_INIT
45 #define ENVP_ADDR 0x80002000l
46 #define ENVP_NB_ENTRIES 16
47 #define ENVP_ENTRY_SIZE 256
52 * PMON is not part of qemu and released with BSD license, anyone
53 * who want to build a pmon binary please first git-clone the source
54 * from the git repository at:
55 * http://www.loongson.cn/support/git/pmon
56 * Then follow the "Compile Guide" available at:
57 * http://dev.lemote.com/code/pmon
60 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
61 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
62 * in the "Compile Guide".
64 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
66 /* PCI SLOT in fulong 2e */
67 #define FULONG2E_VIA_SLOT 5
68 #define FULONG2E_ATI_SLOT 6
69 #define FULONG2E_RTL8139_SLOT 7
71 static ISADevice
*pit
;
73 static struct _loaderparams
{
75 const char *kernel_filename
;
76 const char *kernel_cmdline
;
77 const char *initrd_filename
;
80 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf
, int index
,
81 const char *string
, ...)
86 if (index
>= ENVP_NB_ENTRIES
)
94 table_addr
= sizeof(int32_t) * ENVP_NB_ENTRIES
+ index
* ENVP_ENTRY_SIZE
;
95 prom_buf
[index
] = tswap32(ENVP_ADDR
+ table_addr
);
98 vsnprintf((char *)prom_buf
+ table_addr
, ENVP_ENTRY_SIZE
, string
, ap
);
102 static int64_t load_kernel (CPUState
*env
)
104 int64_t kernel_entry
, kernel_low
, kernel_high
;
107 ram_addr_t initrd_offset
;
111 if (load_elf(loaderparams
.kernel_filename
, cpu_mips_kseg0_to_phys
, NULL
,
112 (uint64_t *)&kernel_entry
, (uint64_t *)&kernel_low
,
113 (uint64_t *)&kernel_high
, 0, ELF_MACHINE
, 1) < 0) {
114 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
115 loaderparams
.kernel_filename
);
122 if (loaderparams
.initrd_filename
) {
123 initrd_size
= get_image_size (loaderparams
.initrd_filename
);
124 if (initrd_size
> 0) {
125 initrd_offset
= (kernel_high
+ ~TARGET_PAGE_MASK
) & TARGET_PAGE_MASK
;
126 if (initrd_offset
+ initrd_size
> ram_size
) {
128 "qemu: memory too small for initial ram disk '%s'\n",
129 loaderparams
.initrd_filename
);
132 initrd_size
= load_image_targphys(loaderparams
.initrd_filename
,
133 initrd_offset
, ram_size
- initrd_offset
);
135 if (initrd_size
== (target_ulong
) -1) {
136 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
137 loaderparams
.initrd_filename
);
142 /* Setup prom parameters. */
143 prom_size
= ENVP_NB_ENTRIES
* (sizeof(int32_t) + ENVP_ENTRY_SIZE
);
144 prom_buf
= g_malloc(prom_size
);
146 prom_set(prom_buf
, index
++, "%s", loaderparams
.kernel_filename
);
147 if (initrd_size
> 0) {
148 prom_set(prom_buf
, index
++, "rd_start=0x%" PRIx64
" rd_size=%li %s",
149 cpu_mips_phys_to_kseg0(NULL
, initrd_offset
), initrd_size
,
150 loaderparams
.kernel_cmdline
);
152 prom_set(prom_buf
, index
++, "%s", loaderparams
.kernel_cmdline
);
155 /* Setup minimum environment variables */
156 prom_set(prom_buf
, index
++, "busclock=33000000");
157 prom_set(prom_buf
, index
++, "cpuclock=100000000");
158 prom_set(prom_buf
, index
++, "memsize=%i", loaderparams
.ram_size
/1024/1024);
159 prom_set(prom_buf
, index
++, "modetty0=38400n8r");
160 prom_set(prom_buf
, index
++, NULL
);
162 rom_add_blob_fixed("prom", prom_buf
, prom_size
,
163 cpu_mips_kseg0_to_phys(NULL
, ENVP_ADDR
));
168 static void write_bootloader (CPUState
*env
, uint8_t *base
, int64_t kernel_addr
)
172 /* Small bootloader */
173 p
= (uint32_t *) base
;
175 stl_raw(p
++, 0x0bf00010); /* j 0x1fc00040 */
176 stl_raw(p
++, 0x00000000); /* nop */
178 /* Second part of the bootloader */
179 p
= (uint32_t *) (base
+ 0x040);
181 stl_raw(p
++, 0x3c040000); /* lui a0, 0 */
182 stl_raw(p
++, 0x34840002); /* ori a0, a0, 2 */
183 stl_raw(p
++, 0x3c050000 | ((ENVP_ADDR
>> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
184 stl_raw(p
++, 0x34a50000 | (ENVP_ADDR
& 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
185 stl_raw(p
++, 0x3c060000 | (((ENVP_ADDR
+ 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
186 stl_raw(p
++, 0x34c60000 | ((ENVP_ADDR
+ 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
187 stl_raw(p
++, 0x3c070000 | (loaderparams
.ram_size
>> 16)); /* lui a3, high(env->ram_size) */
188 stl_raw(p
++, 0x34e70000 | (loaderparams
.ram_size
& 0xffff)); /* ori a3, a3, low(env->ram_size) */
189 stl_raw(p
++, 0x3c1f0000 | ((kernel_addr
>> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
190 stl_raw(p
++, 0x37ff0000 | (kernel_addr
& 0xffff)); /* ori ra, ra, low(kernel_addr) */
191 stl_raw(p
++, 0x03e00008); /* jr ra */
192 stl_raw(p
++, 0x00000000); /* nop */
196 static void main_cpu_reset(void *opaque
)
198 CPUState
*env
= opaque
;
201 /* TODO: 2E reset stuff */
202 if (loaderparams
.kernel_filename
) {
203 env
->CP0_Status
&= ~((1 << CP0St_BEV
) | (1 << CP0St_ERL
));
207 uint8_t eeprom_spd
[0x80] = {
208 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
209 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
210 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
211 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
212 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
213 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
214 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
215 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
216 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
217 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
222 static void audio_init (PCIBus
*pci_bus
)
224 vt82c686b_ac97_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 5));
225 vt82c686b_mc97_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 6));
228 /* Network support */
229 static void network_init (void)
233 for(i
= 0; i
< nb_nics
; i
++) {
234 NICInfo
*nd
= &nd_table
[i
];
235 const char *default_devaddr
= NULL
;
237 if (i
== 0 && (!nd
->model
|| strcmp(nd
->model
, "rtl8139") == 0)) {
238 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
239 default_devaddr
= "07";
242 pci_nic_init_nofail(nd
, "rtl8139", default_devaddr
);
246 static void cpu_request_exit(void *opaque
, int irq
, int level
)
248 CPUState
*env
= cpu_single_env
;
255 static void mips_fulong2e_init(ram_addr_t ram_size
, const char *boot_device
,
256 const char *kernel_filename
, const char *kernel_cmdline
,
257 const char *initrd_filename
, const char *cpu_model
)
260 MemoryRegion
*address_space_mem
= get_system_memory();
261 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
262 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
264 int64_t kernel_entry
;
266 qemu_irq
*cpu_exit_irq
;
271 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
275 if (cpu_model
== NULL
) {
276 cpu_model
= "Loongson-2E";
278 env
= cpu_init(cpu_model
);
280 fprintf(stderr
, "Unable to find CPU definition\n");
284 register_savevm(NULL
, "cpu", 0, 3, cpu_save
, cpu_load
, env
);
285 qemu_register_reset(main_cpu_reset
, env
);
287 /* fulong 2e has 256M ram. */
288 ram_size
= 256 * 1024 * 1024;
290 /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
291 bios_size
= 1024 * 1024;
294 memory_region_init_ram(ram
, NULL
, "fulong2e.ram", ram_size
);
295 memory_region_init_ram(bios
, NULL
, "fulong2e.bios", bios_size
);
296 memory_region_set_readonly(bios
, true);
298 memory_region_add_subregion(address_space_mem
, 0, ram
);
299 memory_region_add_subregion(address_space_mem
, 0x1fc00000LL
, bios
);
301 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
302 * Please use -L to set the BIOS path and -bios to set bios name. */
304 if (kernel_filename
) {
305 loaderparams
.ram_size
= ram_size
;
306 loaderparams
.kernel_filename
= kernel_filename
;
307 loaderparams
.kernel_cmdline
= kernel_cmdline
;
308 loaderparams
.initrd_filename
= initrd_filename
;
309 kernel_entry
= load_kernel (env
);
310 write_bootloader(env
, memory_region_get_ram_ptr(bios
), kernel_entry
);
312 if (bios_name
== NULL
) {
313 bios_name
= FULONG_BIOSNAME
;
315 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
317 bios_size
= load_image_targphys(filename
, 0x1fc00000LL
,
324 if ((bios_size
< 0 || bios_size
> BIOS_SIZE
) && !kernel_filename
) {
325 fprintf(stderr
, "qemu: Could not load MIPS bios '%s'\n", bios_name
);
330 /* Init internal devices */
331 cpu_mips_irq_init_cpu(env
);
332 cpu_mips_clock_init(env
);
334 /* Interrupt controller */
335 /* The 8259 -> IP5 */
336 i8259
= i8259_init(env
->irq
[5]);
338 /* North bridge, Bonito --> IP2 */
339 pci_bus
= bonito_init((qemu_irq
*)&(env
->irq
[2]));
342 ide_drive_get(hd
, MAX_IDE_BUS
);
344 via_devfn
= vt82c686b_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 0));
346 fprintf(stderr
, "vt82c686b_init error \n");
351 vt82c686b_ide_init(pci_bus
, hd
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 1));
352 usb_uhci_vt82c686b_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 2));
353 usb_uhci_vt82c686b_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 3));
355 smbus
= vt82c686b_pm_init(pci_bus
, PCI_DEVFN(FULONG2E_VIA_SLOT
, 4),
357 /* TODO: Populate SPD eeprom data. */
358 smbus_eeprom_init(smbus
, 1, eeprom_spd
, sizeof(eeprom_spd
));
360 /* init other devices */
361 pit
= pit_init(0x40, 0);
362 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
363 DMA_init(0, cpu_exit_irq
);
366 isa_create_simple("i8042");
368 rtc_init(2000, NULL
);
370 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
372 serial_isa_init(i
, serial_hds
[i
]);
376 if (parallel_hds
[0]) {
377 parallel_init(0, parallel_hds
[0]);
386 QEMUMachine mips_fulong2e_machine
= {
388 .desc
= "Fulong 2e mini pc",
389 .init
= mips_fulong2e_init
,
392 static void mips_fulong2e_machine_init(void)
394 qemu_register_machine(&mips_fulong2e_machine
);
397 machine_init(mips_fulong2e_machine_init
);