hw/milkymist-sysctl.c

   1 /*
   2  *  QEMU model of the Milkymist System Controller.
   3  *
   4  *  Copyright (c) 2010 Michael Walle <michael@walle.cc>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  *
  19  *
  20  * Specification available at:
  21  *   http://www.milkymist.org/socdoc/sysctl.pdf
  22  */
  23
  24 #include "hw.h"
  25 #include "sysbus.h"
  26 #include "sysemu.h"
  27 #include "trace.h"
  28 #include "qemu-timer.h"
  29 #include "qemu-error.h"
  30
  31 enum {
  32     CTRL_ENABLE      = (1<<0),
  33     CTRL_AUTORESTART = (1<<1),
  34 };
  35
  36 enum {
  37     ICAP_READY       = (1<<0),
  38 };
  39
  40 enum {
  41     R_GPIO_IN = 0,
  42     R_GPIO_OUT,
  43     R_GPIO_INTEN,
  44     R_RESERVED0,
  45     R_TIMER0_CONTROL,
  46     R_TIMER0_COMPARE,
  47     R_TIMER0_COUNTER,
  48     R_RESERVED1,
  49     R_TIMER1_CONTROL,
  50     R_TIMER1_COMPARE,
  51     R_TIMER1_COUNTER,
  52     R_RESERVED2,
  53     R_RESERVED3,
  54     R_ICAP,
  55     R_CAPABILITIES,
  56     R_SYSTEM_ID,
  57     R_MAX
  58 };
  59
  60 struct MilkymistSysctlState {
  61     SysBusDevice busdev;
  62
  63     QEMUBH *bh0;
  64     QEMUBH *bh1;
  65     ptimer_state *ptimer0;
  66     ptimer_state *ptimer1;
  67
  68     uint32_t freq_hz;
  69     uint32_t capabilities;
  70     uint32_t systemid;
  71     uint32_t strappings;
  72
  73     uint32_t regs[R_MAX];
  74
  75     qemu_irq gpio_irq;
  76     qemu_irq timer0_irq;
  77     qemu_irq timer1_irq;
  78 };
  79 typedef struct MilkymistSysctlState MilkymistSysctlState;
  80
  81 static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value)
  82 {
  83     trace_milkymist_sysctl_icap_write(value);
  84     switch (value & 0xffff) {
  85     case 0x000e:
  86         qemu_system_shutdown_request();
  87         break;
  88     }
  89 }
  90
  91 static uint32_t sysctl_read(void *opaque, target_phys_addr_t addr)
  92 {
  93     MilkymistSysctlState *s = opaque;
  94     uint32_t r = 0;
  95
  96     addr >>= 2;
  97     switch (addr) {
  98     case R_TIMER0_COUNTER:
  99         r = (uint32_t)ptimer_get_count(s->ptimer0);
 100         /* milkymist timer counts up */
 101         r = s->regs[R_TIMER0_COMPARE] - r;
 102         break;
 103     case R_TIMER1_COUNTER:
 104         r = (uint32_t)ptimer_get_count(s->ptimer1);
 105         /* milkymist timer counts up */
 106         r = s->regs[R_TIMER1_COMPARE] - r;
 107         break;
 108     case R_GPIO_IN:
 109     case R_GPIO_OUT:
 110     case R_GPIO_INTEN:
 111     case R_TIMER0_CONTROL:
 112     case R_TIMER0_COMPARE:
 113     case R_TIMER1_CONTROL:
 114     case R_TIMER1_COMPARE:
 115     case R_ICAP:
 116     case R_CAPABILITIES:
 117     case R_SYSTEM_ID:
 118         r = s->regs[addr];
 119         break;
 120
 121     default:
 122         error_report("milkymist_sysctl: read access to unkown register 0x"
 123                 TARGET_FMT_plx, addr << 2);
 124         break;
 125     }
 126
 127     trace_milkymist_sysctl_memory_read(addr << 2, r);
 128
 129     return r;
 130 }
 131
 132 static void sysctl_write(void *opaque, target_phys_addr_t addr, uint32_t value)
 133 {
 134     MilkymistSysctlState *s = opaque;
 135
 136     trace_milkymist_sysctl_memory_write(addr, value);
 137
 138     addr >>= 2;
 139     switch (addr) {
 140     case R_GPIO_OUT:
 141     case R_GPIO_INTEN:
 142     case R_TIMER0_COUNTER:
 143         if (value > s->regs[R_TIMER0_COUNTER]) {
 144             value = s->regs[R_TIMER0_COUNTER];
 145             error_report("milkymist_sysctl: timer0: trying to write a "
 146                     "value greater than the limit. Clipping.");
 147         }
 148         /* milkymist timer counts up */
 149         value = s->regs[R_TIMER0_COUNTER] - value;
 150         ptimer_set_count(s->ptimer0, value);
 151         break;
 152     case R_TIMER1_COUNTER:
 153         if (value > s->regs[R_TIMER1_COUNTER]) {
 154             value = s->regs[R_TIMER1_COUNTER];
 155             error_report("milkymist_sysctl: timer1: trying to write a "
 156                     "value greater than the limit. Clipping.");
 157         }
 158         /* milkymist timer counts up */
 159         value = s->regs[R_TIMER1_COUNTER] - value;
 160         ptimer_set_count(s->ptimer1, value);
 161         break;
 162     case R_TIMER0_COMPARE:
 163         ptimer_set_limit(s->ptimer0, value, 0);
 164         s->regs[addr] = value;
 165         break;
 166     case R_TIMER1_COMPARE:
 167         ptimer_set_limit(s->ptimer1, value, 0);
 168         s->regs[addr] = value;
 169         break;
 170     case R_TIMER0_CONTROL:
 171         s->regs[addr] = value;
 172         if (s->regs[R_TIMER0_CONTROL] & CTRL_ENABLE) {
 173             trace_milkymist_sysctl_start_timer1();
 174             ptimer_run(s->ptimer0, 0);
 175         } else {
 176             trace_milkymist_sysctl_stop_timer1();
 177             ptimer_stop(s->ptimer0);
 178         }
 179         break;
 180     case R_TIMER1_CONTROL:
 181         s->regs[addr] = value;
 182         if (s->regs[R_TIMER1_CONTROL] & CTRL_ENABLE) {
 183             trace_milkymist_sysctl_start_timer1();
 184             ptimer_run(s->ptimer1, 0);
 185         } else {
 186             trace_milkymist_sysctl_stop_timer1();
 187             ptimer_stop(s->ptimer1);
 188         }
 189         break;
 190     case R_ICAP:
 191         sysctl_icap_write(s, value);
 192         break;
 193     case R_SYSTEM_ID:
 194         qemu_system_reset_request();
 195         break;
 196
 197     case R_GPIO_IN:
 198     case R_CAPABILITIES:
 199         error_report("milkymist_sysctl: write to read-only register 0x"
 200                 TARGET_FMT_plx, addr << 2);
 201         break;
 202
 203     default:
 204         error_report("milkymist_sysctl: write access to unkown register 0x"
 205                 TARGET_FMT_plx, addr << 2);
 206         break;
 207     }
 208 }
 209
 210 static CPUReadMemoryFunc * const sysctl_read_fn[] = {
 211     NULL,
 212     NULL,
 213     &sysctl_read,
 214 };
 215
 216 static CPUWriteMemoryFunc * const sysctl_write_fn[] = {
 217     NULL,
 218     NULL,
 219     &sysctl_write,
 220 };
 221
 222 static void timer0_hit(void *opaque)
 223 {
 224     MilkymistSysctlState *s = opaque;
 225
 226     if (!(s->regs[R_TIMER0_CONTROL] & CTRL_AUTORESTART)) {
 227         s->regs[R_TIMER0_CONTROL] &= ~CTRL_ENABLE;
 228         trace_milkymist_sysctl_stop_timer0();
 229         ptimer_stop(s->ptimer0);
 230     }
 231
 232     trace_milkymist_sysctl_pulse_irq_timer0();
 233     qemu_irq_pulse(s->timer0_irq);
 234 }
 235
 236 static void timer1_hit(void *opaque)
 237 {
 238     MilkymistSysctlState *s = opaque;
 239
 240     if (!(s->regs[R_TIMER1_CONTROL] & CTRL_AUTORESTART)) {
 241         s->regs[R_TIMER1_CONTROL] &= ~CTRL_ENABLE;
 242         trace_milkymist_sysctl_stop_timer1();
 243         ptimer_stop(s->ptimer1);
 244     }
 245
 246     trace_milkymist_sysctl_pulse_irq_timer1();
 247     qemu_irq_pulse(s->timer1_irq);
 248 }
 249
 250 static void milkymist_sysctl_reset(DeviceState *d)
 251 {
 252     MilkymistSysctlState *s =
 253             container_of(d, MilkymistSysctlState, busdev.qdev);
 254     int i;
 255
 256     for (i = 0; i < R_MAX; i++) {
 257         s->regs[i] = 0;
 258     }
 259
 260     ptimer_stop(s->ptimer0);
 261     ptimer_stop(s->ptimer1);
 262
 263     /* defaults */
 264     s->regs[R_ICAP] = ICAP_READY;
 265     s->regs[R_SYSTEM_ID] = s->systemid;
 266     s->regs[R_CAPABILITIES] = s->capabilities;
 267     s->regs[R_GPIO_IN] = s->strappings;
 268 }
 269
 270 static int milkymist_sysctl_init(SysBusDevice *dev)
 271 {
 272     MilkymistSysctlState *s = FROM_SYSBUS(typeof(*s), dev);
 273     int sysctl_regs;
 274
 275     sysbus_init_irq(dev, &s->gpio_irq);
 276     sysbus_init_irq(dev, &s->timer0_irq);
 277     sysbus_init_irq(dev, &s->timer1_irq);
 278
 279     s->bh0 = qemu_bh_new(timer0_hit, s);
 280     s->bh1 = qemu_bh_new(timer1_hit, s);
 281     s->ptimer0 = ptimer_init(s->bh0);
 282     s->ptimer1 = ptimer_init(s->bh1);
 283     ptimer_set_freq(s->ptimer0, s->freq_hz);
 284     ptimer_set_freq(s->ptimer1, s->freq_hz);
 285
 286     sysctl_regs = cpu_register_io_memory(sysctl_read_fn, sysctl_write_fn, s,
 287             DEVICE_NATIVE_ENDIAN);
 288     sysbus_init_mmio(dev, R_MAX * 4, sysctl_regs);
 289
 290     return 0;
 291 }
 292
 293 static const VMStateDescription vmstate_milkymist_sysctl = {
 294     .name = "milkymist-sysctl",
 295     .version_id = 1,
 296     .minimum_version_id = 1,
 297     .minimum_version_id_old = 1,
 298     .fields      = (VMStateField[]) {
 299         VMSTATE_UINT32_ARRAY(regs, MilkymistSysctlState, R_MAX),
 300         VMSTATE_PTIMER(ptimer0, MilkymistSysctlState),
 301         VMSTATE_PTIMER(ptimer1, MilkymistSysctlState),
 302         VMSTATE_END_OF_LIST()
 303     }
 304 };
 305
 306 static SysBusDeviceInfo milkymist_sysctl_info = {
 307     .init = milkymist_sysctl_init,
 308     .qdev.name  = "milkymist-sysctl",
 309     .qdev.size  = sizeof(MilkymistSysctlState),
 310     .qdev.vmsd  = &vmstate_milkymist_sysctl,
 311     .qdev.reset = milkymist_sysctl_reset,
 312     .qdev.props = (Property[]) {
 313         DEFINE_PROP_UINT32("frequency", MilkymistSysctlState,
 314                 freq_hz, 80000000),
 315         DEFINE_PROP_UINT32("capabilities", MilkymistSysctlState,
 316                 capabilities, 0x00000000),
 317         DEFINE_PROP_UINT32("systemid", MilkymistSysctlState,
 318                 systemid, 0x10014d31),
 319         DEFINE_PROP_UINT32("gpio_strappings", MilkymistSysctlState,
 320                 strappings, 0x00000001),
 321         DEFINE_PROP_END_OF_LIST(),
 322     }
 323 };
 324
 325 static void milkymist_sysctl_register(void)
 326 {
 327     sysbus_register_withprop(&milkymist_sysctl_info);
 328 }
 329
 330 device_init(milkymist_sysctl_register)