hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize
[qemu.git] / disas / arm-a64.cc
bloba1402a2e0715db94c6c2fa1bc3de59edb1af5723
1 /*
2 * ARM A64 disassembly output wrapper to libvixl
3 * Copyright (c) 2013 Linaro Limited
4 * Written by Claudio Fontana
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "disas/dis-asm.h"
23 #include "vixl/a64/disasm-a64.h"
25 using namespace vixl;
27 static Decoder *vixl_decoder = NULL;
28 static Disassembler *vixl_disasm = NULL;
30 /* We don't use libvixl's PrintDisassembler because its output
31 * is a little unhelpful (trailing newlines, for example).
32 * Instead we use our own very similar variant so we have
33 * control over the format.
35 class QEMUDisassembler : public Disassembler {
36 public:
37 QEMUDisassembler() : printf_(NULL), stream_(NULL) { }
38 ~QEMUDisassembler() { }
40 void SetStream(FILE *stream) {
41 stream_ = stream;
44 void SetPrintf(fprintf_function printf_fn) {
45 printf_ = printf_fn;
48 protected:
49 virtual void ProcessOutput(const Instruction *instr) {
50 printf_(stream_, "%08" PRIx32 " %s",
51 instr->InstructionBits(), GetOutput());
54 private:
55 fprintf_function printf_;
56 FILE *stream_;
59 static int vixl_is_initialized(void)
61 return vixl_decoder != NULL;
64 static void vixl_init() {
65 vixl_decoder = new Decoder();
66 vixl_disasm = new QEMUDisassembler();
67 vixl_decoder->AppendVisitor(vixl_disasm);
70 #define INSN_SIZE 4
72 /* Disassemble ARM A64 instruction. This is our only entry
73 * point from QEMU's C code.
75 int print_insn_arm_a64(uint64_t addr, disassemble_info *info)
77 uint8_t bytes[INSN_SIZE];
78 uint32_t instrval;
79 const Instruction *instr;
80 int status;
82 status = info->read_memory_func(addr, bytes, INSN_SIZE, info);
83 if (status != 0) {
84 info->memory_error_func(status, addr, info);
85 return -1;
88 if (!vixl_is_initialized()) {
89 vixl_init();
92 ((QEMUDisassembler *)vixl_disasm)->SetPrintf(info->fprintf_func);
93 ((QEMUDisassembler *)vixl_disasm)->SetStream(info->stream);
95 instrval = bytes[0] | bytes[1] << 8 | bytes[2] << 16 | bytes[3] << 24;
96 instr = reinterpret_cast<const Instruction *>(&instrval);
97 vixl_disasm->MapCodeAddress(addr, instr);
98 vixl_decoder->Decode(instr);
100 return INSN_SIZE;