switch scsi bus to inplace allocation.
[qemu.git] / hw / ppc_newworld.c
blob6bd5234d8f247d7be37f8b4d2da89cdaf347a796
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include "hw.h"
26 #include "ppc.h"
27 #include "ppc_mac.h"
28 #include "mac_dbdma.h"
29 #include "nvram.h"
30 #include "pc.h"
31 #include "pci.h"
32 #include "net.h"
33 #include "sysemu.h"
34 #include "boards.h"
35 #include "fw_cfg.h"
36 #include "escc.h"
37 #include "openpic.h"
38 #include "ide.h"
39 #include "loader.h"
40 #include "elf.h"
42 #define MAX_IDE_BUS 2
43 #define VGA_BIOS_SIZE 65536
44 #define CFG_ADDR 0xf0000510
46 /* debug UniNorth */
47 //#define DEBUG_UNIN
49 #ifdef DEBUG_UNIN
50 #define UNIN_DPRINTF(fmt, ...) \
51 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
52 #else
53 #define UNIN_DPRINTF(fmt, ...)
54 #endif
56 /* UniN device */
57 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
59 UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
62 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
64 uint32_t value;
66 value = 0;
67 UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
69 return value;
72 static CPUWriteMemoryFunc * const unin_write[] = {
73 &unin_writel,
74 &unin_writel,
75 &unin_writel,
78 static CPUReadMemoryFunc * const unin_read[] = {
79 &unin_readl,
80 &unin_readl,
81 &unin_readl,
84 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
86 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
87 return 0;
90 /* PowerPC Mac99 hardware initialisation */
91 static void ppc_core99_init (ram_addr_t ram_size,
92 const char *boot_device,
93 const char *kernel_filename,
94 const char *kernel_cmdline,
95 const char *initrd_filename,
96 const char *cpu_model)
98 CPUState *env = NULL, *envs[MAX_CPUS];
99 char *filename;
100 qemu_irq *pic, **openpic_irqs;
101 int unin_memory;
102 int linux_boot, i;
103 ram_addr_t ram_offset, bios_offset, vga_bios_offset;
104 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
105 PCIBus *pci_bus;
106 MacIONVRAMState *nvr;
107 int nvram_mem_index;
108 int vga_bios_size, bios_size;
109 qemu_irq *dummy_irq;
110 int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
111 int ppc_boot_device;
112 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
113 void *fw_cfg;
114 void *dbdma;
115 uint8_t *vga_bios_ptr;
117 linux_boot = (kernel_filename != NULL);
119 /* init CPUs */
120 if (cpu_model == NULL)
121 cpu_model = "G4";
122 for (i = 0; i < smp_cpus; i++) {
123 env = cpu_init(cpu_model);
124 if (!env) {
125 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
126 exit(1);
128 /* Set time-base frequency to 100 Mhz */
129 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
130 #if 0
131 env->osi_call = vga_osi_call;
132 #endif
133 qemu_register_reset(&cpu_ppc_reset, env);
134 envs[i] = env;
137 /* allocate RAM */
138 ram_offset = qemu_ram_alloc(ram_size);
139 cpu_register_physical_memory(0, ram_size, ram_offset);
141 /* allocate and load BIOS */
142 bios_offset = qemu_ram_alloc(BIOS_SIZE);
143 if (bios_name == NULL)
144 bios_name = PROM_FILENAME;
145 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
146 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
148 /* Load OpenBIOS (ELF) */
149 if (filename) {
150 bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
152 qemu_free(filename);
153 } else {
154 bios_size = -1;
156 if (bios_size < 0 || bios_size > BIOS_SIZE) {
157 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
158 exit(1);
161 /* allocate and load VGA BIOS */
162 vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
163 vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
164 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
165 if (filename) {
166 vga_bios_size = load_image(filename, vga_bios_ptr + 8);
167 qemu_free(filename);
168 } else {
169 vga_bios_size = -1;
171 if (vga_bios_size < 0) {
172 /* if no bios is present, we can still work */
173 fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
174 VGABIOS_FILENAME);
175 vga_bios_size = 0;
176 } else {
177 /* set a specific header (XXX: find real Apple format for NDRV
178 drivers) */
179 vga_bios_ptr[0] = 'N';
180 vga_bios_ptr[1] = 'D';
181 vga_bios_ptr[2] = 'R';
182 vga_bios_ptr[3] = 'V';
183 cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
184 vga_bios_size += 8;
186 /* Round to page boundary */
187 vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
188 TARGET_PAGE_MASK;
191 if (linux_boot) {
192 uint64_t lowaddr = 0;
193 int bswap_needed;
195 #ifdef BSWAP_NEEDED
196 bswap_needed = 1;
197 #else
198 bswap_needed = 0;
199 #endif
200 kernel_base = KERNEL_LOAD_ADDR;
202 /* Now we can load the kernel. The first step tries to load the kernel
203 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
204 loaded again, the new PhysAddr being computed from lowaddr. */
205 kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
206 1, ELF_MACHINE, 0);
207 if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
208 kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
209 NULL, NULL, NULL, 1, ELF_MACHINE, 0);
211 if (kernel_size < 0)
212 kernel_size = load_aout(kernel_filename, kernel_base,
213 ram_size - kernel_base, bswap_needed,
214 TARGET_PAGE_SIZE);
215 if (kernel_size < 0)
216 kernel_size = load_image_targphys(kernel_filename,
217 kernel_base,
218 ram_size - kernel_base);
219 if (kernel_size < 0) {
220 hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
221 exit(1);
223 /* load initrd */
224 if (initrd_filename) {
225 initrd_base = INITRD_LOAD_ADDR;
226 initrd_size = load_image_targphys(initrd_filename, initrd_base,
227 ram_size - initrd_base);
228 if (initrd_size < 0) {
229 hw_error("qemu: could not load initial ram disk '%s'\n",
230 initrd_filename);
231 exit(1);
233 } else {
234 initrd_base = 0;
235 initrd_size = 0;
237 ppc_boot_device = 'm';
238 } else {
239 kernel_base = 0;
240 kernel_size = 0;
241 initrd_base = 0;
242 initrd_size = 0;
243 ppc_boot_device = '\0';
244 /* We consider that NewWorld PowerMac never have any floppy drive
245 * For now, OHW cannot boot from the network.
247 for (i = 0; boot_device[i] != '\0'; i++) {
248 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
249 ppc_boot_device = boot_device[i];
250 break;
253 if (ppc_boot_device == '\0') {
254 fprintf(stderr, "No valid boot device for Mac99 machine\n");
255 exit(1);
259 isa_mem_base = 0x80000000;
261 /* Register 8 MB of ISA IO space */
262 isa_mmio_init(0xf2000000, 0x00800000);
264 /* UniN init */
265 unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
266 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
268 openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
269 openpic_irqs[0] =
270 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
271 for (i = 0; i < smp_cpus; i++) {
272 /* Mac99 IRQ connection between OpenPIC outputs pins
273 * and PowerPC input pins
275 switch (PPC_INPUT(env)) {
276 case PPC_FLAGS_INPUT_6xx:
277 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
278 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
279 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
280 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
281 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
282 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
283 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
284 /* Not connected ? */
285 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
286 /* Check this */
287 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
288 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
289 break;
290 #if defined(TARGET_PPC64)
291 case PPC_FLAGS_INPUT_970:
292 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
293 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
294 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
295 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
296 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
297 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
298 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
299 /* Not connected ? */
300 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
301 /* Check this */
302 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
303 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
304 break;
305 #endif /* defined(TARGET_PPC64) */
306 default:
307 hw_error("Bus model not supported on mac99 machine\n");
308 exit(1);
311 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
312 pci_bus = pci_pmac_init(pic);
313 /* init basic PC hardware */
314 pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
316 /* XXX: suppress that */
317 dummy_irq = i8259_init(NULL);
319 escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
320 serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
322 for(i = 0; i < nb_nics; i++)
323 pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
325 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
326 fprintf(stderr, "qemu: too many IDE bus\n");
327 exit(1);
329 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
330 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
332 dbdma = DBDMA_init(&dbdma_mem_index);
333 pci_cmd646_ide_init(pci_bus, hd, 0);
335 /* cuda also initialize ADB */
336 cuda_init(&cuda_mem_index, pic[0x19]);
338 adb_kbd_init(&adb_bus);
339 adb_mouse_init(&adb_bus);
342 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
343 dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
344 escc_mem_index);
346 if (usb_enabled) {
347 usb_ohci_init_pci(pci_bus, -1);
350 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
351 graphic_depth = 15;
353 /* The NewWorld NVRAM is not located in the MacIO device */
354 nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
355 pmac_format_nvram_partition(nvr, 0x2000);
356 macio_nvram_map(nvr, 0xFFF04000);
357 /* No PCI init: the BIOS will do it */
359 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
360 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
361 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
362 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
363 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
364 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
365 if (kernel_cmdline) {
366 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
367 pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
368 } else {
369 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
371 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
372 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
373 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
375 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
376 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
377 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
379 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
382 static QEMUMachine core99_machine = {
383 .name = "mac99",
384 .desc = "Mac99 based PowerMAC",
385 .init = ppc_core99_init,
386 .max_cpus = MAX_CPUS,
389 static void core99_machine_init(void)
391 qemu_register_machine(&core99_machine);
394 machine_init(core99_machine_init);