2 * QEMU MicroBlaze CPU interrupt wrapper logic.
4 * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
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10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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30 void pic_info(Monitor
*mon
)
32 void irq_info(Monitor
*mon
)
35 static void microblaze_pic_cpu_handler(void *opaque
, int irq
, int level
)
37 CPUState
*env
= (CPUState
*)opaque
;
38 int type
= irq
? CPU_INTERRUPT_NMI
: CPU_INTERRUPT_HARD
;
41 cpu_interrupt(env
, type
);
43 cpu_reset_interrupt(env
, type
);
46 qemu_irq
*microblaze_pic_init_cpu(CPUState
*env
);
47 qemu_irq
*microblaze_pic_init_cpu(CPUState
*env
)
49 return qemu_allocate_irqs(microblaze_pic_cpu_handler
, env
, 2);