cpu-all.h

   1 /*
   2  * defines common to all virtual CPUs
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef CPU_ALL_H
  20 #define CPU_ALL_H
  21
  22 #include "qemu-common.h"
  23 #include "cpu-common.h"
  24
  25 /* some important defines:
  26  *
  27  * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
  28  * memory accesses.
  29  *
  30  * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
  31  * otherwise little endian.
  32  *
  33  * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
  34  *
  35  * TARGET_WORDS_BIGENDIAN : same for target cpu
  36  */
  37
  38 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
  39 #define BSWAP_NEEDED
  40 #endif
  41
  42 #ifdef BSWAP_NEEDED
  43
  44 static inline uint16_t tswap16(uint16_t s)
  45 {
  46     return bswap16(s);
  47 }
  48
  49 static inline uint32_t tswap32(uint32_t s)
  50 {
  51     return bswap32(s);
  52 }
  53
  54 static inline uint64_t tswap64(uint64_t s)
  55 {
  56     return bswap64(s);
  57 }
  58
  59 static inline void tswap16s(uint16_t *s)
  60 {
  61     *s = bswap16(*s);
  62 }
  63
  64 static inline void tswap32s(uint32_t *s)
  65 {
  66     *s = bswap32(*s);
  67 }
  68
  69 static inline void tswap64s(uint64_t *s)
  70 {
  71     *s = bswap64(*s);
  72 }
  73
  74 #else
  75
  76 static inline uint16_t tswap16(uint16_t s)
  77 {
  78     return s;
  79 }
  80
  81 static inline uint32_t tswap32(uint32_t s)
  82 {
  83     return s;
  84 }
  85
  86 static inline uint64_t tswap64(uint64_t s)
  87 {
  88     return s;
  89 }
  90
  91 static inline void tswap16s(uint16_t *s)
  92 {
  93 }
  94
  95 static inline void tswap32s(uint32_t *s)
  96 {
  97 }
  98
  99 static inline void tswap64s(uint64_t *s)
 100 {
 101 }
 102
 103 #endif
 104
 105 #if TARGET_LONG_SIZE == 4
 106 #define tswapl(s) tswap32(s)
 107 #define tswapls(s) tswap32s((uint32_t *)(s))
 108 #define bswaptls(s) bswap32s(s)
 109 #else
 110 #define tswapl(s) tswap64(s)
 111 #define tswapls(s) tswap64s((uint64_t *)(s))
 112 #define bswaptls(s) bswap64s(s)
 113 #endif
 114
 115 /* CPU memory access without any memory or io remapping */
 116
 117 /*
 118  * the generic syntax for the memory accesses is:
 119  *
 120  * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
 121  *
 122  * store: st{type}{size}{endian}_{access_type}(ptr, val)
 123  *
 124  * type is:
 125  * (empty): integer access
 126  *   f    : float access
 127  *
 128  * sign is:
 129  * (empty): for floats or 32 bit size
 130  *   u    : unsigned
 131  *   s    : signed
 132  *
 133  * size is:
 134  *   b: 8 bits
 135  *   w: 16 bits
 136  *   l: 32 bits
 137  *   q: 64 bits
 138  *
 139  * endian is:
 140  * (empty): target cpu endianness or 8 bit access
 141  *   r    : reversed target cpu endianness (not implemented yet)
 142  *   be   : big endian (not implemented yet)
 143  *   le   : little endian (not implemented yet)
 144  *
 145  * access_type is:
 146  *   raw    : host memory access
 147  *   user   : user mode access using soft MMU
 148  *   kernel : kernel mode access using soft MMU
 149  */
 150
 151 /* target-endianness CPU memory access functions */
 152 #if defined(TARGET_WORDS_BIGENDIAN)
 153 #define lduw_p(p) lduw_be_p(p)
 154 #define ldsw_p(p) ldsw_be_p(p)
 155 #define ldl_p(p) ldl_be_p(p)
 156 #define ldq_p(p) ldq_be_p(p)
 157 #define ldfl_p(p) ldfl_be_p(p)
 158 #define ldfq_p(p) ldfq_be_p(p)
 159 #define stw_p(p, v) stw_be_p(p, v)
 160 #define stl_p(p, v) stl_be_p(p, v)
 161 #define stq_p(p, v) stq_be_p(p, v)
 162 #define stfl_p(p, v) stfl_be_p(p, v)
 163 #define stfq_p(p, v) stfq_be_p(p, v)
 164 #else
 165 #define lduw_p(p) lduw_le_p(p)
 166 #define ldsw_p(p) ldsw_le_p(p)
 167 #define ldl_p(p) ldl_le_p(p)
 168 #define ldq_p(p) ldq_le_p(p)
 169 #define ldfl_p(p) ldfl_le_p(p)
 170 #define ldfq_p(p) ldfq_le_p(p)
 171 #define stw_p(p, v) stw_le_p(p, v)
 172 #define stl_p(p, v) stl_le_p(p, v)
 173 #define stq_p(p, v) stq_le_p(p, v)
 174 #define stfl_p(p, v) stfl_le_p(p, v)
 175 #define stfq_p(p, v) stfq_le_p(p, v)
 176 #endif
 177
 178 /* MMU memory access macros */
 179
 180 #if defined(CONFIG_USER_ONLY)
 181 #include <assert.h>
 182 #include "qemu-types.h"
 183
 184 /* On some host systems the guest address space is reserved on the host.
 185  * This allows the guest address space to be offset to a convenient location.
 186  */
 187 #if defined(CONFIG_USE_GUEST_BASE)
 188 extern unsigned long guest_base;
 189 extern int have_guest_base;
 190 extern unsigned long reserved_va;
 191 #define GUEST_BASE guest_base
 192 #define RESERVED_VA reserved_va
 193 #else
 194 #define GUEST_BASE 0ul
 195 #define RESERVED_VA 0ul
 196 #endif
 197
 198 /* All direct uses of g2h and h2g need to go away for usermode softmmu.  */
 199 #define g2h(x) ((void *)((unsigned long)(x) + GUEST_BASE))
 200
 201 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
 202 #define h2g_valid(x) 1
 203 #else
 204 #define h2g_valid(x) ({ \
 205     unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
 206     __guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS); \
 207 })
 208 #endif
 209
 210 #define h2g(x) ({ \
 211     unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
 212     /* Check if given address fits target address space */ \
 213     assert(h2g_valid(x)); \
 214     (abi_ulong)__ret; \
 215 })
 216
 217 #define saddr(x) g2h(x)
 218 #define laddr(x) g2h(x)
 219
 220 #else /* !CONFIG_USER_ONLY */
 221 /* NOTE: we use double casts if pointers and target_ulong have
 222    different sizes */
 223 #define saddr(x) (uint8_t *)(long)(x)
 224 #define laddr(x) (uint8_t *)(long)(x)
 225 #endif
 226
 227 #define ldub_raw(p) ldub_p(laddr((p)))
 228 #define ldsb_raw(p) ldsb_p(laddr((p)))
 229 #define lduw_raw(p) lduw_p(laddr((p)))
 230 #define ldsw_raw(p) ldsw_p(laddr((p)))
 231 #define ldl_raw(p) ldl_p(laddr((p)))
 232 #define ldq_raw(p) ldq_p(laddr((p)))
 233 #define ldfl_raw(p) ldfl_p(laddr((p)))
 234 #define ldfq_raw(p) ldfq_p(laddr((p)))
 235 #define stb_raw(p, v) stb_p(saddr((p)), v)
 236 #define stw_raw(p, v) stw_p(saddr((p)), v)
 237 #define stl_raw(p, v) stl_p(saddr((p)), v)
 238 #define stq_raw(p, v) stq_p(saddr((p)), v)
 239 #define stfl_raw(p, v) stfl_p(saddr((p)), v)
 240 #define stfq_raw(p, v) stfq_p(saddr((p)), v)
 241
 242
 243 #if defined(CONFIG_USER_ONLY)
 244
 245 /* if user mode, no other memory access functions */
 246 #define ldub(p) ldub_raw(p)
 247 #define ldsb(p) ldsb_raw(p)
 248 #define lduw(p) lduw_raw(p)
 249 #define ldsw(p) ldsw_raw(p)
 250 #define ldl(p) ldl_raw(p)
 251 #define ldq(p) ldq_raw(p)
 252 #define ldfl(p) ldfl_raw(p)
 253 #define ldfq(p) ldfq_raw(p)
 254 #define stb(p, v) stb_raw(p, v)
 255 #define stw(p, v) stw_raw(p, v)
 256 #define stl(p, v) stl_raw(p, v)
 257 #define stq(p, v) stq_raw(p, v)
 258 #define stfl(p, v) stfl_raw(p, v)
 259 #define stfq(p, v) stfq_raw(p, v)
 260
 261 #define ldub_code(p) ldub_raw(p)
 262 #define ldsb_code(p) ldsb_raw(p)
 263 #define lduw_code(p) lduw_raw(p)
 264 #define ldsw_code(p) ldsw_raw(p)
 265 #define ldl_code(p) ldl_raw(p)
 266 #define ldq_code(p) ldq_raw(p)
 267
 268 #define ldub_kernel(p) ldub_raw(p)
 269 #define ldsb_kernel(p) ldsb_raw(p)
 270 #define lduw_kernel(p) lduw_raw(p)
 271 #define ldsw_kernel(p) ldsw_raw(p)
 272 #define ldl_kernel(p) ldl_raw(p)
 273 #define ldq_kernel(p) ldq_raw(p)
 274 #define ldfl_kernel(p) ldfl_raw(p)
 275 #define ldfq_kernel(p) ldfq_raw(p)
 276 #define stb_kernel(p, v) stb_raw(p, v)
 277 #define stw_kernel(p, v) stw_raw(p, v)
 278 #define stl_kernel(p, v) stl_raw(p, v)
 279 #define stq_kernel(p, v) stq_raw(p, v)
 280 #define stfl_kernel(p, v) stfl_raw(p, v)
 281 #define stfq_kernel(p, vt) stfq_raw(p, v)
 282
 283 #endif /* defined(CONFIG_USER_ONLY) */
 284
 285 /* page related stuff */
 286
 287 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
 288 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
 289 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
 290
 291 /* ??? These should be the larger of unsigned long and target_ulong.  */
 292 extern unsigned long qemu_real_host_page_size;
 293 extern unsigned long qemu_host_page_bits;
 294 extern unsigned long qemu_host_page_size;
 295 extern unsigned long qemu_host_page_mask;
 296
 297 #define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
 298
 299 /* same as PROT_xxx */
 300 #define PAGE_READ      0x0001
 301 #define PAGE_WRITE     0x0002
 302 #define PAGE_EXEC      0x0004
 303 #define PAGE_BITS      (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
 304 #define PAGE_VALID     0x0008
 305 /* original state of the write flag (used when tracking self-modifying
 306    code */
 307 #define PAGE_WRITE_ORG 0x0010
 308 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
 309 /* FIXME: Code that sets/uses this is broken and needs to go away.  */
 310 #define PAGE_RESERVED  0x0020
 311 #endif
 312
 313 #if defined(CONFIG_USER_ONLY)
 314 void page_dump(FILE *f);
 315
 316 typedef int (*walk_memory_regions_fn)(void *, abi_ulong,
 317                                       abi_ulong, unsigned long);
 318 int walk_memory_regions(void *, walk_memory_regions_fn);
 319
 320 int page_get_flags(target_ulong address);
 321 void page_set_flags(target_ulong start, target_ulong end, int flags);
 322 int page_check_range(target_ulong start, target_ulong len, int flags);
 323 #endif
 324
 325 CPUState *cpu_copy(CPUState *env);
 326 CPUState *qemu_get_cpu(int cpu);
 327
 328 #define CPU_DUMP_CODE 0x00010000
 329
 330 void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
 331                     int flags);
 332 void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
 333                          int flags);
 334
 335 void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...)
 336     GCC_FMT_ATTR(2, 3);
 337 extern CPUState *first_cpu;
 338 extern CPUState *cpu_single_env;
 339
 340 /* Flags for use in ENV->INTERRUPT_PENDING.
 341
 342    The numbers assigned here are non-sequential in order to preserve
 343    binary compatibility with the vmstate dump.  Bit 0 (0x0001) was
 344    previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
 345    the vmstate dump.  */
 346
 347 /* External hardware interrupt pending.  This is typically used for
 348    interrupts from devices.  */
 349 #define CPU_INTERRUPT_HARD        0x0002
 350
 351 /* Exit the current TB.  This is typically used when some system-level device
 352    makes some change to the memory mapping.  E.g. the a20 line change.  */
 353 #define CPU_INTERRUPT_EXITTB      0x0004
 354
 355 /* Halt the CPU.  */
 356 #define CPU_INTERRUPT_HALT        0x0020
 357
 358 /* Debug event pending.  */
 359 #define CPU_INTERRUPT_DEBUG       0x0080
 360
 361 /* Several target-specific external hardware interrupts.  Each target/cpu.h
 362    should define proper names based on these defines.  */
 363 #define CPU_INTERRUPT_TGT_EXT_0   0x0008
 364 #define CPU_INTERRUPT_TGT_EXT_1   0x0010
 365 #define CPU_INTERRUPT_TGT_EXT_2   0x0040
 366 #define CPU_INTERRUPT_TGT_EXT_3   0x0200
 367 #define CPU_INTERRUPT_TGT_EXT_4   0x1000
 368
 369 /* Several target-specific internal interrupts.  These differ from the
 370    preceeding target-specific interrupts in that they are intended to
 371    originate from within the cpu itself, typically in response to some
 372    instruction being executed.  These, therefore, are not masked while
 373    single-stepping within the debugger.  */
 374 #define CPU_INTERRUPT_TGT_INT_0   0x0100
 375 #define CPU_INTERRUPT_TGT_INT_1   0x0400
 376 #define CPU_INTERRUPT_TGT_INT_2   0x0800
 377
 378 /* First unused bit: 0x2000.  */
 379
 380 /* The set of all bits that should be masked when single-stepping.  */
 381 #define CPU_INTERRUPT_SSTEP_MASK \
 382     (CPU_INTERRUPT_HARD          \
 383      | CPU_INTERRUPT_TGT_EXT_0   \
 384      | CPU_INTERRUPT_TGT_EXT_1   \
 385      | CPU_INTERRUPT_TGT_EXT_2   \
 386      | CPU_INTERRUPT_TGT_EXT_3   \
 387      | CPU_INTERRUPT_TGT_EXT_4)
 388
 389 #ifndef CONFIG_USER_ONLY
 390 typedef void (*CPUInterruptHandler)(CPUState *, int);
 391
 392 extern CPUInterruptHandler cpu_interrupt_handler;
 393
 394 static inline void cpu_interrupt(CPUState *s, int mask)
 395 {
 396     cpu_interrupt_handler(s, mask);
 397 }
 398 #else /* USER_ONLY */
 399 void cpu_interrupt(CPUState *env, int mask);
 400 #endif /* USER_ONLY */
 401
 402 void cpu_reset_interrupt(CPUState *env, int mask);
 403
 404 void cpu_exit(CPUState *s);
 405
 406 bool qemu_cpu_has_work(CPUState *env);
 407
 408 /* Breakpoint/watchpoint flags */
 409 #define BP_MEM_READ           0x01
 410 #define BP_MEM_WRITE          0x02
 411 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 412 #define BP_STOP_BEFORE_ACCESS 0x04
 413 #define BP_WATCHPOINT_HIT     0x08
 414 #define BP_GDB                0x10
 415 #define BP_CPU                0x20
 416
 417 int cpu_breakpoint_insert(CPUState *env, target_ulong pc, int flags,
 418                           CPUBreakpoint **breakpoint);
 419 int cpu_breakpoint_remove(CPUState *env, target_ulong pc, int flags);
 420 void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint);
 421 void cpu_breakpoint_remove_all(CPUState *env, int mask);
 422 int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
 423                           int flags, CPUWatchpoint **watchpoint);
 424 int cpu_watchpoint_remove(CPUState *env, target_ulong addr,
 425                           target_ulong len, int flags);
 426 void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint);
 427 void cpu_watchpoint_remove_all(CPUState *env, int mask);
 428
 429 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 430 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 431 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 432
 433 void cpu_single_step(CPUState *env, int enabled);
 434 void cpu_reset(CPUState *s);
 435 int cpu_is_stopped(CPUState *env);
 436 void run_on_cpu(CPUState *env, void (*func)(void *data), void *data);
 437
 438 #define CPU_LOG_TB_OUT_ASM (1 << 0)
 439 #define CPU_LOG_TB_IN_ASM  (1 << 1)
 440 #define CPU_LOG_TB_OP      (1 << 2)
 441 #define CPU_LOG_TB_OP_OPT  (1 << 3)
 442 #define CPU_LOG_INT        (1 << 4)
 443 #define CPU_LOG_EXEC       (1 << 5)
 444 #define CPU_LOG_PCALL      (1 << 6)
 445 #define CPU_LOG_IOPORT     (1 << 7)
 446 #define CPU_LOG_TB_CPU     (1 << 8)
 447 #define CPU_LOG_RESET      (1 << 9)
 448
 449 /* define log items */
 450 typedef struct CPULogItem {
 451     int mask;
 452     const char *name;
 453     const char *help;
 454 } CPULogItem;
 455
 456 extern const CPULogItem cpu_log_items[];
 457
 458 void cpu_set_log(int log_flags);
 459 void cpu_set_log_filename(const char *filename);
 460 int cpu_str_to_log_mask(const char *str);
 461
 462 #if !defined(CONFIG_USER_ONLY)
 463
 464 /* Return the physical page corresponding to a virtual one. Use it
 465    only for debugging because no protection checks are done. Return -1
 466    if no page found. */
 467 target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
 468
 469 /* memory API */
 470
 471 extern int phys_ram_fd;
 472 extern ram_addr_t ram_size;
 473
 474 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
 475 #define RAM_PREALLOC_MASK   (1 << 0)
 476
 477 typedef struct RAMBlock {
 478     uint8_t *host;
 479     ram_addr_t offset;
 480     ram_addr_t length;
 481     uint32_t flags;
 482     char idstr[256];
 483     QLIST_ENTRY(RAMBlock) next;
 484 #if defined(__linux__) && !defined(TARGET_S390X)
 485     int fd;
 486 #endif
 487 } RAMBlock;
 488
 489 typedef struct RAMList {
 490     uint8_t *phys_dirty;
 491     QLIST_HEAD(, RAMBlock) blocks;
 492 } RAMList;
 493 extern RAMList ram_list;
 494
 495 extern const char *mem_path;
 496 extern int mem_prealloc;
 497
 498 /* physical memory access */
 499
 500 /* MMIO pages are identified by a combination of an IO device index and
 501    3 flags.  The ROMD code stores the page ram offset in iotlb entry,
 502    so only a limited number of ids are avaiable.  */
 503
 504 #define IO_MEM_NB_ENTRIES  (1 << (TARGET_PAGE_BITS  - IO_MEM_SHIFT))
 505
 506 /* Flags stored in the low bits of the TLB virtual address.  These are
 507    defined so that fast path ram access is all zeros.  */
 508 /* Zero if TLB entry is valid.  */
 509 #define TLB_INVALID_MASK   (1 << 3)
 510 /* Set if TLB entry references a clean RAM page.  The iotlb entry will
 511    contain the page physical address.  */
 512 #define TLB_NOTDIRTY    (1 << 4)
 513 /* Set if TLB entry is an IO callback.  */
 514 #define TLB_MMIO        (1 << 5)
 515
 516 #define VGA_DIRTY_FLAG       0x01
 517 #define CODE_DIRTY_FLAG      0x02
 518 #define MIGRATION_DIRTY_FLAG 0x08
 519
 520 /* read dirty bit (return 0 or 1) */
 521 static inline int cpu_physical_memory_is_dirty(ram_addr_t addr)
 522 {
 523     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
 524 }
 525
 526 static inline int cpu_physical_memory_get_dirty_flags(ram_addr_t addr)
 527 {
 528     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS];
 529 }
 530
 531 static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
 532                                                 int dirty_flags)
 533 {
 534     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
 535 }
 536
 537 static inline void cpu_physical_memory_set_dirty(ram_addr_t addr)
 538 {
 539     ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
 540 }
 541
 542 static inline int cpu_physical_memory_set_dirty_flags(ram_addr_t addr,
 543                                                       int dirty_flags)
 544 {
 545     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] |= dirty_flags;
 546 }
 547
 548 static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start,
 549                                                         int length,
 550                                                         int dirty_flags)
 551 {
 552     int i, mask, len;
 553     uint8_t *p;
 554
 555     len = length >> TARGET_PAGE_BITS;
 556     mask = ~dirty_flags;
 557     p = ram_list.phys_dirty + (start >> TARGET_PAGE_BITS);
 558     for (i = 0; i < len; i++) {
 559         p[i] &= mask;
 560     }
 561 }
 562
 563 void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
 564                                      int dirty_flags);
 565 void cpu_tlb_update_dirty(CPUState *env);
 566
 567 int cpu_physical_memory_set_dirty_tracking(int enable);
 568
 569 int cpu_physical_memory_get_dirty_tracking(void);
 570
 571 int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr,
 572                                    target_phys_addr_t end_addr);
 573
 574 int cpu_physical_log_start(target_phys_addr_t start_addr,
 575                            ram_addr_t size);
 576
 577 int cpu_physical_log_stop(target_phys_addr_t start_addr,
 578                           ram_addr_t size);
 579
 580 void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
 581 #endif /* !CONFIG_USER_ONLY */
 582
 583 int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
 584                         uint8_t *buf, int len, int is_write);
 585
 586 #endif /* CPU_ALL_H */