cpu-all.h

   1 /*
   2  * defines common to all virtual CPUs
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef CPU_ALL_H
  20 #define CPU_ALL_H
  21
  22 #include "qemu-common.h"
  23 #include "cpu-common.h"
  24
  25 /* some important defines:
  26  *
  27  * WORDS_ALIGNED : if defined, the host cpu can only make word aligned
  28  * memory accesses.
  29  *
  30  * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and
  31  * otherwise little endian.
  32  *
  33  * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet))
  34  *
  35  * TARGET_WORDS_BIGENDIAN : same for target cpu
  36  */
  37
  38 #include "softfloat.h"
  39
  40 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
  41 #define BSWAP_NEEDED
  42 #endif
  43
  44 #ifdef BSWAP_NEEDED
  45
  46 static inline uint16_t tswap16(uint16_t s)
  47 {
  48     return bswap16(s);
  49 }
  50
  51 static inline uint32_t tswap32(uint32_t s)
  52 {
  53     return bswap32(s);
  54 }
  55
  56 static inline uint64_t tswap64(uint64_t s)
  57 {
  58     return bswap64(s);
  59 }
  60
  61 static inline void tswap16s(uint16_t *s)
  62 {
  63     *s = bswap16(*s);
  64 }
  65
  66 static inline void tswap32s(uint32_t *s)
  67 {
  68     *s = bswap32(*s);
  69 }
  70
  71 static inline void tswap64s(uint64_t *s)
  72 {
  73     *s = bswap64(*s);
  74 }
  75
  76 #else
  77
  78 static inline uint16_t tswap16(uint16_t s)
  79 {
  80     return s;
  81 }
  82
  83 static inline uint32_t tswap32(uint32_t s)
  84 {
  85     return s;
  86 }
  87
  88 static inline uint64_t tswap64(uint64_t s)
  89 {
  90     return s;
  91 }
  92
  93 static inline void tswap16s(uint16_t *s)
  94 {
  95 }
  96
  97 static inline void tswap32s(uint32_t *s)
  98 {
  99 }
 100
 101 static inline void tswap64s(uint64_t *s)
 102 {
 103 }
 104
 105 #endif
 106
 107 #if TARGET_LONG_SIZE == 4
 108 #define tswapl(s) tswap32(s)
 109 #define tswapls(s) tswap32s((uint32_t *)(s))
 110 #define bswaptls(s) bswap32s(s)
 111 #else
 112 #define tswapl(s) tswap64(s)
 113 #define tswapls(s) tswap64s((uint64_t *)(s))
 114 #define bswaptls(s) bswap64s(s)
 115 #endif
 116
 117 typedef union {
 118     float32 f;
 119     uint32_t l;
 120 } CPU_FloatU;
 121
 122 /* NOTE: arm FPA is horrible as double 32 bit words are stored in big
 123    endian ! */
 124 typedef union {
 125     float64 d;
 126 #if defined(HOST_WORDS_BIGENDIAN) \
 127     || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT))
 128     struct {
 129         uint32_t upper;
 130         uint32_t lower;
 131     } l;
 132 #else
 133     struct {
 134         uint32_t lower;
 135         uint32_t upper;
 136     } l;
 137 #endif
 138     uint64_t ll;
 139 } CPU_DoubleU;
 140
 141 #if defined(CONFIG_SOFTFLOAT)
 142 typedef union {
 143     float128 q;
 144 #if defined(HOST_WORDS_BIGENDIAN)
 145     struct {
 146         uint32_t upmost;
 147         uint32_t upper;
 148         uint32_t lower;
 149         uint32_t lowest;
 150     } l;
 151     struct {
 152         uint64_t upper;
 153         uint64_t lower;
 154     } ll;
 155 #else
 156     struct {
 157         uint32_t lowest;
 158         uint32_t lower;
 159         uint32_t upper;
 160         uint32_t upmost;
 161     } l;
 162     struct {
 163         uint64_t lower;
 164         uint64_t upper;
 165     } ll;
 166 #endif
 167 } CPU_QuadU;
 168 #endif
 169
 170 /* CPU memory access without any memory or io remapping */
 171
 172 /*
 173  * the generic syntax for the memory accesses is:
 174  *
 175  * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)
 176  *
 177  * store: st{type}{size}{endian}_{access_type}(ptr, val)
 178  *
 179  * type is:
 180  * (empty): integer access
 181  *   f    : float access
 182  *
 183  * sign is:
 184  * (empty): for floats or 32 bit size
 185  *   u    : unsigned
 186  *   s    : signed
 187  *
 188  * size is:
 189  *   b: 8 bits
 190  *   w: 16 bits
 191  *   l: 32 bits
 192  *   q: 64 bits
 193  *
 194  * endian is:
 195  * (empty): target cpu endianness or 8 bit access
 196  *   r    : reversed target cpu endianness (not implemented yet)
 197  *   be   : big endian (not implemented yet)
 198  *   le   : little endian (not implemented yet)
 199  *
 200  * access_type is:
 201  *   raw    : host memory access
 202  *   user   : user mode access using soft MMU
 203  *   kernel : kernel mode access using soft MMU
 204  */
 205 static inline int ldub_p(const void *ptr)
 206 {
 207     return *(uint8_t *)ptr;
 208 }
 209
 210 static inline int ldsb_p(const void *ptr)
 211 {
 212     return *(int8_t *)ptr;
 213 }
 214
 215 static inline void stb_p(void *ptr, int v)
 216 {
 217     *(uint8_t *)ptr = v;
 218 }
 219
 220 /* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
 221    kernel handles unaligned load/stores may give better results, but
 222    it is a system wide setting : bad */
 223 #if defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED)
 224
 225 /* conservative code for little endian unaligned accesses */
 226 static inline int lduw_le_p(const void *ptr)
 227 {
 228 #ifdef _ARCH_PPC
 229     int val;
 230     __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
 231     return val;
 232 #else
 233     const uint8_t *p = ptr;
 234     return p[0] | (p[1] << 8);
 235 #endif
 236 }
 237
 238 static inline int ldsw_le_p(const void *ptr)
 239 {
 240 #ifdef _ARCH_PPC
 241     int val;
 242     __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
 243     return (int16_t)val;
 244 #else
 245     const uint8_t *p = ptr;
 246     return (int16_t)(p[0] | (p[1] << 8));
 247 #endif
 248 }
 249
 250 static inline int ldl_le_p(const void *ptr)
 251 {
 252 #ifdef _ARCH_PPC
 253     int val;
 254     __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
 255     return val;
 256 #else
 257     const uint8_t *p = ptr;
 258     return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
 259 #endif
 260 }
 261
 262 static inline uint64_t ldq_le_p(const void *ptr)
 263 {
 264     const uint8_t *p = ptr;
 265     uint32_t v1, v2;
 266     v1 = ldl_le_p(p);
 267     v2 = ldl_le_p(p + 4);
 268     return v1 | ((uint64_t)v2 << 32);
 269 }
 270
 271 static inline void stw_le_p(void *ptr, int v)
 272 {
 273 #ifdef _ARCH_PPC
 274     __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
 275 #else
 276     uint8_t *p = ptr;
 277     p[0] = v;
 278     p[1] = v >> 8;
 279 #endif
 280 }
 281
 282 static inline void stl_le_p(void *ptr, int v)
 283 {
 284 #ifdef _ARCH_PPC
 285     __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
 286 #else
 287     uint8_t *p = ptr;
 288     p[0] = v;
 289     p[1] = v >> 8;
 290     p[2] = v >> 16;
 291     p[3] = v >> 24;
 292 #endif
 293 }
 294
 295 static inline void stq_le_p(void *ptr, uint64_t v)
 296 {
 297     uint8_t *p = ptr;
 298     stl_le_p(p, (uint32_t)v);
 299     stl_le_p(p + 4, v >> 32);
 300 }
 301
 302 /* float access */
 303
 304 static inline float32 ldfl_le_p(const void *ptr)
 305 {
 306     union {
 307         float32 f;
 308         uint32_t i;
 309     } u;
 310     u.i = ldl_le_p(ptr);
 311     return u.f;
 312 }
 313
 314 static inline void stfl_le_p(void *ptr, float32 v)
 315 {
 316     union {
 317         float32 f;
 318         uint32_t i;
 319     } u;
 320     u.f = v;
 321     stl_le_p(ptr, u.i);
 322 }
 323
 324 static inline float64 ldfq_le_p(const void *ptr)
 325 {
 326     CPU_DoubleU u;
 327     u.l.lower = ldl_le_p(ptr);
 328     u.l.upper = ldl_le_p(ptr + 4);
 329     return u.d;
 330 }
 331
 332 static inline void stfq_le_p(void *ptr, float64 v)
 333 {
 334     CPU_DoubleU u;
 335     u.d = v;
 336     stl_le_p(ptr, u.l.lower);
 337     stl_le_p(ptr + 4, u.l.upper);
 338 }
 339
 340 #else
 341
 342 static inline int lduw_le_p(const void *ptr)
 343 {
 344     return *(uint16_t *)ptr;
 345 }
 346
 347 static inline int ldsw_le_p(const void *ptr)
 348 {
 349     return *(int16_t *)ptr;
 350 }
 351
 352 static inline int ldl_le_p(const void *ptr)
 353 {
 354     return *(uint32_t *)ptr;
 355 }
 356
 357 static inline uint64_t ldq_le_p(const void *ptr)
 358 {
 359     return *(uint64_t *)ptr;
 360 }
 361
 362 static inline void stw_le_p(void *ptr, int v)
 363 {
 364     *(uint16_t *)ptr = v;
 365 }
 366
 367 static inline void stl_le_p(void *ptr, int v)
 368 {
 369     *(uint32_t *)ptr = v;
 370 }
 371
 372 static inline void stq_le_p(void *ptr, uint64_t v)
 373 {
 374     *(uint64_t *)ptr = v;
 375 }
 376
 377 /* float access */
 378
 379 static inline float32 ldfl_le_p(const void *ptr)
 380 {
 381     return *(float32 *)ptr;
 382 }
 383
 384 static inline float64 ldfq_le_p(const void *ptr)
 385 {
 386     return *(float64 *)ptr;
 387 }
 388
 389 static inline void stfl_le_p(void *ptr, float32 v)
 390 {
 391     *(float32 *)ptr = v;
 392 }
 393
 394 static inline void stfq_le_p(void *ptr, float64 v)
 395 {
 396     *(float64 *)ptr = v;
 397 }
 398 #endif
 399
 400 #if !defined(HOST_WORDS_BIGENDIAN) || defined(WORDS_ALIGNED)
 401
 402 static inline int lduw_be_p(const void *ptr)
 403 {
 404 #if defined(__i386__)
 405     int val;
 406     asm volatile ("movzwl %1, %0\n"
 407                   "xchgb %b0, %h0\n"
 408                   : "=q" (val)
 409                   : "m" (*(uint16_t *)ptr));
 410     return val;
 411 #else
 412     const uint8_t *b = ptr;
 413     return ((b[0] << 8) | b[1]);
 414 #endif
 415 }
 416
 417 static inline int ldsw_be_p(const void *ptr)
 418 {
 419 #if defined(__i386__)
 420     int val;
 421     asm volatile ("movzwl %1, %0\n"
 422                   "xchgb %b0, %h0\n"
 423                   : "=q" (val)
 424                   : "m" (*(uint16_t *)ptr));
 425     return (int16_t)val;
 426 #else
 427     const uint8_t *b = ptr;
 428     return (int16_t)((b[0] << 8) | b[1]);
 429 #endif
 430 }
 431
 432 static inline int ldl_be_p(const void *ptr)
 433 {
 434 #if defined(__i386__) || defined(__x86_64__)
 435     int val;
 436     asm volatile ("movl %1, %0\n"
 437                   "bswap %0\n"
 438                   : "=r" (val)
 439                   : "m" (*(uint32_t *)ptr));
 440     return val;
 441 #else
 442     const uint8_t *b = ptr;
 443     return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3];
 444 #endif
 445 }
 446
 447 static inline uint64_t ldq_be_p(const void *ptr)
 448 {
 449     uint32_t a,b;
 450     a = ldl_be_p(ptr);
 451     b = ldl_be_p((uint8_t *)ptr + 4);
 452     return (((uint64_t)a<<32)|b);
 453 }
 454
 455 static inline void stw_be_p(void *ptr, int v)
 456 {
 457 #if defined(__i386__)
 458     asm volatile ("xchgb %b0, %h0\n"
 459                   "movw %w0, %1\n"
 460                   : "=q" (v)
 461                   : "m" (*(uint16_t *)ptr), "0" (v));
 462 #else
 463     uint8_t *d = (uint8_t *) ptr;
 464     d[0] = v >> 8;
 465     d[1] = v;
 466 #endif
 467 }
 468
 469 static inline void stl_be_p(void *ptr, int v)
 470 {
 471 #if defined(__i386__) || defined(__x86_64__)
 472     asm volatile ("bswap %0\n"
 473                   "movl %0, %1\n"
 474                   : "=r" (v)
 475                   : "m" (*(uint32_t *)ptr), "0" (v));
 476 #else
 477     uint8_t *d = (uint8_t *) ptr;
 478     d[0] = v >> 24;
 479     d[1] = v >> 16;
 480     d[2] = v >> 8;
 481     d[3] = v;
 482 #endif
 483 }
 484
 485 static inline void stq_be_p(void *ptr, uint64_t v)
 486 {
 487     stl_be_p(ptr, v >> 32);
 488     stl_be_p((uint8_t *)ptr + 4, v);
 489 }
 490
 491 /* float access */
 492
 493 static inline float32 ldfl_be_p(const void *ptr)
 494 {
 495     union {
 496         float32 f;
 497         uint32_t i;
 498     } u;
 499     u.i = ldl_be_p(ptr);
 500     return u.f;
 501 }
 502
 503 static inline void stfl_be_p(void *ptr, float32 v)
 504 {
 505     union {
 506         float32 f;
 507         uint32_t i;
 508     } u;
 509     u.f = v;
 510     stl_be_p(ptr, u.i);
 511 }
 512
 513 static inline float64 ldfq_be_p(const void *ptr)
 514 {
 515     CPU_DoubleU u;
 516     u.l.upper = ldl_be_p(ptr);
 517     u.l.lower = ldl_be_p((uint8_t *)ptr + 4);
 518     return u.d;
 519 }
 520
 521 static inline void stfq_be_p(void *ptr, float64 v)
 522 {
 523     CPU_DoubleU u;
 524     u.d = v;
 525     stl_be_p(ptr, u.l.upper);
 526     stl_be_p((uint8_t *)ptr + 4, u.l.lower);
 527 }
 528
 529 #else
 530
 531 static inline int lduw_be_p(const void *ptr)
 532 {
 533     return *(uint16_t *)ptr;
 534 }
 535
 536 static inline int ldsw_be_p(const void *ptr)
 537 {
 538     return *(int16_t *)ptr;
 539 }
 540
 541 static inline int ldl_be_p(const void *ptr)
 542 {
 543     return *(uint32_t *)ptr;
 544 }
 545
 546 static inline uint64_t ldq_be_p(const void *ptr)
 547 {
 548     return *(uint64_t *)ptr;
 549 }
 550
 551 static inline void stw_be_p(void *ptr, int v)
 552 {
 553     *(uint16_t *)ptr = v;
 554 }
 555
 556 static inline void stl_be_p(void *ptr, int v)
 557 {
 558     *(uint32_t *)ptr = v;
 559 }
 560
 561 static inline void stq_be_p(void *ptr, uint64_t v)
 562 {
 563     *(uint64_t *)ptr = v;
 564 }
 565
 566 /* float access */
 567
 568 static inline float32 ldfl_be_p(const void *ptr)
 569 {
 570     return *(float32 *)ptr;
 571 }
 572
 573 static inline float64 ldfq_be_p(const void *ptr)
 574 {
 575     return *(float64 *)ptr;
 576 }
 577
 578 static inline void stfl_be_p(void *ptr, float32 v)
 579 {
 580     *(float32 *)ptr = v;
 581 }
 582
 583 static inline void stfq_be_p(void *ptr, float64 v)
 584 {
 585     *(float64 *)ptr = v;
 586 }
 587
 588 #endif
 589
 590 /* target CPU memory access functions */
 591 #if defined(TARGET_WORDS_BIGENDIAN)
 592 #define lduw_p(p) lduw_be_p(p)
 593 #define ldsw_p(p) ldsw_be_p(p)
 594 #define ldl_p(p) ldl_be_p(p)
 595 #define ldq_p(p) ldq_be_p(p)
 596 #define ldfl_p(p) ldfl_be_p(p)
 597 #define ldfq_p(p) ldfq_be_p(p)
 598 #define stw_p(p, v) stw_be_p(p, v)
 599 #define stl_p(p, v) stl_be_p(p, v)
 600 #define stq_p(p, v) stq_be_p(p, v)
 601 #define stfl_p(p, v) stfl_be_p(p, v)
 602 #define stfq_p(p, v) stfq_be_p(p, v)
 603 #else
 604 #define lduw_p(p) lduw_le_p(p)
 605 #define ldsw_p(p) ldsw_le_p(p)
 606 #define ldl_p(p) ldl_le_p(p)
 607 #define ldq_p(p) ldq_le_p(p)
 608 #define ldfl_p(p) ldfl_le_p(p)
 609 #define ldfq_p(p) ldfq_le_p(p)
 610 #define stw_p(p, v) stw_le_p(p, v)
 611 #define stl_p(p, v) stl_le_p(p, v)
 612 #define stq_p(p, v) stq_le_p(p, v)
 613 #define stfl_p(p, v) stfl_le_p(p, v)
 614 #define stfq_p(p, v) stfq_le_p(p, v)
 615 #endif
 616
 617 /* MMU memory access macros */
 618
 619 #if defined(CONFIG_USER_ONLY)
 620 #include <assert.h>
 621 #include "qemu-types.h"
 622
 623 /* On some host systems the guest address space is reserved on the host.
 624  * This allows the guest address space to be offset to a convenient location.
 625  */
 626 #if defined(CONFIG_USE_GUEST_BASE)
 627 extern unsigned long guest_base;
 628 extern int have_guest_base;
 629 extern unsigned long reserved_va;
 630 #define GUEST_BASE guest_base
 631 #define RESERVED_VA reserved_va
 632 #else
 633 #define GUEST_BASE 0ul
 634 #define RESERVED_VA 0ul
 635 #endif
 636
 637 /* All direct uses of g2h and h2g need to go away for usermode softmmu.  */
 638 #define g2h(x) ((void *)((unsigned long)(x) + GUEST_BASE))
 639
 640 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
 641 #define h2g_valid(x) 1
 642 #else
 643 #define h2g_valid(x) ({ \
 644     unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
 645     __guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS); \
 646 })
 647 #endif
 648
 649 #define h2g(x) ({ \
 650     unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
 651     /* Check if given address fits target address space */ \
 652     assert(h2g_valid(x)); \
 653     (abi_ulong)__ret; \
 654 })
 655
 656 #define saddr(x) g2h(x)
 657 #define laddr(x) g2h(x)
 658
 659 #else /* !CONFIG_USER_ONLY */
 660 /* NOTE: we use double casts if pointers and target_ulong have
 661    different sizes */
 662 #define saddr(x) (uint8_t *)(long)(x)
 663 #define laddr(x) (uint8_t *)(long)(x)
 664 #endif
 665
 666 #define ldub_raw(p) ldub_p(laddr((p)))
 667 #define ldsb_raw(p) ldsb_p(laddr((p)))
 668 #define lduw_raw(p) lduw_p(laddr((p)))
 669 #define ldsw_raw(p) ldsw_p(laddr((p)))
 670 #define ldl_raw(p) ldl_p(laddr((p)))
 671 #define ldq_raw(p) ldq_p(laddr((p)))
 672 #define ldfl_raw(p) ldfl_p(laddr((p)))
 673 #define ldfq_raw(p) ldfq_p(laddr((p)))
 674 #define stb_raw(p, v) stb_p(saddr((p)), v)
 675 #define stw_raw(p, v) stw_p(saddr((p)), v)
 676 #define stl_raw(p, v) stl_p(saddr((p)), v)
 677 #define stq_raw(p, v) stq_p(saddr((p)), v)
 678 #define stfl_raw(p, v) stfl_p(saddr((p)), v)
 679 #define stfq_raw(p, v) stfq_p(saddr((p)), v)
 680
 681
 682 #if defined(CONFIG_USER_ONLY)
 683
 684 /* if user mode, no other memory access functions */
 685 #define ldub(p) ldub_raw(p)
 686 #define ldsb(p) ldsb_raw(p)
 687 #define lduw(p) lduw_raw(p)
 688 #define ldsw(p) ldsw_raw(p)
 689 #define ldl(p) ldl_raw(p)
 690 #define ldq(p) ldq_raw(p)
 691 #define ldfl(p) ldfl_raw(p)
 692 #define ldfq(p) ldfq_raw(p)
 693 #define stb(p, v) stb_raw(p, v)
 694 #define stw(p, v) stw_raw(p, v)
 695 #define stl(p, v) stl_raw(p, v)
 696 #define stq(p, v) stq_raw(p, v)
 697 #define stfl(p, v) stfl_raw(p, v)
 698 #define stfq(p, v) stfq_raw(p, v)
 699
 700 #define ldub_code(p) ldub_raw(p)
 701 #define ldsb_code(p) ldsb_raw(p)
 702 #define lduw_code(p) lduw_raw(p)
 703 #define ldsw_code(p) ldsw_raw(p)
 704 #define ldl_code(p) ldl_raw(p)
 705 #define ldq_code(p) ldq_raw(p)
 706
 707 #define ldub_kernel(p) ldub_raw(p)
 708 #define ldsb_kernel(p) ldsb_raw(p)
 709 #define lduw_kernel(p) lduw_raw(p)
 710 #define ldsw_kernel(p) ldsw_raw(p)
 711 #define ldl_kernel(p) ldl_raw(p)
 712 #define ldq_kernel(p) ldq_raw(p)
 713 #define ldfl_kernel(p) ldfl_raw(p)
 714 #define ldfq_kernel(p) ldfq_raw(p)
 715 #define stb_kernel(p, v) stb_raw(p, v)
 716 #define stw_kernel(p, v) stw_raw(p, v)
 717 #define stl_kernel(p, v) stl_raw(p, v)
 718 #define stq_kernel(p, v) stq_raw(p, v)
 719 #define stfl_kernel(p, v) stfl_raw(p, v)
 720 #define stfq_kernel(p, vt) stfq_raw(p, v)
 721
 722 #endif /* defined(CONFIG_USER_ONLY) */
 723
 724 /* page related stuff */
 725
 726 #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
 727 #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
 728 #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
 729
 730 /* ??? These should be the larger of unsigned long and target_ulong.  */
 731 extern unsigned long qemu_real_host_page_size;
 732 extern unsigned long qemu_host_page_bits;
 733 extern unsigned long qemu_host_page_size;
 734 extern unsigned long qemu_host_page_mask;
 735
 736 #define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
 737
 738 /* same as PROT_xxx */
 739 #define PAGE_READ      0x0001
 740 #define PAGE_WRITE     0x0002
 741 #define PAGE_EXEC      0x0004
 742 #define PAGE_BITS      (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
 743 #define PAGE_VALID     0x0008
 744 /* original state of the write flag (used when tracking self-modifying
 745    code */
 746 #define PAGE_WRITE_ORG 0x0010
 747 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
 748 /* FIXME: Code that sets/uses this is broken and needs to go away.  */
 749 #define PAGE_RESERVED  0x0020
 750 #endif
 751
 752 #if defined(CONFIG_USER_ONLY)
 753 void page_dump(FILE *f);
 754
 755 typedef int (*walk_memory_regions_fn)(void *, abi_ulong,
 756                                       abi_ulong, unsigned long);
 757 int walk_memory_regions(void *, walk_memory_regions_fn);
 758
 759 int page_get_flags(target_ulong address);
 760 void page_set_flags(target_ulong start, target_ulong end, int flags);
 761 int page_check_range(target_ulong start, target_ulong len, int flags);
 762 #endif
 763
 764 CPUState *cpu_copy(CPUState *env);
 765 CPUState *qemu_get_cpu(int cpu);
 766
 767 #define CPU_DUMP_CODE 0x00010000
 768
 769 void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
 770                     int flags);
 771 void cpu_dump_statistics(CPUState *env, FILE *f, fprintf_function cpu_fprintf,
 772                          int flags);
 773
 774 void QEMU_NORETURN cpu_abort(CPUState *env, const char *fmt, ...)
 775     GCC_FMT_ATTR(2, 3);
 776 extern CPUState *first_cpu;
 777 extern CPUState *cpu_single_env;
 778
 779 #define CPU_INTERRUPT_HARD   0x02 /* hardware interrupt pending */
 780 #define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
 781 #define CPU_INTERRUPT_TIMER  0x08 /* internal timer exception pending */
 782 #define CPU_INTERRUPT_FIQ    0x10 /* Fast interrupt pending.  */
 783 #define CPU_INTERRUPT_HALT   0x20 /* CPU halt wanted */
 784 #define CPU_INTERRUPT_SMI    0x40 /* (x86 only) SMI interrupt pending */
 785 #define CPU_INTERRUPT_DEBUG  0x80 /* Debug event occured.  */
 786 #define CPU_INTERRUPT_VIRQ   0x100 /* virtual interrupt pending.  */
 787 #define CPU_INTERRUPT_NMI    0x200 /* NMI pending. */
 788 #define CPU_INTERRUPT_INIT   0x400 /* INIT pending. */
 789 #define CPU_INTERRUPT_SIPI   0x800 /* SIPI pending. */
 790 #define CPU_INTERRUPT_MCE    0x1000 /* (x86 only) MCE pending. */
 791
 792 void cpu_interrupt(CPUState *s, int mask);
 793 void cpu_reset_interrupt(CPUState *env, int mask);
 794
 795 void cpu_exit(CPUState *s);
 796
 797 int qemu_cpu_has_work(CPUState *env);
 798
 799 /* Breakpoint/watchpoint flags */
 800 #define BP_MEM_READ           0x01
 801 #define BP_MEM_WRITE          0x02
 802 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 803 #define BP_STOP_BEFORE_ACCESS 0x04
 804 #define BP_WATCHPOINT_HIT     0x08
 805 #define BP_GDB                0x10
 806 #define BP_CPU                0x20
 807
 808 int cpu_breakpoint_insert(CPUState *env, target_ulong pc, int flags,
 809                           CPUBreakpoint **breakpoint);
 810 int cpu_breakpoint_remove(CPUState *env, target_ulong pc, int flags);
 811 void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint);
 812 void cpu_breakpoint_remove_all(CPUState *env, int mask);
 813 int cpu_watchpoint_insert(CPUState *env, target_ulong addr, target_ulong len,
 814                           int flags, CPUWatchpoint **watchpoint);
 815 int cpu_watchpoint_remove(CPUState *env, target_ulong addr,
 816                           target_ulong len, int flags);
 817 void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint);
 818 void cpu_watchpoint_remove_all(CPUState *env, int mask);
 819
 820 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 821 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 822 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 823
 824 void cpu_single_step(CPUState *env, int enabled);
 825 void cpu_reset(CPUState *s);
 826 int cpu_is_stopped(CPUState *env);
 827 void run_on_cpu(CPUState *env, void (*func)(void *data), void *data);
 828
 829 #define CPU_LOG_TB_OUT_ASM (1 << 0)
 830 #define CPU_LOG_TB_IN_ASM  (1 << 1)
 831 #define CPU_LOG_TB_OP      (1 << 2)
 832 #define CPU_LOG_TB_OP_OPT  (1 << 3)
 833 #define CPU_LOG_INT        (1 << 4)
 834 #define CPU_LOG_EXEC       (1 << 5)
 835 #define CPU_LOG_PCALL      (1 << 6)
 836 #define CPU_LOG_IOPORT     (1 << 7)
 837 #define CPU_LOG_TB_CPU     (1 << 8)
 838 #define CPU_LOG_RESET      (1 << 9)
 839
 840 /* define log items */
 841 typedef struct CPULogItem {
 842     int mask;
 843     const char *name;
 844     const char *help;
 845 } CPULogItem;
 846
 847 extern const CPULogItem cpu_log_items[];
 848
 849 void cpu_set_log(int log_flags);
 850 void cpu_set_log_filename(const char *filename);
 851 int cpu_str_to_log_mask(const char *str);
 852
 853 #if !defined(CONFIG_USER_ONLY)
 854
 855 /* Return the physical page corresponding to a virtual one. Use it
 856    only for debugging because no protection checks are done. Return -1
 857    if no page found. */
 858 target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
 859
 860 /* memory API */
 861
 862 extern int phys_ram_fd;
 863 extern ram_addr_t ram_size;
 864
 865 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
 866 #define RAM_PREALLOC_MASK   (1 << 0)
 867
 868 typedef struct RAMBlock {
 869     uint8_t *host;
 870     ram_addr_t offset;
 871     ram_addr_t length;
 872     uint32_t flags;
 873     char idstr[256];
 874     QLIST_ENTRY(RAMBlock) next;
 875 #if defined(__linux__) && !defined(TARGET_S390X)
 876     int fd;
 877 #endif
 878 } RAMBlock;
 879
 880 typedef struct RAMList {
 881     uint8_t *phys_dirty;
 882     QLIST_HEAD(ram, RAMBlock) blocks;
 883 } RAMList;
 884 extern RAMList ram_list;
 885
 886 extern const char *mem_path;
 887 extern int mem_prealloc;
 888
 889 /* physical memory access */
 890
 891 /* MMIO pages are identified by a combination of an IO device index and
 892    3 flags.  The ROMD code stores the page ram offset in iotlb entry,
 893    so only a limited number of ids are avaiable.  */
 894
 895 #define IO_MEM_NB_ENTRIES  (1 << (TARGET_PAGE_BITS  - IO_MEM_SHIFT))
 896
 897 /* Flags stored in the low bits of the TLB virtual address.  These are
 898    defined so that fast path ram access is all zeros.  */
 899 /* Zero if TLB entry is valid.  */
 900 #define TLB_INVALID_MASK   (1 << 3)
 901 /* Set if TLB entry references a clean RAM page.  The iotlb entry will
 902    contain the page physical address.  */
 903 #define TLB_NOTDIRTY    (1 << 4)
 904 /* Set if TLB entry is an IO callback.  */
 905 #define TLB_MMIO        (1 << 5)
 906
 907 #define VGA_DIRTY_FLAG       0x01
 908 #define CODE_DIRTY_FLAG      0x02
 909 #define MIGRATION_DIRTY_FLAG 0x08
 910
 911 /* read dirty bit (return 0 or 1) */
 912 static inline int cpu_physical_memory_is_dirty(ram_addr_t addr)
 913 {
 914     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
 915 }
 916
 917 static inline int cpu_physical_memory_get_dirty_flags(ram_addr_t addr)
 918 {
 919     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS];
 920 }
 921
 922 static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
 923                                                 int dirty_flags)
 924 {
 925     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
 926 }
 927
 928 static inline void cpu_physical_memory_set_dirty(ram_addr_t addr)
 929 {
 930     ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
 931 }
 932
 933 static inline int cpu_physical_memory_set_dirty_flags(ram_addr_t addr,
 934                                                       int dirty_flags)
 935 {
 936     return ram_list.phys_dirty[addr >> TARGET_PAGE_BITS] |= dirty_flags;
 937 }
 938
 939 static inline void cpu_physical_memory_mask_dirty_range(ram_addr_t start,
 940                                                         int length,
 941                                                         int dirty_flags)
 942 {
 943     int i, mask, len;
 944     uint8_t *p;
 945
 946     len = length >> TARGET_PAGE_BITS;
 947     mask = ~dirty_flags;
 948     p = ram_list.phys_dirty + (start >> TARGET_PAGE_BITS);
 949     for (i = 0; i < len; i++) {
 950         p[i] &= mask;
 951     }
 952 }
 953
 954 void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
 955                                      int dirty_flags);
 956 void cpu_tlb_update_dirty(CPUState *env);
 957
 958 int cpu_physical_memory_set_dirty_tracking(int enable);
 959
 960 int cpu_physical_memory_get_dirty_tracking(void);
 961
 962 int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr,
 963                                    target_phys_addr_t end_addr);
 964
 965 int cpu_physical_log_start(target_phys_addr_t start_addr,
 966                            ram_addr_t size);
 967
 968 int cpu_physical_log_stop(target_phys_addr_t start_addr,
 969                           ram_addr_t size);
 970
 971 void dump_exec_info(FILE *f, fprintf_function cpu_fprintf);
 972 #endif /* !CONFIG_USER_ONLY */
 973
 974 int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
 975                         uint8_t *buf, int len, int is_write);
 976
 977 #endif /* CPU_ALL_H */