hw/arm/armv7m.c

   1 /*
   2  * ARMV7M System emulation.
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "hw/arm/armv7m.h"
  12 #include "qapi/error.h"
  13 #include "qemu-common.h"
  14 #include "cpu.h"
  15 #include "hw/sysbus.h"
  16 #include "hw/arm/arm.h"
  17 #include "hw/loader.h"
  18 #include "elf.h"
  19 #include "sysemu/qtest.h"
  20 #include "qemu/error-report.h"
  21 #include "exec/address-spaces.h"
  22 #include "target/arm/idau.h"
  23
  24 /* Bitbanded IO.  Each word corresponds to a single bit.  */
  25
  26 /* Get the byte address of the real memory for a bitband access.  */
  27 static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
  28 {
  29     return s->base | (offset & 0x1ffffff) >> 5;
  30 }
  31
  32 static MemTxResult bitband_read(void *opaque, hwaddr offset,
  33                                 uint64_t *data, unsigned size, MemTxAttrs attrs)
  34 {
  35     BitBandState *s = opaque;
  36     uint8_t buf[4];
  37     MemTxResult res;
  38     int bitpos, bit;
  39     hwaddr addr;
  40
  41     assert(size <= 4);
  42
  43     /* Find address in underlying memory and round down to multiple of size */
  44     addr = bitband_addr(s, offset) & (-size);
  45     res = address_space_read(&s->source_as, addr, attrs, buf, size);
  46     if (res) {
  47         return res;
  48     }
  49     /* Bit position in the N bytes read... */
  50     bitpos = (offset >> 2) & ((size * 8) - 1);
  51     /* ...converted to byte in buffer and bit in byte */
  52     bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
  53     *data = bit;
  54     return MEMTX_OK;
  55 }
  56
  57 static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
  58                                  unsigned size, MemTxAttrs attrs)
  59 {
  60     BitBandState *s = opaque;
  61     uint8_t buf[4];
  62     MemTxResult res;
  63     int bitpos, bit;
  64     hwaddr addr;
  65
  66     assert(size <= 4);
  67
  68     /* Find address in underlying memory and round down to multiple of size */
  69     addr = bitband_addr(s, offset) & (-size);
  70     res = address_space_read(&s->source_as, addr, attrs, buf, size);
  71     if (res) {
  72         return res;
  73     }
  74     /* Bit position in the N bytes read... */
  75     bitpos = (offset >> 2) & ((size * 8) - 1);
  76     /* ...converted to byte in buffer and bit in byte */
  77     bit = 1 << (bitpos & 7);
  78     if (value & 1) {
  79         buf[bitpos >> 3] |= bit;
  80     } else {
  81         buf[bitpos >> 3] &= ~bit;
  82     }
  83     return address_space_write(&s->source_as, addr, attrs, buf, size);
  84 }
  85
  86 static const MemoryRegionOps bitband_ops = {
  87     .read_with_attrs = bitband_read,
  88     .write_with_attrs = bitband_write,
  89     .endianness = DEVICE_NATIVE_ENDIAN,
  90     .impl.min_access_size = 1,
  91     .impl.max_access_size = 4,
  92     .valid.min_access_size = 1,
  93     .valid.max_access_size = 4,
  94 };
  95
  96 static void bitband_init(Object *obj)
  97 {
  98     BitBandState *s = BITBAND(obj);
  99     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 100
 101     memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
 102                           "bitband", 0x02000000);
 103     sysbus_init_mmio(dev, &s->iomem);
 104 }
 105
 106 static void bitband_realize(DeviceState *dev, Error **errp)
 107 {
 108     BitBandState *s = BITBAND(dev);
 109
 110     if (!s->source_memory) {
 111         error_setg(errp, "source-memory property not set");
 112         return;
 113     }
 114
 115     address_space_init(&s->source_as, s->source_memory, "bitband-source");
 116 }
 117
 118 /* Board init.  */
 119
 120 static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
 121     0x20000000, 0x40000000
 122 };
 123
 124 static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
 125     0x22000000, 0x42000000
 126 };
 127
 128 static void armv7m_instance_init(Object *obj)
 129 {
 130     ARMv7MState *s = ARMV7M(obj);
 131     int i;
 132
 133     /* Can't init the cpu here, we don't yet know which model to use */
 134
 135     memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
 136
 137     object_initialize(&s->nvic, sizeof(s->nvic), TYPE_NVIC);
 138     qdev_set_parent_bus(DEVICE(&s->nvic), sysbus_get_default());
 139     object_property_add_alias(obj, "num-irq",
 140                               OBJECT(&s->nvic), "num-irq", &error_abort);
 141
 142     for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
 143         object_initialize(&s->bitband[i], sizeof(s->bitband[i]), TYPE_BITBAND);
 144         qdev_set_parent_bus(DEVICE(&s->bitband[i]), sysbus_get_default());
 145     }
 146 }
 147
 148 static void armv7m_realize(DeviceState *dev, Error **errp)
 149 {
 150     ARMv7MState *s = ARMV7M(dev);
 151     SysBusDevice *sbd;
 152     Error *err = NULL;
 153     int i;
 154
 155     if (!s->board_memory) {
 156         error_setg(errp, "memory property was not set");
 157         return;
 158     }
 159
 160     memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
 161
 162     s->cpu = ARM_CPU(object_new(s->cpu_type));
 163
 164     object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory",
 165                              &error_abort);
 166     if (object_property_find(OBJECT(s->cpu), "idau", NULL)) {
 167         object_property_set_link(OBJECT(s->cpu), s->idau, "idau", &err);
 168         if (err != NULL) {
 169             error_propagate(errp, err);
 170             return;
 171         }
 172     }
 173     object_property_set_bool(OBJECT(s->cpu), true, "realized", &err);
 174     if (err != NULL) {
 175         error_propagate(errp, err);
 176         return;
 177     }
 178
 179     /* Note that we must realize the NVIC after the CPU */
 180     object_property_set_bool(OBJECT(&s->nvic), true, "realized", &err);
 181     if (err != NULL) {
 182         error_propagate(errp, err);
 183         return;
 184     }
 185
 186     /* Alias the NVIC's input and output GPIOs as our own so the board
 187      * code can wire them up. (We do this in realize because the
 188      * NVIC doesn't create the input GPIO array until realize.)
 189      */
 190     qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
 191     qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
 192
 193     /* Wire the NVIC up to the CPU */
 194     sbd = SYS_BUS_DEVICE(&s->nvic);
 195     sysbus_connect_irq(sbd, 0,
 196                        qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
 197     s->cpu->env.nvic = &s->nvic;
 198
 199     memory_region_add_subregion(&s->container, 0xe000e000,
 200                                 sysbus_mmio_get_region(sbd, 0));
 201
 202     for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
 203         Object *obj = OBJECT(&s->bitband[i]);
 204         SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
 205
 206         object_property_set_int(obj, bitband_input_addr[i], "base", &err);
 207         if (err != NULL) {
 208             error_propagate(errp, err);
 209             return;
 210         }
 211         object_property_set_link(obj, OBJECT(s->board_memory),
 212                                  "source-memory", &error_abort);
 213         object_property_set_bool(obj, true, "realized", &err);
 214         if (err != NULL) {
 215             error_propagate(errp, err);
 216             return;
 217         }
 218
 219         memory_region_add_subregion(&s->container, bitband_output_addr[i],
 220                                     sysbus_mmio_get_region(sbd, 0));
 221     }
 222 }
 223
 224 static Property armv7m_properties[] = {
 225     DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
 226     DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
 227                      MemoryRegion *),
 228     DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
 229     DEFINE_PROP_END_OF_LIST(),
 230 };
 231
 232 static void armv7m_class_init(ObjectClass *klass, void *data)
 233 {
 234     DeviceClass *dc = DEVICE_CLASS(klass);
 235
 236     dc->realize = armv7m_realize;
 237     dc->props = armv7m_properties;
 238 }
 239
 240 static const TypeInfo armv7m_info = {
 241     .name = TYPE_ARMV7M,
 242     .parent = TYPE_SYS_BUS_DEVICE,
 243     .instance_size = sizeof(ARMv7MState),
 244     .instance_init = armv7m_instance_init,
 245     .class_init = armv7m_class_init,
 246 };
 247
 248 static void armv7m_reset(void *opaque)
 249 {
 250     ARMCPU *cpu = opaque;
 251
 252     cpu_reset(CPU(cpu));
 253 }
 254
 255 /* Init CPU and memory for a v7-M based board.
 256    mem_size is in bytes.
 257    Returns the ARMv7M device.  */
 258
 259 DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
 260                          const char *kernel_filename, const char *cpu_type)
 261 {
 262     DeviceState *armv7m;
 263
 264     armv7m = qdev_create(NULL, TYPE_ARMV7M);
 265     qdev_prop_set_uint32(armv7m, "num-irq", num_irq);
 266     qdev_prop_set_string(armv7m, "cpu-type", cpu_type);
 267     object_property_set_link(OBJECT(armv7m), OBJECT(get_system_memory()),
 268                                      "memory", &error_abort);
 269     /* This will exit with an error if the user passed us a bad cpu_type */
 270     qdev_init_nofail(armv7m);
 271
 272     armv7m_load_kernel(ARM_CPU(first_cpu), kernel_filename, mem_size);
 273     return armv7m;
 274 }
 275
 276 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
 277 {
 278     int image_size;
 279     uint64_t entry;
 280     uint64_t lowaddr;
 281     int big_endian;
 282     AddressSpace *as;
 283     int asidx;
 284     CPUState *cs = CPU(cpu);
 285
 286 #ifdef TARGET_WORDS_BIGENDIAN
 287     big_endian = 1;
 288 #else
 289     big_endian = 0;
 290 #endif
 291
 292     if (!kernel_filename && !qtest_enabled()) {
 293         error_report("Guest image must be specified (using -kernel)");
 294         exit(1);
 295     }
 296
 297     if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
 298         asidx = ARMASIdx_S;
 299     } else {
 300         asidx = ARMASIdx_NS;
 301     }
 302     as = cpu_get_address_space(cs, asidx);
 303
 304     if (kernel_filename) {
 305         image_size = load_elf_as(kernel_filename, NULL, NULL, &entry, &lowaddr,
 306                                  NULL, big_endian, EM_ARM, 1, 0, as);
 307         if (image_size < 0) {
 308             image_size = load_image_targphys_as(kernel_filename, 0,
 309                                                 mem_size, as);
 310             lowaddr = 0;
 311         }
 312         if (image_size < 0) {
 313             error_report("Could not load kernel '%s'", kernel_filename);
 314             exit(1);
 315         }
 316     }
 317
 318     /* CPU objects (unlike devices) are not automatically reset on system
 319      * reset, so we must always register a handler to do so. Unlike
 320      * A-profile CPUs, we don't need to do anything special in the
 321      * handler to arrange that it starts correctly.
 322      * This is arguably the wrong place to do this, but it matches the
 323      * way A-profile does it. Note that this means that every M profile
 324      * board must call this function!
 325      */
 326     qemu_register_reset(armv7m_reset, cpu);
 327 }
 328
 329 static Property bitband_properties[] = {
 330     DEFINE_PROP_UINT32("base", BitBandState, base, 0),
 331     DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
 332                      TYPE_MEMORY_REGION, MemoryRegion *),
 333     DEFINE_PROP_END_OF_LIST(),
 334 };
 335
 336 static void bitband_class_init(ObjectClass *klass, void *data)
 337 {
 338     DeviceClass *dc = DEVICE_CLASS(klass);
 339
 340     dc->realize = bitband_realize;
 341     dc->props = bitband_properties;
 342 }
 343
 344 static const TypeInfo bitband_info = {
 345     .name          = TYPE_BITBAND,
 346     .parent        = TYPE_SYS_BUS_DEVICE,
 347     .instance_size = sizeof(BitBandState),
 348     .instance_init = bitband_init,
 349     .class_init    = bitband_class_init,
 350 };
 351
 352 static void armv7m_register_types(void)
 353 {
 354     type_register_static(&bitband_info);
 355     type_register_static(&armv7m_info);
 356 }
 357
 358 type_init(armv7m_register_types)