fpu/softfloat-specialize.h

   1 /*
   2  * QEMU float support
   3  *
   4  * The code in this source file is derived from release 2a of the SoftFloat
   5  * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
   6  * some later contributions) are provided under that license, as detailed below.
   7  * It has subsequently been modified by contributors to the QEMU Project,
   8  * so some portions are provided under:
   9  *  the SoftFloat-2a license
  10  *  the BSD license
  11  *  GPL-v2-or-later
  12  *
  13  * Any future contributions to this file after December 1st 2014 will be
  14  * taken to be licensed under the Softfloat-2a license unless specifically
  15  * indicated otherwise.
  16  */
  17
  18 /*
  19 ===============================================================================
  20 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
  21 Arithmetic Package, Release 2a.
  22
  23 Written by John R. Hauser.  This work was made possible in part by the
  24 International Computer Science Institute, located at Suite 600, 1947 Center
  25 Street, Berkeley, California 94704.  Funding was partially provided by the
  26 National Science Foundation under grant MIP-9311980.  The original version
  27 of this code was written as part of a project to build a fixed-point vector
  28 processor in collaboration with the University of California at Berkeley,
  29 overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
  30 is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
  31 arithmetic/SoftFloat.html'.
  32
  33 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
  34 has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
  35 TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
  36 PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
  37 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
  38
  39 Derivative works are acceptable, even for commercial purposes, so long as
  40 (1) they include prominent notice that the work is derivative, and (2) they
  41 include prominent notice akin to these four paragraphs for those parts of
  42 this code that are retained.
  43
  44 ===============================================================================
  45 */
  46
  47 /* BSD licensing:
  48  * Copyright (c) 2006, Fabrice Bellard
  49  * All rights reserved.
  50  *
  51  * Redistribution and use in source and binary forms, with or without
  52  * modification, are permitted provided that the following conditions are met:
  53  *
  54  * 1. Redistributions of source code must retain the above copyright notice,
  55  * this list of conditions and the following disclaimer.
  56  *
  57  * 2. Redistributions in binary form must reproduce the above copyright notice,
  58  * this list of conditions and the following disclaimer in the documentation
  59  * and/or other materials provided with the distribution.
  60  *
  61  * 3. Neither the name of the copyright holder nor the names of its contributors
  62  * may be used to endorse or promote products derived from this software without
  63  * specific prior written permission.
  64  *
  65  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  66  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  68  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  69  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  70  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  71  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  72  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  73  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  74  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  75  * THE POSSIBILITY OF SUCH DAMAGE.
  76  */
  77
  78 /* Portions of this work are licensed under the terms of the GNU GPL,
  79  * version 2 or later. See the COPYING file in the top-level directory.
  80  */
  81
  82 /* Does the target distinguish signaling NaNs from non-signaling NaNs
  83  * by setting the most significant bit of the mantissa for a signaling NaN?
  84  * (The more common choice is to have it be zero for SNaN and one for QNaN.)
  85  */
  86 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
  87 #define SNAN_BIT_IS_ONE 1
  88 #else
  89 #define SNAN_BIT_IS_ONE 0
  90 #endif
  91
  92 #if defined(TARGET_XTENSA)
  93 /* Define for architectures which deviate from IEEE in not supporting
  94  * signaling NaNs (so all NaNs are treated as quiet).
  95  */
  96 #define NO_SIGNALING_NANS 1
  97 #endif
  98
  99 /*----------------------------------------------------------------------------
 100 | The pattern for a default generated half-precision NaN.
 101 *----------------------------------------------------------------------------*/
 102 #if defined(TARGET_ARM)
 103 const float16 float16_default_nan = const_float16(0x7E00);
 104 #elif SNAN_BIT_IS_ONE
 105 const float16 float16_default_nan = const_float16(0x7DFF);
 106 #else
 107 const float16 float16_default_nan = const_float16(0xFE00);
 108 #endif
 109
 110 /*----------------------------------------------------------------------------
 111 | The pattern for a default generated single-precision NaN.
 112 *----------------------------------------------------------------------------*/
 113 #if defined(TARGET_SPARC)
 114 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
 115 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
 116       defined(TARGET_XTENSA)
 117 const float32 float32_default_nan = const_float32(0x7FC00000);
 118 #elif SNAN_BIT_IS_ONE
 119 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
 120 #else
 121 const float32 float32_default_nan = const_float32(0xFFC00000);
 122 #endif
 123
 124 /*----------------------------------------------------------------------------
 125 | The pattern for a default generated double-precision NaN.
 126 *----------------------------------------------------------------------------*/
 127 #if defined(TARGET_SPARC)
 128 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
 129 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
 130 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
 131 #elif SNAN_BIT_IS_ONE
 132 const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
 133 #else
 134 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
 135 #endif
 136
 137 /*----------------------------------------------------------------------------
 138 | The pattern for a default generated extended double-precision NaN.
 139 *----------------------------------------------------------------------------*/
 140 #if SNAN_BIT_IS_ONE
 141 #define floatx80_default_nan_high 0x7FFF
 142 #define floatx80_default_nan_low  LIT64(0xBFFFFFFFFFFFFFFF)
 143 #else
 144 #define floatx80_default_nan_high 0xFFFF
 145 #define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
 146 #endif
 147
 148 const floatx80 floatx80_default_nan
 149     = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
 150
 151 /*----------------------------------------------------------------------------
 152 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 153 | `low' values hold the most- and least-significant bits, respectively.
 154 *----------------------------------------------------------------------------*/
 155 #if SNAN_BIT_IS_ONE
 156 #define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
 157 #define float128_default_nan_low  LIT64(0xFFFFFFFFFFFFFFFF)
 158 #else
 159 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
 160 #define float128_default_nan_low  LIT64( 0x0000000000000000 )
 161 #endif
 162
 163 const float128 float128_default_nan
 164     = make_float128_init(float128_default_nan_high, float128_default_nan_low);
 165
 166 /*----------------------------------------------------------------------------
 167 | Raises the exceptions specified by `flags'.  Floating-point traps can be
 168 | defined here if desired.  It is currently not possible for such a trap
 169 | to substitute a result value.  If traps are not implemented, this routine
 170 | should be simply `float_exception_flags |= flags;'.
 171 *----------------------------------------------------------------------------*/
 172
 173 void float_raise( int8 flags STATUS_PARAM )
 174 {
 175     STATUS(float_exception_flags) |= flags;
 176 }
 177
 178 /*----------------------------------------------------------------------------
 179 | Internal canonical NaN format.
 180 *----------------------------------------------------------------------------*/
 181 typedef struct {
 182     flag sign;
 183     uint64_t high, low;
 184 } commonNaNT;
 185
 186 #ifdef NO_SIGNALING_NANS
 187 int float16_is_quiet_nan(float16 a_)
 188 {
 189     return float16_is_any_nan(a_);
 190 }
 191
 192 int float16_is_signaling_nan(float16 a_)
 193 {
 194     return 0;
 195 }
 196 #else
 197 /*----------------------------------------------------------------------------
 198 | Returns 1 if the half-precision floating-point value `a' is a quiet
 199 | NaN; otherwise returns 0.
 200 *----------------------------------------------------------------------------*/
 201
 202 int float16_is_quiet_nan(float16 a_)
 203 {
 204     uint16_t a = float16_val(a_);
 205 #if SNAN_BIT_IS_ONE
 206     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 207 #else
 208     return ((a & ~0x8000) >= 0x7c80);
 209 #endif
 210 }
 211
 212 /*----------------------------------------------------------------------------
 213 | Returns 1 if the half-precision floating-point value `a' is a signaling
 214 | NaN; otherwise returns 0.
 215 *----------------------------------------------------------------------------*/
 216
 217 int float16_is_signaling_nan(float16 a_)
 218 {
 219     uint16_t a = float16_val(a_);
 220 #if SNAN_BIT_IS_ONE
 221     return ((a & ~0x8000) >= 0x7c80);
 222 #else
 223     return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
 224 #endif
 225 }
 226 #endif
 227
 228 /*----------------------------------------------------------------------------
 229 | Returns a quiet NaN if the half-precision floating point value `a' is a
 230 | signaling NaN; otherwise returns `a'.
 231 *----------------------------------------------------------------------------*/
 232 float16 float16_maybe_silence_nan(float16 a_)
 233 {
 234     if (float16_is_signaling_nan(a_)) {
 235 #if SNAN_BIT_IS_ONE
 236 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 237         return float16_default_nan;
 238 #  else
 239 #    error Rules for silencing a signaling NaN are target-specific
 240 #  endif
 241 #else
 242         uint16_t a = float16_val(a_);
 243         a |= (1 << 9);
 244         return make_float16(a);
 245 #endif
 246     }
 247     return a_;
 248 }
 249
 250 /*----------------------------------------------------------------------------
 251 | Returns the result of converting the half-precision floating-point NaN
 252 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 253 | exception is raised.
 254 *----------------------------------------------------------------------------*/
 255
 256 static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
 257 {
 258     commonNaNT z;
 259
 260     if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 261     z.sign = float16_val(a) >> 15;
 262     z.low = 0;
 263     z.high = ((uint64_t) float16_val(a))<<54;
 264     return z;
 265 }
 266
 267 /*----------------------------------------------------------------------------
 268 | Returns the result of converting the canonical NaN `a' to the half-
 269 | precision floating-point format.
 270 *----------------------------------------------------------------------------*/
 271
 272 static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
 273 {
 274     uint16_t mantissa = a.high>>54;
 275
 276     if (STATUS(default_nan_mode)) {
 277         return float16_default_nan;
 278     }
 279
 280     if (mantissa) {
 281         return make_float16(((((uint16_t) a.sign) << 15)
 282                              | (0x1F << 10) | mantissa));
 283     } else {
 284         return float16_default_nan;
 285     }
 286 }
 287
 288 #ifdef NO_SIGNALING_NANS
 289 int float32_is_quiet_nan(float32 a_)
 290 {
 291     return float32_is_any_nan(a_);
 292 }
 293
 294 int float32_is_signaling_nan(float32 a_)
 295 {
 296     return 0;
 297 }
 298 #else
 299 /*----------------------------------------------------------------------------
 300 | Returns 1 if the single-precision floating-point value `a' is a quiet
 301 | NaN; otherwise returns 0.
 302 *----------------------------------------------------------------------------*/
 303
 304 int float32_is_quiet_nan( float32 a_ )
 305 {
 306     uint32_t a = float32_val(a_);
 307 #if SNAN_BIT_IS_ONE
 308     return (((a >> 22) & 0x1ff) == 0x1fe) && (a & 0x003fffff);
 309 #else
 310     return ((uint32_t)(a << 1) >= 0xff800000);
 311 #endif
 312 }
 313
 314 /*----------------------------------------------------------------------------
 315 | Returns 1 if the single-precision floating-point value `a' is a signaling
 316 | NaN; otherwise returns 0.
 317 *----------------------------------------------------------------------------*/
 318
 319 int float32_is_signaling_nan( float32 a_ )
 320 {
 321     uint32_t a = float32_val(a_);
 322 #if SNAN_BIT_IS_ONE
 323     return ((uint32_t)(a << 1) >= 0xff800000);
 324 #else
 325     return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
 326 #endif
 327 }
 328 #endif
 329
 330 /*----------------------------------------------------------------------------
 331 | Returns a quiet NaN if the single-precision floating point value `a' is a
 332 | signaling NaN; otherwise returns `a'.
 333 *----------------------------------------------------------------------------*/
 334
 335 float32 float32_maybe_silence_nan( float32 a_ )
 336 {
 337     if (float32_is_signaling_nan(a_)) {
 338 #if SNAN_BIT_IS_ONE
 339 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 340         return float32_default_nan;
 341 #  else
 342 #    error Rules for silencing a signaling NaN are target-specific
 343 #  endif
 344 #else
 345         uint32_t a = float32_val(a_);
 346         a |= (1 << 22);
 347         return make_float32(a);
 348 #endif
 349     }
 350     return a_;
 351 }
 352
 353 /*----------------------------------------------------------------------------
 354 | Returns the result of converting the single-precision floating-point NaN
 355 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 356 | exception is raised.
 357 *----------------------------------------------------------------------------*/
 358
 359 static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
 360 {
 361     commonNaNT z;
 362
 363     if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
 364     z.sign = float32_val(a)>>31;
 365     z.low = 0;
 366     z.high = ( (uint64_t) float32_val(a) )<<41;
 367     return z;
 368 }
 369
 370 /*----------------------------------------------------------------------------
 371 | Returns the result of converting the canonical NaN `a' to the single-
 372 | precision floating-point format.
 373 *----------------------------------------------------------------------------*/
 374
 375 static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
 376 {
 377     uint32_t mantissa = a.high>>41;
 378
 379     if ( STATUS(default_nan_mode) ) {
 380         return float32_default_nan;
 381     }
 382
 383     if ( mantissa )
 384         return make_float32(
 385             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
 386     else
 387         return float32_default_nan;
 388 }
 389
 390 /*----------------------------------------------------------------------------
 391 | Select which NaN to propagate for a two-input operation.
 392 | IEEE754 doesn't specify all the details of this, so the
 393 | algorithm is target-specific.
 394 | The routine is passed various bits of information about the
 395 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
 396 | Note that signalling NaNs are always squashed to quiet NaNs
 397 | by the caller, by calling floatXX_maybe_silence_nan() before
 398 | returning them.
 399 |
 400 | aIsLargerSignificand is only valid if both a and b are NaNs
 401 | of some kind, and is true if a has the larger significand,
 402 | or if both a and b have the same significand but a is
 403 | positive but b is negative. It is only needed for the x87
 404 | tie-break rule.
 405 *----------------------------------------------------------------------------*/
 406
 407 #if defined(TARGET_ARM)
 408 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 409                     flag aIsLargerSignificand)
 410 {
 411     /* ARM mandated NaN propagation rules: take the first of:
 412      *  1. A if it is signaling
 413      *  2. B if it is signaling
 414      *  3. A (quiet)
 415      *  4. B (quiet)
 416      * A signaling NaN is always quietened before returning it.
 417      */
 418     if (aIsSNaN) {
 419         return 0;
 420     } else if (bIsSNaN) {
 421         return 1;
 422     } else if (aIsQNaN) {
 423         return 0;
 424     } else {
 425         return 1;
 426     }
 427 }
 428 #elif defined(TARGET_MIPS)
 429 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 430                     flag aIsLargerSignificand)
 431 {
 432     /* According to MIPS specifications, if one of the two operands is
 433      * a sNaN, a new qNaN has to be generated. This is done in
 434      * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
 435      * says: "When possible, this QNaN result is one of the operand QNaN
 436      * values." In practice it seems that most implementations choose
 437      * the first operand if both operands are qNaN. In short this gives
 438      * the following rules:
 439      *  1. A if it is signaling
 440      *  2. B if it is signaling
 441      *  3. A (quiet)
 442      *  4. B (quiet)
 443      * A signaling NaN is always silenced before returning it.
 444      */
 445     if (aIsSNaN) {
 446         return 0;
 447     } else if (bIsSNaN) {
 448         return 1;
 449     } else if (aIsQNaN) {
 450         return 0;
 451     } else {
 452         return 1;
 453     }
 454 }
 455 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
 456 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 457                    flag aIsLargerSignificand)
 458 {
 459     /* PowerPC propagation rules:
 460      *  1. A if it sNaN or qNaN
 461      *  2. B if it sNaN or qNaN
 462      * A signaling NaN is always silenced before returning it.
 463      */
 464     if (aIsSNaN || aIsQNaN) {
 465         return 0;
 466     } else {
 467         return 1;
 468     }
 469 }
 470 #else
 471 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 472                     flag aIsLargerSignificand)
 473 {
 474     /* This implements x87 NaN propagation rules:
 475      * SNaN + QNaN => return the QNaN
 476      * two SNaNs => return the one with the larger significand, silenced
 477      * two QNaNs => return the one with the larger significand
 478      * SNaN and a non-NaN => return the SNaN, silenced
 479      * QNaN and a non-NaN => return the QNaN
 480      *
 481      * If we get down to comparing significands and they are the same,
 482      * return the NaN with the positive sign bit (if any).
 483      */
 484     if (aIsSNaN) {
 485         if (bIsSNaN) {
 486             return aIsLargerSignificand ? 0 : 1;
 487         }
 488         return bIsQNaN ? 1 : 0;
 489     }
 490     else if (aIsQNaN) {
 491         if (bIsSNaN || !bIsQNaN)
 492             return 0;
 493         else {
 494             return aIsLargerSignificand ? 0 : 1;
 495         }
 496     } else {
 497         return 1;
 498     }
 499 }
 500 #endif
 501
 502 /*----------------------------------------------------------------------------
 503 | Select which NaN to propagate for a three-input operation.
 504 | For the moment we assume that no CPU needs the 'larger significand'
 505 | information.
 506 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
 507 *----------------------------------------------------------------------------*/
 508 #if defined(TARGET_ARM)
 509 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 510                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 511 {
 512     /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
 513      * the default NaN
 514      */
 515     if (infzero && cIsQNaN) {
 516         float_raise(float_flag_invalid STATUS_VAR);
 517         return 3;
 518     }
 519
 520     /* This looks different from the ARM ARM pseudocode, because the ARM ARM
 521      * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
 522      */
 523     if (cIsSNaN) {
 524         return 2;
 525     } else if (aIsSNaN) {
 526         return 0;
 527     } else if (bIsSNaN) {
 528         return 1;
 529     } else if (cIsQNaN) {
 530         return 2;
 531     } else if (aIsQNaN) {
 532         return 0;
 533     } else {
 534         return 1;
 535     }
 536 }
 537 #elif defined(TARGET_MIPS)
 538 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 539                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 540 {
 541     /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns
 542      * the default NaN
 543      */
 544     if (infzero) {
 545         float_raise(float_flag_invalid STATUS_VAR);
 546         return 3;
 547     }
 548
 549     /* Prefer sNaN over qNaN, in the a, b, c order. */
 550     if (aIsSNaN) {
 551         return 0;
 552     } else if (bIsSNaN) {
 553         return 1;
 554     } else if (cIsSNaN) {
 555         return 2;
 556     } else if (aIsQNaN) {
 557         return 0;
 558     } else if (bIsQNaN) {
 559         return 1;
 560     } else {
 561         return 2;
 562     }
 563 }
 564 #elif defined(TARGET_PPC)
 565 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 566                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 567 {
 568     /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
 569      * to return an input NaN if we have one (ie c) rather than generating
 570      * a default NaN
 571      */
 572     if (infzero) {
 573         float_raise(float_flag_invalid STATUS_VAR);
 574         return 2;
 575     }
 576
 577     /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
 578      * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
 579      */
 580     if (aIsSNaN || aIsQNaN) {
 581         return 0;
 582     } else if (cIsSNaN || cIsQNaN) {
 583         return 2;
 584     } else {
 585         return 1;
 586     }
 587 }
 588 #else
 589 /* A default implementation: prefer a to b to c.
 590  * This is unlikely to actually match any real implementation.
 591  */
 592 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
 593                          flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
 594 {
 595     if (aIsSNaN || aIsQNaN) {
 596         return 0;
 597     } else if (bIsSNaN || bIsQNaN) {
 598         return 1;
 599     } else {
 600         return 2;
 601     }
 602 }
 603 #endif
 604
 605 /*----------------------------------------------------------------------------
 606 | Takes two single-precision floating-point values `a' and `b', one of which
 607 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 608 | signaling NaN, the invalid exception is raised.
 609 *----------------------------------------------------------------------------*/
 610
 611 static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
 612 {
 613     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 614     flag aIsLargerSignificand;
 615     uint32_t av, bv;
 616
 617     aIsQuietNaN = float32_is_quiet_nan( a );
 618     aIsSignalingNaN = float32_is_signaling_nan( a );
 619     bIsQuietNaN = float32_is_quiet_nan( b );
 620     bIsSignalingNaN = float32_is_signaling_nan( b );
 621     av = float32_val(a);
 622     bv = float32_val(b);
 623
 624     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 625
 626     if ( STATUS(default_nan_mode) )
 627         return float32_default_nan;
 628
 629     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
 630         aIsLargerSignificand = 0;
 631     } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
 632         aIsLargerSignificand = 1;
 633     } else {
 634         aIsLargerSignificand = (av < bv) ? 1 : 0;
 635     }
 636
 637     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 638                 aIsLargerSignificand)) {
 639         return float32_maybe_silence_nan(b);
 640     } else {
 641         return float32_maybe_silence_nan(a);
 642     }
 643 }
 644
 645 /*----------------------------------------------------------------------------
 646 | Takes three single-precision floating-point values `a', `b' and `c', one of
 647 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 648 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 649 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 650 | obviously c is a NaN, and whether to propagate c or some other NaN is
 651 | implementation defined).
 652 *----------------------------------------------------------------------------*/
 653
 654 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
 655                                          float32 c, flag infzero STATUS_PARAM)
 656 {
 657     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 658         cIsQuietNaN, cIsSignalingNaN;
 659     int which;
 660
 661     aIsQuietNaN = float32_is_quiet_nan(a);
 662     aIsSignalingNaN = float32_is_signaling_nan(a);
 663     bIsQuietNaN = float32_is_quiet_nan(b);
 664     bIsSignalingNaN = float32_is_signaling_nan(b);
 665     cIsQuietNaN = float32_is_quiet_nan(c);
 666     cIsSignalingNaN = float32_is_signaling_nan(c);
 667
 668     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 669         float_raise(float_flag_invalid STATUS_VAR);
 670     }
 671
 672     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 673                           bIsQuietNaN, bIsSignalingNaN,
 674                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 675
 676     if (STATUS(default_nan_mode)) {
 677         /* Note that this check is after pickNaNMulAdd so that function
 678          * has an opportunity to set the Invalid flag.
 679          */
 680         return float32_default_nan;
 681     }
 682
 683     switch (which) {
 684     case 0:
 685         return float32_maybe_silence_nan(a);
 686     case 1:
 687         return float32_maybe_silence_nan(b);
 688     case 2:
 689         return float32_maybe_silence_nan(c);
 690     case 3:
 691     default:
 692         return float32_default_nan;
 693     }
 694 }
 695
 696 #ifdef NO_SIGNALING_NANS
 697 int float64_is_quiet_nan(float64 a_)
 698 {
 699     return float64_is_any_nan(a_);
 700 }
 701
 702 int float64_is_signaling_nan(float64 a_)
 703 {
 704     return 0;
 705 }
 706 #else
 707 /*----------------------------------------------------------------------------
 708 | Returns 1 if the double-precision floating-point value `a' is a quiet
 709 | NaN; otherwise returns 0.
 710 *----------------------------------------------------------------------------*/
 711
 712 int float64_is_quiet_nan( float64 a_ )
 713 {
 714     uint64_t a = float64_val(a_);
 715 #if SNAN_BIT_IS_ONE
 716     return (((a >> 51) & 0xfff) == 0xffe)
 717            && (a & 0x0007ffffffffffffULL);
 718 #else
 719     return ((a << 1) >= 0xfff0000000000000ULL);
 720 #endif
 721 }
 722
 723 /*----------------------------------------------------------------------------
 724 | Returns 1 if the double-precision floating-point value `a' is a signaling
 725 | NaN; otherwise returns 0.
 726 *----------------------------------------------------------------------------*/
 727
 728 int float64_is_signaling_nan( float64 a_ )
 729 {
 730     uint64_t a = float64_val(a_);
 731 #if SNAN_BIT_IS_ONE
 732     return ((a << 1) >= 0xfff0000000000000ULL);
 733 #else
 734     return
 735            ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
 736         && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
 737 #endif
 738 }
 739 #endif
 740
 741 /*----------------------------------------------------------------------------
 742 | Returns a quiet NaN if the double-precision floating point value `a' is a
 743 | signaling NaN; otherwise returns `a'.
 744 *----------------------------------------------------------------------------*/
 745
 746 float64 float64_maybe_silence_nan( float64 a_ )
 747 {
 748     if (float64_is_signaling_nan(a_)) {
 749 #if SNAN_BIT_IS_ONE
 750 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 751         return float64_default_nan;
 752 #  else
 753 #    error Rules for silencing a signaling NaN are target-specific
 754 #  endif
 755 #else
 756         uint64_t a = float64_val(a_);
 757         a |= LIT64( 0x0008000000000000 );
 758         return make_float64(a);
 759 #endif
 760     }
 761     return a_;
 762 }
 763
 764 /*----------------------------------------------------------------------------
 765 | Returns the result of converting the double-precision floating-point NaN
 766 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
 767 | exception is raised.
 768 *----------------------------------------------------------------------------*/
 769
 770 static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
 771 {
 772     commonNaNT z;
 773
 774     if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 775     z.sign = float64_val(a)>>63;
 776     z.low = 0;
 777     z.high = float64_val(a)<<12;
 778     return z;
 779 }
 780
 781 /*----------------------------------------------------------------------------
 782 | Returns the result of converting the canonical NaN `a' to the double-
 783 | precision floating-point format.
 784 *----------------------------------------------------------------------------*/
 785
 786 static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
 787 {
 788     uint64_t mantissa = a.high>>12;
 789
 790     if ( STATUS(default_nan_mode) ) {
 791         return float64_default_nan;
 792     }
 793
 794     if ( mantissa )
 795         return make_float64(
 796               ( ( (uint64_t) a.sign )<<63 )
 797             | LIT64( 0x7FF0000000000000 )
 798             | ( a.high>>12 ));
 799     else
 800         return float64_default_nan;
 801 }
 802
 803 /*----------------------------------------------------------------------------
 804 | Takes two double-precision floating-point values `a' and `b', one of which
 805 | is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
 806 | signaling NaN, the invalid exception is raised.
 807 *----------------------------------------------------------------------------*/
 808
 809 static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
 810 {
 811     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
 812     flag aIsLargerSignificand;
 813     uint64_t av, bv;
 814
 815     aIsQuietNaN = float64_is_quiet_nan( a );
 816     aIsSignalingNaN = float64_is_signaling_nan( a );
 817     bIsQuietNaN = float64_is_quiet_nan( b );
 818     bIsSignalingNaN = float64_is_signaling_nan( b );
 819     av = float64_val(a);
 820     bv = float64_val(b);
 821
 822     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 823
 824     if ( STATUS(default_nan_mode) )
 825         return float64_default_nan;
 826
 827     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
 828         aIsLargerSignificand = 0;
 829     } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
 830         aIsLargerSignificand = 1;
 831     } else {
 832         aIsLargerSignificand = (av < bv) ? 1 : 0;
 833     }
 834
 835     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 836                 aIsLargerSignificand)) {
 837         return float64_maybe_silence_nan(b);
 838     } else {
 839         return float64_maybe_silence_nan(a);
 840     }
 841 }
 842
 843 /*----------------------------------------------------------------------------
 844 | Takes three double-precision floating-point values `a', `b' and `c', one of
 845 | which is a NaN, and returns the appropriate NaN result.  If any of  `a',
 846 | `b' or `c' is a signaling NaN, the invalid exception is raised.
 847 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
 848 | obviously c is a NaN, and whether to propagate c or some other NaN is
 849 | implementation defined).
 850 *----------------------------------------------------------------------------*/
 851
 852 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
 853                                          float64 c, flag infzero STATUS_PARAM)
 854 {
 855     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
 856         cIsQuietNaN, cIsSignalingNaN;
 857     int which;
 858
 859     aIsQuietNaN = float64_is_quiet_nan(a);
 860     aIsSignalingNaN = float64_is_signaling_nan(a);
 861     bIsQuietNaN = float64_is_quiet_nan(b);
 862     bIsSignalingNaN = float64_is_signaling_nan(b);
 863     cIsQuietNaN = float64_is_quiet_nan(c);
 864     cIsSignalingNaN = float64_is_signaling_nan(c);
 865
 866     if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
 867         float_raise(float_flag_invalid STATUS_VAR);
 868     }
 869
 870     which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
 871                           bIsQuietNaN, bIsSignalingNaN,
 872                           cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
 873
 874     if (STATUS(default_nan_mode)) {
 875         /* Note that this check is after pickNaNMulAdd so that function
 876          * has an opportunity to set the Invalid flag.
 877          */
 878         return float64_default_nan;
 879     }
 880
 881     switch (which) {
 882     case 0:
 883         return float64_maybe_silence_nan(a);
 884     case 1:
 885         return float64_maybe_silence_nan(b);
 886     case 2:
 887         return float64_maybe_silence_nan(c);
 888     case 3:
 889     default:
 890         return float64_default_nan;
 891     }
 892 }
 893
 894 #ifdef NO_SIGNALING_NANS
 895 int floatx80_is_quiet_nan(floatx80 a_)
 896 {
 897     return floatx80_is_any_nan(a_);
 898 }
 899
 900 int floatx80_is_signaling_nan(floatx80 a_)
 901 {
 902     return 0;
 903 }
 904 #else
 905 /*----------------------------------------------------------------------------
 906 | Returns 1 if the extended double-precision floating-point value `a' is a
 907 | quiet NaN; otherwise returns 0. This slightly differs from the same
 908 | function for other types as floatx80 has an explicit bit.
 909 *----------------------------------------------------------------------------*/
 910
 911 int floatx80_is_quiet_nan( floatx80 a )
 912 {
 913 #if SNAN_BIT_IS_ONE
 914     uint64_t aLow;
 915
 916     aLow = a.low & ~0x4000000000000000ULL;
 917     return ((a.high & 0x7fff) == 0x7fff)
 918         && (aLow << 1)
 919         && (a.low == aLow);
 920 #else
 921     return ( ( a.high & 0x7FFF ) == 0x7FFF )
 922         && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
 923 #endif
 924 }
 925
 926 /*----------------------------------------------------------------------------
 927 | Returns 1 if the extended double-precision floating-point value `a' is a
 928 | signaling NaN; otherwise returns 0. This slightly differs from the same
 929 | function for other types as floatx80 has an explicit bit.
 930 *----------------------------------------------------------------------------*/
 931
 932 int floatx80_is_signaling_nan( floatx80 a )
 933 {
 934 #if SNAN_BIT_IS_ONE
 935     return ((a.high & 0x7fff) == 0x7fff)
 936         && ((a.low << 1) >= 0x8000000000000000ULL);
 937 #else
 938     uint64_t aLow;
 939
 940     aLow = a.low & ~ LIT64( 0x4000000000000000 );
 941     return
 942            ( ( a.high & 0x7FFF ) == 0x7FFF )
 943         && (uint64_t) ( aLow<<1 )
 944         && ( a.low == aLow );
 945 #endif
 946 }
 947 #endif
 948
 949 /*----------------------------------------------------------------------------
 950 | Returns a quiet NaN if the extended double-precision floating point value
 951 | `a' is a signaling NaN; otherwise returns `a'.
 952 *----------------------------------------------------------------------------*/
 953
 954 floatx80 floatx80_maybe_silence_nan( floatx80 a )
 955 {
 956     if (floatx80_is_signaling_nan(a)) {
 957 #if SNAN_BIT_IS_ONE
 958 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
 959         a.low = floatx80_default_nan_low;
 960         a.high = floatx80_default_nan_high;
 961 #  else
 962 #    error Rules for silencing a signaling NaN are target-specific
 963 #  endif
 964 #else
 965         a.low |= LIT64( 0xC000000000000000 );
 966         return a;
 967 #endif
 968     }
 969     return a;
 970 }
 971
 972 /*----------------------------------------------------------------------------
 973 | Returns the result of converting the extended double-precision floating-
 974 | point NaN `a' to the canonical NaN format.  If `a' is a signaling NaN, the
 975 | invalid exception is raised.
 976 *----------------------------------------------------------------------------*/
 977
 978 static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
 979 {
 980     commonNaNT z;
 981
 982     if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
 983     if ( a.low >> 63 ) {
 984         z.sign = a.high >> 15;
 985         z.low = 0;
 986         z.high = a.low << 1;
 987     } else {
 988         z.sign = floatx80_default_nan_high >> 15;
 989         z.low = 0;
 990         z.high = floatx80_default_nan_low << 1;
 991     }
 992     return z;
 993 }
 994
 995 /*----------------------------------------------------------------------------
 996 | Returns the result of converting the canonical NaN `a' to the extended
 997 | double-precision floating-point format.
 998 *----------------------------------------------------------------------------*/
 999
1000 static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
1001 {
1002     floatx80 z;
1003
1004     if ( STATUS(default_nan_mode) ) {
1005         z.low = floatx80_default_nan_low;
1006         z.high = floatx80_default_nan_high;
1007         return z;
1008     }
1009
1010     if (a.high >> 1) {
1011         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
1012         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
1013     } else {
1014         z.low = floatx80_default_nan_low;
1015         z.high = floatx80_default_nan_high;
1016     }
1017
1018     return z;
1019 }
1020
1021 /*----------------------------------------------------------------------------
1022 | Takes two extended double-precision floating-point values `a' and `b', one
1023 | of which is a NaN, and returns the appropriate NaN result.  If either `a' or
1024 | `b' is a signaling NaN, the invalid exception is raised.
1025 *----------------------------------------------------------------------------*/
1026
1027 static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
1028 {
1029     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1030     flag aIsLargerSignificand;
1031
1032     aIsQuietNaN = floatx80_is_quiet_nan( a );
1033     aIsSignalingNaN = floatx80_is_signaling_nan( a );
1034     bIsQuietNaN = floatx80_is_quiet_nan( b );
1035     bIsSignalingNaN = floatx80_is_signaling_nan( b );
1036
1037     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1038
1039     if ( STATUS(default_nan_mode) ) {
1040         a.low = floatx80_default_nan_low;
1041         a.high = floatx80_default_nan_high;
1042         return a;
1043     }
1044
1045     if (a.low < b.low) {
1046         aIsLargerSignificand = 0;
1047     } else if (b.low < a.low) {
1048         aIsLargerSignificand = 1;
1049     } else {
1050         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1051     }
1052
1053     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1054                 aIsLargerSignificand)) {
1055         return floatx80_maybe_silence_nan(b);
1056     } else {
1057         return floatx80_maybe_silence_nan(a);
1058     }
1059 }
1060
1061 #ifdef NO_SIGNALING_NANS
1062 int float128_is_quiet_nan(float128 a_)
1063 {
1064     return float128_is_any_nan(a_);
1065 }
1066
1067 int float128_is_signaling_nan(float128 a_)
1068 {
1069     return 0;
1070 }
1071 #else
1072 /*----------------------------------------------------------------------------
1073 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1074 | NaN; otherwise returns 0.
1075 *----------------------------------------------------------------------------*/
1076
1077 int float128_is_quiet_nan( float128 a )
1078 {
1079 #if SNAN_BIT_IS_ONE
1080     return (((a.high >> 47) & 0xffff) == 0xfffe)
1081         && (a.low || (a.high & 0x00007fffffffffffULL));
1082 #else
1083     return
1084         ((a.high << 1) >= 0xffff000000000000ULL)
1085         && (a.low || (a.high & 0x0000ffffffffffffULL));
1086 #endif
1087 }
1088
1089 /*----------------------------------------------------------------------------
1090 | Returns 1 if the quadruple-precision floating-point value `a' is a
1091 | signaling NaN; otherwise returns 0.
1092 *----------------------------------------------------------------------------*/
1093
1094 int float128_is_signaling_nan( float128 a )
1095 {
1096 #if SNAN_BIT_IS_ONE
1097     return
1098         ((a.high << 1) >= 0xffff000000000000ULL)
1099         && (a.low || (a.high & 0x0000ffffffffffffULL));
1100 #else
1101     return
1102            ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1103         && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1104 #endif
1105 }
1106 #endif
1107
1108 /*----------------------------------------------------------------------------
1109 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1110 | a signaling NaN; otherwise returns `a'.
1111 *----------------------------------------------------------------------------*/
1112
1113 float128 float128_maybe_silence_nan( float128 a )
1114 {
1115     if (float128_is_signaling_nan(a)) {
1116 #if SNAN_BIT_IS_ONE
1117 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1118         a.low = float128_default_nan_low;
1119         a.high = float128_default_nan_high;
1120 #  else
1121 #    error Rules for silencing a signaling NaN are target-specific
1122 #  endif
1123 #else
1124         a.high |= LIT64( 0x0000800000000000 );
1125         return a;
1126 #endif
1127     }
1128     return a;
1129 }
1130
1131 /*----------------------------------------------------------------------------
1132 | Returns the result of converting the quadruple-precision floating-point NaN
1133 | `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
1134 | exception is raised.
1135 *----------------------------------------------------------------------------*/
1136
1137 static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
1138 {
1139     commonNaNT z;
1140
1141     if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
1142     z.sign = a.high>>63;
1143     shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1144     return z;
1145 }
1146
1147 /*----------------------------------------------------------------------------
1148 | Returns the result of converting the canonical NaN `a' to the quadruple-
1149 | precision floating-point format.
1150 *----------------------------------------------------------------------------*/
1151
1152 static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
1153 {
1154     float128 z;
1155
1156     if ( STATUS(default_nan_mode) ) {
1157         z.low = float128_default_nan_low;
1158         z.high = float128_default_nan_high;
1159         return z;
1160     }
1161
1162     shift128Right( a.high, a.low, 16, &z.high, &z.low );
1163     z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1164     return z;
1165 }
1166
1167 /*----------------------------------------------------------------------------
1168 | Takes two quadruple-precision floating-point values `a' and `b', one of
1169 | which is a NaN, and returns the appropriate NaN result.  If either `a' or
1170 | `b' is a signaling NaN, the invalid exception is raised.
1171 *----------------------------------------------------------------------------*/
1172
1173 static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
1174 {
1175     flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1176     flag aIsLargerSignificand;
1177
1178     aIsQuietNaN = float128_is_quiet_nan( a );
1179     aIsSignalingNaN = float128_is_signaling_nan( a );
1180     bIsQuietNaN = float128_is_quiet_nan( b );
1181     bIsSignalingNaN = float128_is_signaling_nan( b );
1182
1183     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1184
1185     if ( STATUS(default_nan_mode) ) {
1186         a.low = float128_default_nan_low;
1187         a.high = float128_default_nan_high;
1188         return a;
1189     }
1190
1191     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1192         aIsLargerSignificand = 0;
1193     } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1194         aIsLargerSignificand = 1;
1195     } else {
1196         aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1197     }
1198
1199     if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1200                 aIsLargerSignificand)) {
1201         return float128_maybe_silence_nan(b);
1202     } else {
1203         return float128_maybe_silence_nan(a);
1204     }
1205 }
1206