hw/s390x/css.c

   1 /*
   2  * Channel subsystem base support.
   3  *
   4  * Copyright 2012 IBM Corp.
   5  * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
   6  *
   7  * This work is licensed under the terms of the GNU GPL, version 2 or (at
   8  * your option) any later version. See the COPYING file in the top-level
   9  * directory.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qapi/error.h"
  14 #include <hw/qdev.h>
  15 #include "qemu/bitops.h"
  16 #include "exec/address-spaces.h"
  17 #include "cpu.h"
  18 #include "hw/s390x/ioinst.h"
  19 #include "hw/s390x/css.h"
  20 #include "trace.h"
  21 #include "hw/s390x/s390_flic.h"
  22
  23 typedef struct CrwContainer {
  24     CRW crw;
  25     QTAILQ_ENTRY(CrwContainer) sibling;
  26 } CrwContainer;
  27
  28 typedef struct ChpInfo {
  29     uint8_t in_use;
  30     uint8_t type;
  31     uint8_t is_virtual;
  32 } ChpInfo;
  33
  34 typedef struct SubchSet {
  35     SubchDev *sch[MAX_SCHID + 1];
  36     unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  37     unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
  38 } SubchSet;
  39
  40 typedef struct CssImage {
  41     SubchSet *sch_set[MAX_SSID + 1];
  42     ChpInfo chpids[MAX_CHPID + 1];
  43 } CssImage;
  44
  45 typedef struct IoAdapter {
  46     uint32_t id;
  47     uint8_t type;
  48     uint8_t isc;
  49     QTAILQ_ENTRY(IoAdapter) sibling;
  50 } IoAdapter;
  51
  52 typedef struct ChannelSubSys {
  53     QTAILQ_HEAD(, CrwContainer) pending_crws;
  54     bool sei_pending;
  55     bool do_crw_mchk;
  56     bool crws_lost;
  57     uint8_t max_cssid;
  58     uint8_t max_ssid;
  59     bool chnmon_active;
  60     uint64_t chnmon_area;
  61     CssImage *css[MAX_CSSID + 1];
  62     uint8_t default_cssid;
  63     QTAILQ_HEAD(, IoAdapter) io_adapters;
  64     QTAILQ_HEAD(, IndAddr) indicator_addresses;
  65 } ChannelSubSys;
  66
  67 static ChannelSubSys channel_subsys = {
  68     .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
  69     .do_crw_mchk = true,
  70     .sei_pending = false,
  71     .do_crw_mchk = true,
  72     .crws_lost = false,
  73     .chnmon_active = false,
  74     .io_adapters = QTAILQ_HEAD_INITIALIZER(channel_subsys.io_adapters),
  75     .indicator_addresses =
  76         QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
  77 };
  78
  79 IndAddr *get_indicator(hwaddr ind_addr, int len)
  80 {
  81     IndAddr *indicator;
  82
  83     QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
  84         if (indicator->addr == ind_addr) {
  85             indicator->refcnt++;
  86             return indicator;
  87         }
  88     }
  89     indicator = g_new0(IndAddr, 1);
  90     indicator->addr = ind_addr;
  91     indicator->len = len;
  92     indicator->refcnt = 1;
  93     QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
  94                        indicator, sibling);
  95     return indicator;
  96 }
  97
  98 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
  99                                bool do_map)
 100 {
 101     S390FLICState *fs = s390_get_flic();
 102     S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
 103
 104     return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
 105 }
 106
 107 void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
 108 {
 109     assert(indicator->refcnt > 0);
 110     indicator->refcnt--;
 111     if (indicator->refcnt > 0) {
 112         return;
 113     }
 114     QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
 115     if (indicator->map) {
 116         s390_io_adapter_map(adapter, indicator->map, false);
 117     }
 118     g_free(indicator);
 119 }
 120
 121 int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
 122 {
 123     int ret;
 124
 125     if (indicator->map) {
 126         return 0; /* already mapped is not an error */
 127     }
 128     indicator->map = indicator->addr;
 129     ret = s390_io_adapter_map(adapter, indicator->map, true);
 130     if ((ret != 0) && (ret != -ENOSYS)) {
 131         goto out_err;
 132     }
 133     return 0;
 134
 135 out_err:
 136     indicator->map = 0;
 137     return ret;
 138 }
 139
 140 int css_create_css_image(uint8_t cssid, bool default_image)
 141 {
 142     trace_css_new_image(cssid, default_image ? "(default)" : "");
 143     if (cssid > MAX_CSSID) {
 144         return -EINVAL;
 145     }
 146     if (channel_subsys.css[cssid]) {
 147         return -EBUSY;
 148     }
 149     channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
 150     if (default_image) {
 151         channel_subsys.default_cssid = cssid;
 152     }
 153     return 0;
 154 }
 155
 156 int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap,
 157                             bool maskable, uint32_t *id)
 158 {
 159     IoAdapter *adapter;
 160     bool found = false;
 161     int ret;
 162     S390FLICState *fs = s390_get_flic();
 163     S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
 164
 165     *id = 0;
 166     QTAILQ_FOREACH(adapter, &channel_subsys.io_adapters, sibling) {
 167         if ((adapter->type == type) && (adapter->isc == isc)) {
 168             *id = adapter->id;
 169             found = true;
 170             ret = 0;
 171             break;
 172         }
 173         if (adapter->id >= *id) {
 174             *id = adapter->id + 1;
 175         }
 176     }
 177     if (found) {
 178         goto out;
 179     }
 180     adapter = g_new0(IoAdapter, 1);
 181     ret = fsc->register_io_adapter(fs, *id, isc, swap, maskable);
 182     if (ret == 0) {
 183         adapter->id = *id;
 184         adapter->isc = isc;
 185         adapter->type = type;
 186         QTAILQ_INSERT_TAIL(&channel_subsys.io_adapters, adapter, sibling);
 187     } else {
 188         g_free(adapter);
 189         fprintf(stderr, "Unexpected error %d when registering adapter %d\n",
 190                 ret, *id);
 191     }
 192 out:
 193     return ret;
 194 }
 195
 196 static void css_clear_io_interrupt(uint16_t subchannel_id,
 197                                    uint16_t subchannel_nr)
 198 {
 199     Error *err = NULL;
 200     static bool no_clear_irq;
 201     S390FLICState *fs = s390_get_flic();
 202     S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
 203     int r;
 204
 205     if (unlikely(no_clear_irq)) {
 206         return;
 207     }
 208     r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
 209     switch (r) {
 210     case 0:
 211         break;
 212     case -ENOSYS:
 213         no_clear_irq = true;
 214         /*
 215         * Ignore unavailability, as the user can't do anything
 216         * about it anyway.
 217         */
 218         break;
 219     default:
 220         error_setg_errno(&err, -r, "unexpected error condition");
 221         error_propagate(&error_abort, err);
 222     }
 223 }
 224
 225 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
 226 {
 227     if (channel_subsys.max_cssid > 0) {
 228         return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
 229     }
 230     return (ssid << 1) | 1;
 231 }
 232
 233 uint16_t css_build_subchannel_id(SubchDev *sch)
 234 {
 235     return css_do_build_subchannel_id(sch->cssid, sch->ssid);
 236 }
 237
 238 static void css_inject_io_interrupt(SubchDev *sch)
 239 {
 240     uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 241
 242     trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 243                            sch->curr_status.pmcw.intparm, isc, "");
 244     s390_io_interrupt(css_build_subchannel_id(sch),
 245                       sch->schid,
 246                       sch->curr_status.pmcw.intparm,
 247                       isc << 27);
 248 }
 249
 250 void css_conditional_io_interrupt(SubchDev *sch)
 251 {
 252     /*
 253      * If the subchannel is not currently status pending, make it pending
 254      * with alert status.
 255      */
 256     if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
 257         uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
 258
 259         trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
 260                                sch->curr_status.pmcw.intparm, isc,
 261                                "(unsolicited)");
 262         sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
 263         sch->curr_status.scsw.ctrl |=
 264             SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 265         /* Inject an I/O interrupt. */
 266         s390_io_interrupt(css_build_subchannel_id(sch),
 267                           sch->schid,
 268                           sch->curr_status.pmcw.intparm,
 269                           isc << 27);
 270     }
 271 }
 272
 273 void css_adapter_interrupt(uint8_t isc)
 274 {
 275     uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
 276
 277     trace_css_adapter_interrupt(isc);
 278     s390_io_interrupt(0, 0, 0, io_int_word);
 279 }
 280
 281 static void sch_handle_clear_func(SubchDev *sch)
 282 {
 283     PMCW *p = &sch->curr_status.pmcw;
 284     SCSW *s = &sch->curr_status.scsw;
 285     int path;
 286
 287     /* Path management: In our simple css, we always choose the only path. */
 288     path = 0x80;
 289
 290     /* Reset values prior to 'issuing the clear signal'. */
 291     p->lpum = 0;
 292     p->pom = 0xff;
 293     s->flags &= ~SCSW_FLAGS_MASK_PNO;
 294
 295     /* We always 'attempt to issue the clear signal', and we always succeed. */
 296     sch->channel_prog = 0x0;
 297     sch->last_cmd_valid = false;
 298     s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
 299     s->ctrl |= SCSW_STCTL_STATUS_PEND;
 300
 301     s->dstat = 0;
 302     s->cstat = 0;
 303     p->lpum = path;
 304
 305 }
 306
 307 static void sch_handle_halt_func(SubchDev *sch)
 308 {
 309
 310     PMCW *p = &sch->curr_status.pmcw;
 311     SCSW *s = &sch->curr_status.scsw;
 312     hwaddr curr_ccw = sch->channel_prog;
 313     int path;
 314
 315     /* Path management: In our simple css, we always choose the only path. */
 316     path = 0x80;
 317
 318     /* We always 'attempt to issue the halt signal', and we always succeed. */
 319     sch->channel_prog = 0x0;
 320     sch->last_cmd_valid = false;
 321     s->ctrl &= ~SCSW_ACTL_HALT_PEND;
 322     s->ctrl |= SCSW_STCTL_STATUS_PEND;
 323
 324     if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
 325         !((s->ctrl & SCSW_ACTL_START_PEND) ||
 326           (s->ctrl & SCSW_ACTL_SUSP))) {
 327         s->dstat = SCSW_DSTAT_DEVICE_END;
 328     }
 329     if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
 330         (s->ctrl & SCSW_ACTL_SUSP)) {
 331         s->cpa = curr_ccw + 8;
 332     }
 333     s->cstat = 0;
 334     p->lpum = path;
 335
 336 }
 337
 338 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
 339 {
 340     int i;
 341
 342     dest->reserved = src->reserved;
 343     dest->cu_type = cpu_to_be16(src->cu_type);
 344     dest->cu_model = src->cu_model;
 345     dest->dev_type = cpu_to_be16(src->dev_type);
 346     dest->dev_model = src->dev_model;
 347     dest->unused = src->unused;
 348     for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
 349         dest->ciw[i].type = src->ciw[i].type;
 350         dest->ciw[i].command = src->ciw[i].command;
 351         dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
 352     }
 353 }
 354
 355 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
 356 {
 357     CCW0 tmp0;
 358     CCW1 tmp1;
 359     CCW1 ret;
 360
 361     if (fmt1) {
 362         cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
 363         ret.cmd_code = tmp1.cmd_code;
 364         ret.flags = tmp1.flags;
 365         ret.count = be16_to_cpu(tmp1.count);
 366         ret.cda = be32_to_cpu(tmp1.cda);
 367     } else {
 368         cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
 369         ret.cmd_code = tmp0.cmd_code;
 370         ret.flags = tmp0.flags;
 371         ret.count = be16_to_cpu(tmp0.count);
 372         ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
 373         if ((ret.cmd_code & 0x0f) == CCW_CMD_TIC) {
 374             ret.cmd_code &= 0x0f;
 375         }
 376     }
 377     return ret;
 378 }
 379
 380 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
 381                              bool suspend_allowed)
 382 {
 383     int ret;
 384     bool check_len;
 385     int len;
 386     CCW1 ccw;
 387
 388     if (!ccw_addr) {
 389         return -EIO;
 390     }
 391
 392     /* Translate everything to format-1 ccws - the information is the same. */
 393     ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
 394
 395     /* Check for invalid command codes. */
 396     if ((ccw.cmd_code & 0x0f) == 0) {
 397         return -EINVAL;
 398     }
 399     if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
 400         ((ccw.cmd_code & 0xf0) != 0)) {
 401         return -EINVAL;
 402     }
 403     if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
 404         (ccw.cmd_code != CCW_CMD_TIC)) {
 405         return -EINVAL;
 406     }
 407
 408     if (ccw.flags & CCW_FLAG_SUSPEND) {
 409         return suspend_allowed ? -EINPROGRESS : -EINVAL;
 410     }
 411
 412     check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
 413
 414     if (!ccw.cda) {
 415         if (sch->ccw_no_data_cnt == 255) {
 416             return -EINVAL;
 417         }
 418         sch->ccw_no_data_cnt++;
 419     }
 420
 421     /* Look at the command. */
 422     switch (ccw.cmd_code) {
 423     case CCW_CMD_NOOP:
 424         /* Nothing to do. */
 425         ret = 0;
 426         break;
 427     case CCW_CMD_BASIC_SENSE:
 428         if (check_len) {
 429             if (ccw.count != sizeof(sch->sense_data)) {
 430                 ret = -EINVAL;
 431                 break;
 432             }
 433         }
 434         len = MIN(ccw.count, sizeof(sch->sense_data));
 435         cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
 436         sch->curr_status.scsw.count = ccw.count - len;
 437         memset(sch->sense_data, 0, sizeof(sch->sense_data));
 438         ret = 0;
 439         break;
 440     case CCW_CMD_SENSE_ID:
 441     {
 442         SenseId sense_id;
 443
 444         copy_sense_id_to_guest(&sense_id, &sch->id);
 445         /* Sense ID information is device specific. */
 446         if (check_len) {
 447             if (ccw.count != sizeof(sense_id)) {
 448                 ret = -EINVAL;
 449                 break;
 450             }
 451         }
 452         len = MIN(ccw.count, sizeof(sense_id));
 453         /*
 454          * Only indicate 0xff in the first sense byte if we actually
 455          * have enough place to store at least bytes 0-3.
 456          */
 457         if (len >= 4) {
 458             sense_id.reserved = 0xff;
 459         } else {
 460             sense_id.reserved = 0;
 461         }
 462         cpu_physical_memory_write(ccw.cda, &sense_id, len);
 463         sch->curr_status.scsw.count = ccw.count - len;
 464         ret = 0;
 465         break;
 466     }
 467     case CCW_CMD_TIC:
 468         if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
 469             ret = -EINVAL;
 470             break;
 471         }
 472         if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
 473             ret = -EINVAL;
 474             break;
 475         }
 476         sch->channel_prog = ccw.cda;
 477         ret = -EAGAIN;
 478         break;
 479     default:
 480         if (sch->ccw_cb) {
 481             /* Handle device specific commands. */
 482             ret = sch->ccw_cb(sch, ccw);
 483         } else {
 484             ret = -ENOSYS;
 485         }
 486         break;
 487     }
 488     sch->last_cmd = ccw;
 489     sch->last_cmd_valid = true;
 490     if (ret == 0) {
 491         if (ccw.flags & CCW_FLAG_CC) {
 492             sch->channel_prog += 8;
 493             ret = -EAGAIN;
 494         }
 495     }
 496
 497     return ret;
 498 }
 499
 500 static void sch_handle_start_func(SubchDev *sch, ORB *orb)
 501 {
 502
 503     PMCW *p = &sch->curr_status.pmcw;
 504     SCSW *s = &sch->curr_status.scsw;
 505     int path;
 506     int ret;
 507     bool suspend_allowed;
 508
 509     /* Path management: In our simple css, we always choose the only path. */
 510     path = 0x80;
 511
 512     if (!(s->ctrl & SCSW_ACTL_SUSP)) {
 513         s->cstat = 0;
 514         s->dstat = 0;
 515         /* Look at the orb and try to execute the channel program. */
 516         assert(orb != NULL); /* resume does not pass an orb */
 517         p->intparm = orb->intparm;
 518         if (!(orb->lpm & path)) {
 519             /* Generate a deferred cc 3 condition. */
 520             s->flags |= SCSW_FLAGS_MASK_CC;
 521             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 522             s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
 523             return;
 524         }
 525         sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
 526         sch->ccw_no_data_cnt = 0;
 527         suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
 528     } else {
 529         s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
 530         /* The channel program had been suspended before. */
 531         suspend_allowed = true;
 532     }
 533     sch->last_cmd_valid = false;
 534     do {
 535         ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
 536         switch (ret) {
 537         case -EAGAIN:
 538             /* ccw chain, continue processing */
 539             break;
 540         case 0:
 541             /* success */
 542             s->ctrl &= ~SCSW_ACTL_START_PEND;
 543             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 544             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 545                     SCSW_STCTL_STATUS_PEND;
 546             s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
 547             s->cpa = sch->channel_prog + 8;
 548             break;
 549         case -ENOSYS:
 550             /* unsupported command, generate unit check (command reject) */
 551             s->ctrl &= ~SCSW_ACTL_START_PEND;
 552             s->dstat = SCSW_DSTAT_UNIT_CHECK;
 553             /* Set sense bit 0 in ecw0. */
 554             sch->sense_data[0] = 0x80;
 555             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 556             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 557                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 558             s->cpa = sch->channel_prog + 8;
 559             break;
 560         case -EFAULT:
 561             /* memory problem, generate channel data check */
 562             s->ctrl &= ~SCSW_ACTL_START_PEND;
 563             s->cstat = SCSW_CSTAT_DATA_CHECK;
 564             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 565             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 566                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 567             s->cpa = sch->channel_prog + 8;
 568             break;
 569         case -EBUSY:
 570             /* subchannel busy, generate deferred cc 1 */
 571             s->flags &= ~SCSW_FLAGS_MASK_CC;
 572             s->flags |= (1 << 8);
 573             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 574             s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 575             break;
 576         case -EINPROGRESS:
 577             /* channel program has been suspended */
 578             s->ctrl &= ~SCSW_ACTL_START_PEND;
 579             s->ctrl |= SCSW_ACTL_SUSP;
 580             break;
 581         default:
 582             /* error, generate channel program check */
 583             s->ctrl &= ~SCSW_ACTL_START_PEND;
 584             s->cstat = SCSW_CSTAT_PROG_CHECK;
 585             s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
 586             s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
 587                     SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
 588             s->cpa = sch->channel_prog + 8;
 589             break;
 590         }
 591     } while (ret == -EAGAIN);
 592
 593 }
 594
 595 /*
 596  * On real machines, this would run asynchronously to the main vcpus.
 597  * We might want to make some parts of the ssch handling (interpreting
 598  * read/writes) asynchronous later on if we start supporting more than
 599  * our current very simple devices.
 600  */
 601 static void do_subchannel_work(SubchDev *sch, ORB *orb)
 602 {
 603
 604     SCSW *s = &sch->curr_status.scsw;
 605
 606     if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
 607         sch_handle_clear_func(sch);
 608     } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
 609         sch_handle_halt_func(sch);
 610     } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
 611         sch_handle_start_func(sch, orb);
 612     } else {
 613         /* Cannot happen. */
 614         return;
 615     }
 616     css_inject_io_interrupt(sch);
 617 }
 618
 619 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
 620 {
 621     int i;
 622
 623     dest->intparm = cpu_to_be32(src->intparm);
 624     dest->flags = cpu_to_be16(src->flags);
 625     dest->devno = cpu_to_be16(src->devno);
 626     dest->lpm = src->lpm;
 627     dest->pnom = src->pnom;
 628     dest->lpum = src->lpum;
 629     dest->pim = src->pim;
 630     dest->mbi = cpu_to_be16(src->mbi);
 631     dest->pom = src->pom;
 632     dest->pam = src->pam;
 633     for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
 634         dest->chpid[i] = src->chpid[i];
 635     }
 636     dest->chars = cpu_to_be32(src->chars);
 637 }
 638
 639 static void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
 640 {
 641     dest->flags = cpu_to_be16(src->flags);
 642     dest->ctrl = cpu_to_be16(src->ctrl);
 643     dest->cpa = cpu_to_be32(src->cpa);
 644     dest->dstat = src->dstat;
 645     dest->cstat = src->cstat;
 646     dest->count = cpu_to_be16(src->count);
 647 }
 648
 649 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
 650 {
 651     int i;
 652
 653     copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
 654     copy_scsw_to_guest(&dest->scsw, &src->scsw);
 655     dest->mba = cpu_to_be64(src->mba);
 656     for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
 657         dest->mda[i] = src->mda[i];
 658     }
 659 }
 660
 661 int css_do_stsch(SubchDev *sch, SCHIB *schib)
 662 {
 663     /* Use current status. */
 664     copy_schib_to_guest(schib, &sch->curr_status);
 665     return 0;
 666 }
 667
 668 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
 669 {
 670     int i;
 671
 672     dest->intparm = be32_to_cpu(src->intparm);
 673     dest->flags = be16_to_cpu(src->flags);
 674     dest->devno = be16_to_cpu(src->devno);
 675     dest->lpm = src->lpm;
 676     dest->pnom = src->pnom;
 677     dest->lpum = src->lpum;
 678     dest->pim = src->pim;
 679     dest->mbi = be16_to_cpu(src->mbi);
 680     dest->pom = src->pom;
 681     dest->pam = src->pam;
 682     for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
 683         dest->chpid[i] = src->chpid[i];
 684     }
 685     dest->chars = be32_to_cpu(src->chars);
 686 }
 687
 688 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
 689 {
 690     dest->flags = be16_to_cpu(src->flags);
 691     dest->ctrl = be16_to_cpu(src->ctrl);
 692     dest->cpa = be32_to_cpu(src->cpa);
 693     dest->dstat = src->dstat;
 694     dest->cstat = src->cstat;
 695     dest->count = be16_to_cpu(src->count);
 696 }
 697
 698 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
 699 {
 700     int i;
 701
 702     copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
 703     copy_scsw_from_guest(&dest->scsw, &src->scsw);
 704     dest->mba = be64_to_cpu(src->mba);
 705     for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
 706         dest->mda[i] = src->mda[i];
 707     }
 708 }
 709
 710 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
 711 {
 712     SCSW *s = &sch->curr_status.scsw;
 713     PMCW *p = &sch->curr_status.pmcw;
 714     uint16_t oldflags;
 715     int ret;
 716     SCHIB schib;
 717
 718     if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
 719         ret = 0;
 720         goto out;
 721     }
 722
 723     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
 724         ret = -EINPROGRESS;
 725         goto out;
 726     }
 727
 728     if (s->ctrl &
 729         (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
 730         ret = -EBUSY;
 731         goto out;
 732     }
 733
 734     copy_schib_from_guest(&schib, orig_schib);
 735     /* Only update the program-modifiable fields. */
 736     p->intparm = schib.pmcw.intparm;
 737     oldflags = p->flags;
 738     p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
 739                   PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
 740                   PMCW_FLAGS_MASK_MP);
 741     p->flags |= schib.pmcw.flags &
 742             (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
 743              PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
 744              PMCW_FLAGS_MASK_MP);
 745     p->lpm = schib.pmcw.lpm;
 746     p->mbi = schib.pmcw.mbi;
 747     p->pom = schib.pmcw.pom;
 748     p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
 749     p->chars |= schib.pmcw.chars &
 750             (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
 751     sch->curr_status.mba = schib.mba;
 752
 753     /* Has the channel been disabled? */
 754     if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
 755         && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
 756         sch->disable_cb(sch);
 757     }
 758
 759     ret = 0;
 760
 761 out:
 762     return ret;
 763 }
 764
 765 int css_do_xsch(SubchDev *sch)
 766 {
 767     SCSW *s = &sch->curr_status.scsw;
 768     PMCW *p = &sch->curr_status.pmcw;
 769     int ret;
 770
 771     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 772         ret = -ENODEV;
 773         goto out;
 774     }
 775
 776     if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
 777         ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
 778         (!(s->ctrl &
 779            (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
 780         (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
 781         ret = -EINPROGRESS;
 782         goto out;
 783     }
 784
 785     if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
 786         ret = -EBUSY;
 787         goto out;
 788     }
 789
 790     /* Cancel the current operation. */
 791     s->ctrl &= ~(SCSW_FCTL_START_FUNC |
 792                  SCSW_ACTL_RESUME_PEND |
 793                  SCSW_ACTL_START_PEND |
 794                  SCSW_ACTL_SUSP);
 795     sch->channel_prog = 0x0;
 796     sch->last_cmd_valid = false;
 797     s->dstat = 0;
 798     s->cstat = 0;
 799     ret = 0;
 800
 801 out:
 802     return ret;
 803 }
 804
 805 int css_do_csch(SubchDev *sch)
 806 {
 807     SCSW *s = &sch->curr_status.scsw;
 808     PMCW *p = &sch->curr_status.pmcw;
 809     int ret;
 810
 811     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 812         ret = -ENODEV;
 813         goto out;
 814     }
 815
 816     /* Trigger the clear function. */
 817     s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
 818     s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
 819
 820     do_subchannel_work(sch, NULL);
 821     ret = 0;
 822
 823 out:
 824     return ret;
 825 }
 826
 827 int css_do_hsch(SubchDev *sch)
 828 {
 829     SCSW *s = &sch->curr_status.scsw;
 830     PMCW *p = &sch->curr_status.pmcw;
 831     int ret;
 832
 833     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 834         ret = -ENODEV;
 835         goto out;
 836     }
 837
 838     if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
 839         (s->ctrl & (SCSW_STCTL_PRIMARY |
 840                     SCSW_STCTL_SECONDARY |
 841                     SCSW_STCTL_ALERT))) {
 842         ret = -EINPROGRESS;
 843         goto out;
 844     }
 845
 846     if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
 847         ret = -EBUSY;
 848         goto out;
 849     }
 850
 851     /* Trigger the halt function. */
 852     s->ctrl |= SCSW_FCTL_HALT_FUNC;
 853     s->ctrl &= ~SCSW_FCTL_START_FUNC;
 854     if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
 855          (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
 856         ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
 857         s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
 858     }
 859     s->ctrl |= SCSW_ACTL_HALT_PEND;
 860
 861     do_subchannel_work(sch, NULL);
 862     ret = 0;
 863
 864 out:
 865     return ret;
 866 }
 867
 868 static void css_update_chnmon(SubchDev *sch)
 869 {
 870     if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
 871         /* Not active. */
 872         return;
 873     }
 874     /* The counter is conveniently located at the beginning of the struct. */
 875     if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
 876         /* Format 1, per-subchannel area. */
 877         uint32_t count;
 878
 879         count = address_space_ldl(&address_space_memory,
 880                                   sch->curr_status.mba,
 881                                   MEMTXATTRS_UNSPECIFIED,
 882                                   NULL);
 883         count++;
 884         address_space_stl(&address_space_memory, sch->curr_status.mba, count,
 885                           MEMTXATTRS_UNSPECIFIED, NULL);
 886     } else {
 887         /* Format 0, global area. */
 888         uint32_t offset;
 889         uint16_t count;
 890
 891         offset = sch->curr_status.pmcw.mbi << 5;
 892         count = address_space_lduw(&address_space_memory,
 893                                    channel_subsys.chnmon_area + offset,
 894                                    MEMTXATTRS_UNSPECIFIED,
 895                                    NULL);
 896         count++;
 897         address_space_stw(&address_space_memory,
 898                           channel_subsys.chnmon_area + offset, count,
 899                           MEMTXATTRS_UNSPECIFIED, NULL);
 900     }
 901 }
 902
 903 int css_do_ssch(SubchDev *sch, ORB *orb)
 904 {
 905     SCSW *s = &sch->curr_status.scsw;
 906     PMCW *p = &sch->curr_status.pmcw;
 907     int ret;
 908
 909     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 910         ret = -ENODEV;
 911         goto out;
 912     }
 913
 914     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
 915         ret = -EINPROGRESS;
 916         goto out;
 917     }
 918
 919     if (s->ctrl & (SCSW_FCTL_START_FUNC |
 920                    SCSW_FCTL_HALT_FUNC |
 921                    SCSW_FCTL_CLEAR_FUNC)) {
 922         ret = -EBUSY;
 923         goto out;
 924     }
 925
 926     /* If monitoring is active, update counter. */
 927     if (channel_subsys.chnmon_active) {
 928         css_update_chnmon(sch);
 929     }
 930     sch->channel_prog = orb->cpa;
 931     /* Trigger the start function. */
 932     s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
 933     s->flags &= ~SCSW_FLAGS_MASK_PNO;
 934
 935     do_subchannel_work(sch, orb);
 936     ret = 0;
 937
 938 out:
 939     return ret;
 940 }
 941
 942 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
 943                               int *irb_len)
 944 {
 945     int i;
 946     uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
 947     uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
 948
 949     copy_scsw_to_guest(&dest->scsw, &src->scsw);
 950
 951     for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
 952         dest->esw[i] = cpu_to_be32(src->esw[i]);
 953     }
 954     for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
 955         dest->ecw[i] = cpu_to_be32(src->ecw[i]);
 956     }
 957     *irb_len = sizeof(*dest) - sizeof(dest->emw);
 958
 959     /* extended measurements enabled? */
 960     if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
 961         !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
 962         !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
 963         return;
 964     }
 965     /* extended measurements pending? */
 966     if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
 967         return;
 968     }
 969     if ((stctl & SCSW_STCTL_PRIMARY) ||
 970         (stctl == SCSW_STCTL_SECONDARY) ||
 971         ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
 972         for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
 973             dest->emw[i] = cpu_to_be32(src->emw[i]);
 974         }
 975     }
 976     *irb_len = sizeof(*dest);
 977 }
 978
 979 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
 980 {
 981     SCSW *s = &sch->curr_status.scsw;
 982     PMCW *p = &sch->curr_status.pmcw;
 983     uint16_t stctl;
 984     IRB irb;
 985
 986     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
 987         return 3;
 988     }
 989
 990     stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
 991
 992     /* Prepare the irb for the guest. */
 993     memset(&irb, 0, sizeof(IRB));
 994
 995     /* Copy scsw from current status. */
 996     memcpy(&irb.scsw, s, sizeof(SCSW));
 997     if (stctl & SCSW_STCTL_STATUS_PEND) {
 998         if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
 999                         SCSW_CSTAT_CHN_CTRL_CHK |
1000                         SCSW_CSTAT_INTF_CTRL_CHK)) {
1001             irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1002             irb.esw[0] = 0x04804000;
1003         } else {
1004             irb.esw[0] = 0x00800000;
1005         }
1006         /* If a unit check is pending, copy sense data. */
1007         if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
1008             (p->chars & PMCW_CHARS_MASK_CSENSE)) {
1009             int i;
1010
1011             irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1012             /* Attention: sense_data is already BE! */
1013             memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1014             for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1015                 irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1016             }
1017             irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1018         }
1019     }
1020     /* Store the irb to the guest. */
1021     copy_irb_to_guest(target_irb, &irb, p, irb_len);
1022
1023     return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1024 }
1025
1026 void css_do_tsch_update_subch(SubchDev *sch)
1027 {
1028     SCSW *s = &sch->curr_status.scsw;
1029     PMCW *p = &sch->curr_status.pmcw;
1030     uint16_t stctl;
1031     uint16_t fctl;
1032     uint16_t actl;
1033
1034     stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1035     fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
1036     actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
1037
1038     /* Clear conditions on subchannel, if applicable. */
1039     if (stctl & SCSW_STCTL_STATUS_PEND) {
1040         s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1041         if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1042             ((fctl & SCSW_FCTL_HALT_FUNC) &&
1043              (actl & SCSW_ACTL_SUSP))) {
1044             s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
1045         }
1046         if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1047             s->flags &= ~SCSW_FLAGS_MASK_PNO;
1048             s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1049                          SCSW_ACTL_START_PEND |
1050                          SCSW_ACTL_HALT_PEND |
1051                          SCSW_ACTL_CLEAR_PEND |
1052                          SCSW_ACTL_SUSP);
1053         } else {
1054             if ((actl & SCSW_ACTL_SUSP) &&
1055                 (fctl & SCSW_FCTL_START_FUNC)) {
1056                 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1057                 if (fctl & SCSW_FCTL_HALT_FUNC) {
1058                     s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1059                                  SCSW_ACTL_START_PEND |
1060                                  SCSW_ACTL_HALT_PEND |
1061                                  SCSW_ACTL_CLEAR_PEND |
1062                                  SCSW_ACTL_SUSP);
1063                 } else {
1064                     s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
1065                 }
1066             }
1067         }
1068         /* Clear pending sense data. */
1069         if (p->chars & PMCW_CHARS_MASK_CSENSE) {
1070             memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1071         }
1072     }
1073 }
1074
1075 static void copy_crw_to_guest(CRW *dest, const CRW *src)
1076 {
1077     dest->flags = cpu_to_be16(src->flags);
1078     dest->rsid = cpu_to_be16(src->rsid);
1079 }
1080
1081 int css_do_stcrw(CRW *crw)
1082 {
1083     CrwContainer *crw_cont;
1084     int ret;
1085
1086     crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1087     if (crw_cont) {
1088         QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1089         copy_crw_to_guest(crw, &crw_cont->crw);
1090         g_free(crw_cont);
1091         ret = 0;
1092     } else {
1093         /* List was empty, turn crw machine checks on again. */
1094         memset(crw, 0, sizeof(*crw));
1095         channel_subsys.do_crw_mchk = true;
1096         ret = 1;
1097     }
1098
1099     return ret;
1100 }
1101
1102 static void copy_crw_from_guest(CRW *dest, const CRW *src)
1103 {
1104     dest->flags = be16_to_cpu(src->flags);
1105     dest->rsid = be16_to_cpu(src->rsid);
1106 }
1107
1108 void css_undo_stcrw(CRW *crw)
1109 {
1110     CrwContainer *crw_cont;
1111
1112     crw_cont = g_try_malloc0(sizeof(CrwContainer));
1113     if (!crw_cont) {
1114         channel_subsys.crws_lost = true;
1115         return;
1116     }
1117     copy_crw_from_guest(&crw_cont->crw, crw);
1118
1119     QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1120 }
1121
1122 int css_do_tpi(IOIntCode *int_code, int lowcore)
1123 {
1124     /* No pending interrupts for !KVM. */
1125     return 0;
1126  }
1127
1128 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1129                          int rfmt, void *buf)
1130 {
1131     int i, desc_size;
1132     uint32_t words[8];
1133     uint32_t chpid_type_word;
1134     CssImage *css;
1135
1136     if (!m && !cssid) {
1137         css = channel_subsys.css[channel_subsys.default_cssid];
1138     } else {
1139         css = channel_subsys.css[cssid];
1140     }
1141     if (!css) {
1142         return 0;
1143     }
1144     desc_size = 0;
1145     for (i = f_chpid; i <= l_chpid; i++) {
1146         if (css->chpids[i].in_use) {
1147             chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1148             if (rfmt == 0) {
1149                 words[0] = cpu_to_be32(chpid_type_word);
1150                 words[1] = 0;
1151                 memcpy(buf + desc_size, words, 8);
1152                 desc_size += 8;
1153             } else if (rfmt == 1) {
1154                 words[0] = cpu_to_be32(chpid_type_word);
1155                 words[1] = 0;
1156                 words[2] = 0;
1157                 words[3] = 0;
1158                 words[4] = 0;
1159                 words[5] = 0;
1160                 words[6] = 0;
1161                 words[7] = 0;
1162                 memcpy(buf + desc_size, words, 32);
1163                 desc_size += 32;
1164             }
1165         }
1166     }
1167     return desc_size;
1168 }
1169
1170 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1171 {
1172     /* dct is currently ignored (not really meaningful for our devices) */
1173     /* TODO: Don't ignore mbk. */
1174     if (update && !channel_subsys.chnmon_active) {
1175         /* Enable measuring. */
1176         channel_subsys.chnmon_area = mbo;
1177         channel_subsys.chnmon_active = true;
1178     }
1179     if (!update && channel_subsys.chnmon_active) {
1180         /* Disable measuring. */
1181         channel_subsys.chnmon_area = 0;
1182         channel_subsys.chnmon_active = false;
1183     }
1184 }
1185
1186 int css_do_rsch(SubchDev *sch)
1187 {
1188     SCSW *s = &sch->curr_status.scsw;
1189     PMCW *p = &sch->curr_status.pmcw;
1190     int ret;
1191
1192     if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
1193         ret = -ENODEV;
1194         goto out;
1195     }
1196
1197     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1198         ret = -EINPROGRESS;
1199         goto out;
1200     }
1201
1202     if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1203         (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1204         (!(s->ctrl & SCSW_ACTL_SUSP))) {
1205         ret = -EINVAL;
1206         goto out;
1207     }
1208
1209     /* If monitoring is active, update counter. */
1210     if (channel_subsys.chnmon_active) {
1211         css_update_chnmon(sch);
1212     }
1213
1214     s->ctrl |= SCSW_ACTL_RESUME_PEND;
1215     do_subchannel_work(sch, NULL);
1216     ret = 0;
1217
1218 out:
1219     return ret;
1220 }
1221
1222 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1223 {
1224     uint8_t real_cssid;
1225
1226     if (cssid > channel_subsys.max_cssid) {
1227         return -EINVAL;
1228     }
1229     if (channel_subsys.max_cssid == 0) {
1230         real_cssid = channel_subsys.default_cssid;
1231     } else {
1232         real_cssid = cssid;
1233     }
1234     if (!channel_subsys.css[real_cssid]) {
1235         return -EINVAL;
1236     }
1237
1238     if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1239         return -ENODEV;
1240     }
1241
1242     if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1243         fprintf(stderr,
1244                 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1245                 real_cssid, chpid);
1246         return -ENODEV;
1247     }
1248
1249     /* We don't really use a channel path, so we're done here. */
1250     css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1251                   channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1252     if (channel_subsys.max_cssid > 0) {
1253         css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1254     }
1255     return 0;
1256 }
1257
1258 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1259 {
1260     SubchSet *set;
1261     uint8_t real_cssid;
1262
1263     real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1264     if (real_cssid > MAX_CSSID || ssid > MAX_SSID ||
1265         !channel_subsys.css[real_cssid] ||
1266         !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1267         return true;
1268     }
1269     set = channel_subsys.css[real_cssid]->sch_set[ssid];
1270     return schid > find_last_bit(set->schids_used,
1271                                  (MAX_SCHID + 1) / sizeof(unsigned long));
1272 }
1273
1274 static int css_add_virtual_chpid(uint8_t cssid, uint8_t chpid, uint8_t type)
1275 {
1276     CssImage *css;
1277
1278     trace_css_chpid_add(cssid, chpid, type);
1279     if (cssid > MAX_CSSID) {
1280         return -EINVAL;
1281     }
1282     css = channel_subsys.css[cssid];
1283     if (!css) {
1284         return -EINVAL;
1285     }
1286     if (css->chpids[chpid].in_use) {
1287         return -EEXIST;
1288     }
1289     css->chpids[chpid].in_use = 1;
1290     css->chpids[chpid].type = type;
1291     css->chpids[chpid].is_virtual = 1;
1292
1293     css_generate_chp_crws(cssid, chpid);
1294
1295     return 0;
1296 }
1297
1298 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1299 {
1300     PMCW *p = &sch->curr_status.pmcw;
1301     SCSW *s = &sch->curr_status.scsw;
1302     int i;
1303     CssImage *css = channel_subsys.css[sch->cssid];
1304
1305     assert(css != NULL);
1306     memset(p, 0, sizeof(PMCW));
1307     p->flags |= PMCW_FLAGS_MASK_DNV;
1308     p->devno = sch->devno;
1309     /* single path */
1310     p->pim = 0x80;
1311     p->pom = 0xff;
1312     p->pam = 0x80;
1313     p->chpid[0] = chpid;
1314     if (!css->chpids[chpid].in_use) {
1315         css_add_virtual_chpid(sch->cssid, chpid, type);
1316     }
1317
1318     memset(s, 0, sizeof(SCSW));
1319     sch->curr_status.mba = 0;
1320     for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1321         sch->curr_status.mda[i] = 0;
1322     }
1323 }
1324
1325 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1326 {
1327     uint8_t real_cssid;
1328
1329     real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1330
1331     if (!channel_subsys.css[real_cssid]) {
1332         return NULL;
1333     }
1334
1335     if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1336         return NULL;
1337     }
1338
1339     return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1340 }
1341
1342 bool css_subch_visible(SubchDev *sch)
1343 {
1344     if (sch->ssid > channel_subsys.max_ssid) {
1345         return false;
1346     }
1347
1348     if (sch->cssid != channel_subsys.default_cssid) {
1349         return (channel_subsys.max_cssid > 0);
1350     }
1351
1352     return true;
1353 }
1354
1355 bool css_present(uint8_t cssid)
1356 {
1357     return (channel_subsys.css[cssid] != NULL);
1358 }
1359
1360 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1361 {
1362     if (!channel_subsys.css[cssid]) {
1363         return false;
1364     }
1365     if (!channel_subsys.css[cssid]->sch_set[ssid]) {
1366         return false;
1367     }
1368
1369     return !!test_bit(devno,
1370                       channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
1371 }
1372
1373 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
1374                       uint16_t devno, SubchDev *sch)
1375 {
1376     CssImage *css;
1377     SubchSet *s_set;
1378
1379     trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
1380                            devno);
1381     if (!channel_subsys.css[cssid]) {
1382         fprintf(stderr,
1383                 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1384                 __func__, cssid, ssid, schid);
1385         return;
1386     }
1387     css = channel_subsys.css[cssid];
1388
1389     if (!css->sch_set[ssid]) {
1390         css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
1391     }
1392     s_set = css->sch_set[ssid];
1393
1394     s_set->sch[schid] = sch;
1395     if (sch) {
1396         set_bit(schid, s_set->schids_used);
1397         set_bit(devno, s_set->devnos_used);
1398     } else {
1399         clear_bit(schid, s_set->schids_used);
1400         clear_bit(devno, s_set->devnos_used);
1401     }
1402 }
1403
1404 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
1405 {
1406     CrwContainer *crw_cont;
1407
1408     trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
1409     /* TODO: Maybe use a static crw pool? */
1410     crw_cont = g_try_malloc0(sizeof(CrwContainer));
1411     if (!crw_cont) {
1412         channel_subsys.crws_lost = true;
1413         return;
1414     }
1415     crw_cont->crw.flags = (rsc << 8) | erc;
1416     if (chain) {
1417         crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
1418     }
1419     crw_cont->crw.rsid = rsid;
1420     if (channel_subsys.crws_lost) {
1421         crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
1422         channel_subsys.crws_lost = false;
1423     }
1424
1425     QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
1426
1427     if (channel_subsys.do_crw_mchk) {
1428         channel_subsys.do_crw_mchk = false;
1429         /* Inject crw pending machine check. */
1430         s390_crw_mchk();
1431     }
1432 }
1433
1434 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
1435                            int hotplugged, int add)
1436 {
1437     uint8_t guest_cssid;
1438     bool chain_crw;
1439
1440     if (add && !hotplugged) {
1441         return;
1442     }
1443     if (channel_subsys.max_cssid == 0) {
1444         /* Default cssid shows up as 0. */
1445         guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
1446     } else {
1447         /* Show real cssid to the guest. */
1448         guest_cssid = cssid;
1449     }
1450     /*
1451      * Only notify for higher subchannel sets/channel subsystems if the
1452      * guest has enabled it.
1453      */
1454     if ((ssid > channel_subsys.max_ssid) ||
1455         (guest_cssid > channel_subsys.max_cssid) ||
1456         ((channel_subsys.max_cssid == 0) &&
1457          (cssid != channel_subsys.default_cssid))) {
1458         return;
1459     }
1460     chain_crw = (channel_subsys.max_ssid > 0) ||
1461             (channel_subsys.max_cssid > 0);
1462     css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
1463     if (chain_crw) {
1464         css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
1465                       (guest_cssid << 8) | (ssid << 4));
1466     }
1467     /* RW_ERC_IPI --> clear pending interrupts */
1468     css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
1469 }
1470
1471 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
1472 {
1473     /* TODO */
1474 }
1475
1476 void css_generate_css_crws(uint8_t cssid)
1477 {
1478     if (!channel_subsys.sei_pending) {
1479         css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
1480     }
1481     channel_subsys.sei_pending = true;
1482 }
1483
1484 void css_clear_sei_pending(void)
1485 {
1486     channel_subsys.sei_pending = false;
1487 }
1488
1489 int css_enable_mcsse(void)
1490 {
1491     trace_css_enable_facility("mcsse");
1492     channel_subsys.max_cssid = MAX_CSSID;
1493     return 0;
1494 }
1495
1496 int css_enable_mss(void)
1497 {
1498     trace_css_enable_facility("mss");
1499     channel_subsys.max_ssid = MAX_SSID;
1500     return 0;
1501 }
1502
1503 void subch_device_save(SubchDev *s, QEMUFile *f)
1504 {
1505     int i;
1506
1507     qemu_put_byte(f, s->cssid);
1508     qemu_put_byte(f, s->ssid);
1509     qemu_put_be16(f, s->schid);
1510     qemu_put_be16(f, s->devno);
1511     qemu_put_byte(f, s->thinint_active);
1512     /* SCHIB */
1513     /*     PMCW */
1514     qemu_put_be32(f, s->curr_status.pmcw.intparm);
1515     qemu_put_be16(f, s->curr_status.pmcw.flags);
1516     qemu_put_be16(f, s->curr_status.pmcw.devno);
1517     qemu_put_byte(f, s->curr_status.pmcw.lpm);
1518     qemu_put_byte(f, s->curr_status.pmcw.pnom);
1519     qemu_put_byte(f, s->curr_status.pmcw.lpum);
1520     qemu_put_byte(f, s->curr_status.pmcw.pim);
1521     qemu_put_be16(f, s->curr_status.pmcw.mbi);
1522     qemu_put_byte(f, s->curr_status.pmcw.pom);
1523     qemu_put_byte(f, s->curr_status.pmcw.pam);
1524     qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8);
1525     qemu_put_be32(f, s->curr_status.pmcw.chars);
1526     /*     SCSW */
1527     qemu_put_be16(f, s->curr_status.scsw.flags);
1528     qemu_put_be16(f, s->curr_status.scsw.ctrl);
1529     qemu_put_be32(f, s->curr_status.scsw.cpa);
1530     qemu_put_byte(f, s->curr_status.scsw.dstat);
1531     qemu_put_byte(f, s->curr_status.scsw.cstat);
1532     qemu_put_be16(f, s->curr_status.scsw.count);
1533     qemu_put_be64(f, s->curr_status.mba);
1534     qemu_put_buffer(f, s->curr_status.mda, 4);
1535     /* end SCHIB */
1536     qemu_put_buffer(f, s->sense_data, 32);
1537     qemu_put_be64(f, s->channel_prog);
1538     /* last cmd */
1539     qemu_put_byte(f, s->last_cmd.cmd_code);
1540     qemu_put_byte(f, s->last_cmd.flags);
1541     qemu_put_be16(f, s->last_cmd.count);
1542     qemu_put_be32(f, s->last_cmd.cda);
1543     qemu_put_byte(f, s->last_cmd_valid);
1544     qemu_put_byte(f, s->id.reserved);
1545     qemu_put_be16(f, s->id.cu_type);
1546     qemu_put_byte(f, s->id.cu_model);
1547     qemu_put_be16(f, s->id.dev_type);
1548     qemu_put_byte(f, s->id.dev_model);
1549     qemu_put_byte(f, s->id.unused);
1550     for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1551         qemu_put_byte(f, s->id.ciw[i].type);
1552         qemu_put_byte(f, s->id.ciw[i].command);
1553         qemu_put_be16(f, s->id.ciw[i].count);
1554     }
1555     qemu_put_byte(f, s->ccw_fmt_1);
1556     qemu_put_byte(f, s->ccw_no_data_cnt);
1557 }
1558
1559 int subch_device_load(SubchDev *s, QEMUFile *f)
1560 {
1561     int i;
1562
1563     s->cssid = qemu_get_byte(f);
1564     s->ssid = qemu_get_byte(f);
1565     s->schid = qemu_get_be16(f);
1566     s->devno = qemu_get_be16(f);
1567     s->thinint_active = qemu_get_byte(f);
1568     /* SCHIB */
1569     /*     PMCW */
1570     s->curr_status.pmcw.intparm = qemu_get_be32(f);
1571     s->curr_status.pmcw.flags = qemu_get_be16(f);
1572     s->curr_status.pmcw.devno = qemu_get_be16(f);
1573     s->curr_status.pmcw.lpm = qemu_get_byte(f);
1574     s->curr_status.pmcw.pnom  = qemu_get_byte(f);
1575     s->curr_status.pmcw.lpum = qemu_get_byte(f);
1576     s->curr_status.pmcw.pim = qemu_get_byte(f);
1577     s->curr_status.pmcw.mbi = qemu_get_be16(f);
1578     s->curr_status.pmcw.pom = qemu_get_byte(f);
1579     s->curr_status.pmcw.pam = qemu_get_byte(f);
1580     qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8);
1581     s->curr_status.pmcw.chars = qemu_get_be32(f);
1582     /*     SCSW */
1583     s->curr_status.scsw.flags = qemu_get_be16(f);
1584     s->curr_status.scsw.ctrl = qemu_get_be16(f);
1585     s->curr_status.scsw.cpa = qemu_get_be32(f);
1586     s->curr_status.scsw.dstat = qemu_get_byte(f);
1587     s->curr_status.scsw.cstat = qemu_get_byte(f);
1588     s->curr_status.scsw.count = qemu_get_be16(f);
1589     s->curr_status.mba = qemu_get_be64(f);
1590     qemu_get_buffer(f, s->curr_status.mda, 4);
1591     /* end SCHIB */
1592     qemu_get_buffer(f, s->sense_data, 32);
1593     s->channel_prog = qemu_get_be64(f);
1594     /* last cmd */
1595     s->last_cmd.cmd_code = qemu_get_byte(f);
1596     s->last_cmd.flags = qemu_get_byte(f);
1597     s->last_cmd.count = qemu_get_be16(f);
1598     s->last_cmd.cda = qemu_get_be32(f);
1599     s->last_cmd_valid = qemu_get_byte(f);
1600     s->id.reserved = qemu_get_byte(f);
1601     s->id.cu_type = qemu_get_be16(f);
1602     s->id.cu_model = qemu_get_byte(f);
1603     s->id.dev_type = qemu_get_be16(f);
1604     s->id.dev_model = qemu_get_byte(f);
1605     s->id.unused = qemu_get_byte(f);
1606     for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1607         s->id.ciw[i].type = qemu_get_byte(f);
1608         s->id.ciw[i].command = qemu_get_byte(f);
1609         s->id.ciw[i].count = qemu_get_be16(f);
1610     }
1611     s->ccw_fmt_1 = qemu_get_byte(f);
1612     s->ccw_no_data_cnt = qemu_get_byte(f);
1613     /*
1614      * Hack alert. We don't migrate the channel subsystem status (no
1615      * device!), but we need to find out if the guest enabled mss/mcss-e.
1616      * If the subchannel is enabled, it certainly was able to access it,
1617      * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
1618      * values. This is not watertight, but better than nothing.
1619      */
1620     if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
1621         if (s->ssid) {
1622             channel_subsys.max_ssid = MAX_SSID;
1623         }
1624         if (s->cssid != channel_subsys.default_cssid) {
1625             channel_subsys.max_cssid = MAX_CSSID;
1626         }
1627     }
1628     return 0;
1629 }
1630
1631 void css_reset_sch(SubchDev *sch)
1632 {
1633     PMCW *p = &sch->curr_status.pmcw;
1634
1635     if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
1636         sch->disable_cb(sch);
1637     }
1638
1639     p->intparm = 0;
1640     p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1641                   PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1642                   PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
1643     p->flags |= PMCW_FLAGS_MASK_DNV;
1644     p->devno = sch->devno;
1645     p->pim = 0x80;
1646     p->lpm = p->pim;
1647     p->pnom = 0;
1648     p->lpum = 0;
1649     p->mbi = 0;
1650     p->pom = 0xff;
1651     p->pam = 0x80;
1652     p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
1653                   PMCW_CHARS_MASK_CSENSE);
1654
1655     memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
1656     sch->curr_status.mba = 0;
1657
1658     sch->channel_prog = 0x0;
1659     sch->last_cmd_valid = false;
1660     sch->thinint_active = false;
1661 }
1662
1663 void css_reset(void)
1664 {
1665     CrwContainer *crw_cont;
1666
1667     /* Clean up monitoring. */
1668     channel_subsys.chnmon_active = false;
1669     channel_subsys.chnmon_area = 0;
1670
1671     /* Clear pending CRWs. */
1672     while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
1673         QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1674         g_free(crw_cont);
1675     }
1676     channel_subsys.sei_pending = false;
1677     channel_subsys.do_crw_mchk = true;
1678     channel_subsys.crws_lost = false;
1679
1680     /* Reset maximum ids. */
1681     channel_subsys.max_cssid = 0;
1682     channel_subsys.max_ssid = 0;
1683 }