1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
6 * KVM x86 specific structures and definitions
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
35 /* Select x86 specific features in <linux/kvm.h> */
36 #define __KVM_HAVE_PIT
37 #define __KVM_HAVE_IOAPIC
38 #define __KVM_HAVE_IRQ_LINE
39 #define __KVM_HAVE_MSI
40 #define __KVM_HAVE_USER_NMI
41 #define __KVM_HAVE_GUEST_DEBUG
42 #define __KVM_HAVE_MSIX
43 #define __KVM_HAVE_MCE
44 #define __KVM_HAVE_PIT_STATE2
45 #define __KVM_HAVE_XEN_HVM
46 #define __KVM_HAVE_VCPU_EVENTS
47 #define __KVM_HAVE_DEBUGREGS
48 #define __KVM_HAVE_XSAVE
49 #define __KVM_HAVE_XCRS
50 #define __KVM_HAVE_READONLY_MEM
52 /* Architectural interrupt line count. */
53 #define KVM_NR_INTERRUPTS 256
55 struct kvm_memory_alias
{
56 __u32 slot
; /* this has a different namespace than memory slots */
58 __u64 guest_phys_addr
;
60 __u64 target_phys_addr
;
63 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
64 struct kvm_pic_state
{
65 __u8 last_irr
; /* edge detection */
66 __u8 irr
; /* interrupt request register */
67 __u8 imr
; /* interrupt mask register */
68 __u8 isr
; /* interrupt service register */
69 __u8 priority_add
; /* highest irq priority */
76 __u8 rotate_on_auto_eoi
;
77 __u8 special_fully_nested_mode
;
78 __u8 init4
; /* true if 4 byte init */
79 __u8 elcr
; /* PIIX edge/trigger selection */
83 #define KVM_IOAPIC_NUM_PINS 24
84 struct kvm_ioapic_state
{
96 __u8 delivery_status
:1;
105 } redirtbl
[KVM_IOAPIC_NUM_PINS
];
108 #define KVM_IRQCHIP_PIC_MASTER 0
109 #define KVM_IRQCHIP_PIC_SLAVE 1
110 #define KVM_IRQCHIP_IOAPIC 2
111 #define KVM_NR_IRQCHIPS 3
113 #define KVM_RUN_X86_SMM (1 << 0)
115 /* for KVM_GET_REGS and KVM_SET_REGS */
117 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
118 __u64 rax
, rbx
, rcx
, rdx
;
119 __u64 rsi
, rdi
, rsp
, rbp
;
120 __u64 r8
, r9
, r10
, r11
;
121 __u64 r12
, r13
, r14
, r15
;
125 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
126 #define KVM_APIC_REG_SIZE 0x400
127 struct kvm_lapic_state
{
128 char regs
[KVM_APIC_REG_SIZE
];
136 __u8 present
, dpl
, db
, s
, l
, g
, avl
;
148 /* for KVM_GET_SREGS and KVM_SET_SREGS */
150 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
151 struct kvm_segment cs
, ds
, es
, fs
, gs
, ss
;
152 struct kvm_segment tr
, ldt
;
153 struct kvm_dtable gdt
, idt
;
154 __u64 cr0
, cr2
, cr3
, cr4
, cr8
;
157 __u64 interrupt_bitmap
[(KVM_NR_INTERRUPTS
+ 63) / 64];
160 /* for KVM_GET_FPU and KVM_SET_FPU */
165 __u8 ftwx
; /* in fxsave format */
175 struct kvm_msr_entry
{
181 /* for KVM_GET_MSRS and KVM_SET_MSRS */
183 __u32 nmsrs
; /* number of msrs in entries */
186 struct kvm_msr_entry entries
[0];
189 /* for KVM_GET_MSR_INDEX_LIST */
190 struct kvm_msr_list
{
191 __u32 nmsrs
; /* number of msrs in entries */
196 struct kvm_cpuid_entry
{
205 /* for KVM_SET_CPUID */
209 struct kvm_cpuid_entry entries
[0];
212 struct kvm_cpuid_entry2
{
223 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
224 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
225 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
227 /* for KVM_SET_CPUID2 */
231 struct kvm_cpuid_entry2 entries
[0];
234 /* for KVM_GET_PIT and KVM_SET_PIT */
235 struct kvm_pit_channel_state
{
236 __u32 count
; /* can be 65536 */
248 __s64 count_load_time
;
251 struct kvm_debug_exit_arch
{
259 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
260 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
261 #define KVM_GUESTDBG_INJECT_DB 0x00040000
262 #define KVM_GUESTDBG_INJECT_BP 0x00080000
264 /* for KVM_SET_GUEST_DEBUG */
265 struct kvm_guest_debug_arch
{
269 struct kvm_pit_state
{
270 struct kvm_pit_channel_state channels
[3];
273 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
275 struct kvm_pit_state2
{
276 struct kvm_pit_channel_state channels
[3];
281 struct kvm_reinject_control
{
286 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
287 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
288 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
289 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
290 #define KVM_VCPUEVENT_VALID_SMM 0x00000008
291 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
293 /* Interrupt shadow states */
294 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
295 #define KVM_X86_SHADOW_INT_STI 0x02
297 /* for KVM_GET/SET_VCPU_EVENTS */
298 struct kvm_vcpu_events
{
327 __u8 exception_has_payload
;
328 __u64 exception_payload
;
331 /* for KVM_GET/SET_DEBUGREGS */
332 struct kvm_debugregs
{
340 /* for KVM_CAP_XSAVE */
345 #define KVM_MAX_XCRS 16
356 struct kvm_xcr xcrs
[KVM_MAX_XCRS
];
360 #define KVM_SYNC_X86_REGS (1UL << 0)
361 #define KVM_SYNC_X86_SREGS (1UL << 1)
362 #define KVM_SYNC_X86_EVENTS (1UL << 2)
364 #define KVM_SYNC_X86_VALID_FIELDS \
365 (KVM_SYNC_X86_REGS| \
366 KVM_SYNC_X86_SREGS| \
369 /* kvm_sync_regs struct included by kvm_run struct */
370 struct kvm_sync_regs
{
371 /* Members of this structure are potentially malicious.
372 * Care must be taken by code reading, esp. interpreting,
373 * data fields from them inside KVM to prevent TOCTOU and
374 * double-fetch types of vulnerabilities.
376 struct kvm_regs regs
;
377 struct kvm_sregs sregs
;
378 struct kvm_vcpu_events events
;
381 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
382 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
383 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
385 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001
386 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002
387 #define KVM_STATE_NESTED_EVMCS 0x00000004
389 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
390 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002
392 struct kvm_vmx_nested_state
{
401 /* for KVM_CAP_NESTED_STATE */
402 struct kvm_nested_state
{
403 /* KVM_STATE_* flags */
406 /* 0 for VMX, 1 for SVM. */
409 /* 128 for SVM, 128 + VMCS size for VMX. */
414 struct kvm_vmx_nested_state vmx
;
416 /* Pad the header to 128 bytes. */
423 #endif /* _ASM_X86_KVM_H */