2 * Generic PCI Express Root Port emulation
4 * Copyright (C) 2017 Red Hat Inc
7 * Marcel Apfelbaum <marcel@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qapi/error.h"
15 #include "hw/pci/msix.h"
16 #include "hw/pci/pcie_port.h"
18 #define TYPE_GEN_PCIE_ROOT_PORT "pcie-root-port"
19 #define GEN_PCIE_ROOT_PORT(obj) \
20 OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT)
22 #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100
23 #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1
25 typedef struct GenPCIERootPort
{
32 /* additional resources to reserve on firmware init */
36 uint64_t pref32_reserve
;
37 uint64_t pref64_reserve
;
40 static uint8_t gen_rp_aer_vector(const PCIDevice
*d
)
45 static int gen_rp_interrupts_init(PCIDevice
*d
, Error
**errp
)
49 rc
= msix_init_exclusive_bar(d
, GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR
, 0, errp
);
52 assert(rc
== -ENOTSUP
);
54 msix_vector_use(d
, 0);
60 static void gen_rp_interrupts_uninit(PCIDevice
*d
)
62 msix_uninit_exclusive_bar(d
);
65 static bool gen_rp_test_migrate_msix(void *opaque
, int version_id
)
67 GenPCIERootPort
*rp
= opaque
;
69 return rp
->migrate_msix
;
72 static void gen_rp_realize(DeviceState
*dev
, Error
**errp
)
74 PCIDevice
*d
= PCI_DEVICE(dev
);
75 GenPCIERootPort
*grp
= GEN_PCIE_ROOT_PORT(d
);
76 PCIERootPortClass
*rpc
= PCIE_ROOT_PORT_GET_CLASS(d
);
78 rpc
->parent_realize(dev
, errp
);
80 int rc
= pci_bridge_qemu_reserve_cap_init(d
, 0, grp
->bus_reserve
,
81 grp
->io_reserve
, grp
->mem_reserve
, grp
->pref32_reserve
,
82 grp
->pref64_reserve
, errp
);
85 rpc
->parent_class
.exit(d
);
89 if (!grp
->io_reserve
) {
90 pci_word_test_and_clear_mask(d
->wmask
+ PCI_COMMAND
,
92 d
->wmask
[PCI_IO_BASE
] = 0;
93 d
->wmask
[PCI_IO_LIMIT
] = 0;
97 static const VMStateDescription vmstate_rp_dev
= {
98 .name
= "pcie-root-port",
100 .minimum_version_id
= 1,
101 .post_load
= pcie_cap_slot_post_load
,
102 .fields
= (VMStateField
[]) {
103 VMSTATE_PCI_DEVICE(parent_obj
.parent_obj
.parent_obj
, PCIESlot
),
104 VMSTATE_STRUCT(parent_obj
.parent_obj
.parent_obj
.exp
.aer_log
,
105 PCIESlot
, 0, vmstate_pcie_aer_log
, PCIEAERLog
),
106 VMSTATE_MSIX_TEST(parent_obj
.parent_obj
.parent_obj
.parent_obj
,
108 gen_rp_test_migrate_msix
),
109 VMSTATE_END_OF_LIST()
113 static Property gen_rp_props
[] = {
114 DEFINE_PROP_BOOL("x-migrate-msix", GenPCIERootPort
, migrate_msix
, true),
115 DEFINE_PROP_UINT32("bus-reserve", GenPCIERootPort
, bus_reserve
, -1),
116 DEFINE_PROP_SIZE("io-reserve", GenPCIERootPort
, io_reserve
, -1),
117 DEFINE_PROP_SIZE("mem-reserve", GenPCIERootPort
, mem_reserve
, -1),
118 DEFINE_PROP_SIZE("pref32-reserve", GenPCIERootPort
, pref32_reserve
, -1),
119 DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort
, pref64_reserve
, -1),
120 DEFINE_PROP_END_OF_LIST()
123 static void gen_rp_dev_class_init(ObjectClass
*klass
, void *data
)
125 DeviceClass
*dc
= DEVICE_CLASS(klass
);
126 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
127 PCIERootPortClass
*rpc
= PCIE_ROOT_PORT_CLASS(klass
);
129 k
->vendor_id
= PCI_VENDOR_ID_REDHAT
;
130 k
->device_id
= PCI_DEVICE_ID_REDHAT_PCIE_RP
;
131 dc
->desc
= "PCI Express Root Port";
132 dc
->vmsd
= &vmstate_rp_dev
;
133 dc
->props
= gen_rp_props
;
135 rpc
->parent_realize
= dc
->realize
;
136 dc
->realize
= gen_rp_realize
;
138 rpc
->aer_vector
= gen_rp_aer_vector
;
139 rpc
->interrupts_init
= gen_rp_interrupts_init
;
140 rpc
->interrupts_uninit
= gen_rp_interrupts_uninit
;
141 rpc
->aer_offset
= GEN_PCIE_ROOT_PORT_AER_OFFSET
;
144 static const TypeInfo gen_rp_dev_info
= {
145 .name
= TYPE_GEN_PCIE_ROOT_PORT
,
146 .parent
= TYPE_PCIE_ROOT_PORT
,
147 .instance_size
= sizeof(GenPCIERootPort
),
148 .class_init
= gen_rp_dev_class_init
,
151 static void gen_rp_register_types(void)
153 type_register_static(&gen_rp_dev_info
);
155 type_init(gen_rp_register_types
)