s390-ccw-virtio: allow for systems larger that 7.999TB
[qemu.git] / hw / pci-bridge / dec.c
blob84492d5e5f94bd27ff0e97104dac03d40328df17
1 /*
2 * QEMU DEC 21154 PCI bridge
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include "qemu/osdep.h"
27 #include "dec.h"
28 #include "hw/sysbus.h"
29 #include "hw/pci/pci.h"
30 #include "hw/pci/pci_host.h"
31 #include "hw/pci/pci_bridge.h"
32 #include "hw/pci/pci_bus.h"
34 /* debug DEC */
35 //#define DEBUG_DEC
37 #ifdef DEBUG_DEC
38 #define DEC_DPRINTF(fmt, ...) \
39 do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0)
40 #else
41 #define DEC_DPRINTF(fmt, ...)
42 #endif
44 #define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)
46 typedef struct DECState {
47 PCIHostState parent_obj;
48 } DECState;
50 static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
52 return irq_num;
55 static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
57 pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
60 static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
62 DeviceClass *dc = DEVICE_CLASS(klass);
63 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
65 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
66 k->realize = dec_pci_bridge_realize;
67 k->exit = pci_bridge_exitfn;
68 k->vendor_id = PCI_VENDOR_ID_DEC;
69 k->device_id = PCI_DEVICE_ID_DEC_21154;
70 k->config_write = pci_bridge_write_config;
71 k->is_bridge = 1;
72 dc->desc = "DEC 21154 PCI-PCI bridge";
73 dc->reset = pci_bridge_reset;
74 dc->vmsd = &vmstate_pci_device;
77 static const TypeInfo dec_21154_pci_bridge_info = {
78 .name = "dec-21154-p2p-bridge",
79 .parent = TYPE_PCI_BRIDGE,
80 .instance_size = sizeof(PCIBridge),
81 .class_init = dec_21154_pci_bridge_class_init,
82 .interfaces = (InterfaceInfo[]) {
83 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
84 { },
88 PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
90 PCIDevice *dev;
91 PCIBridge *br;
93 dev = pci_create_multifunction(parent_bus, devfn, false,
94 "dec-21154-p2p-bridge");
95 br = PCI_BRIDGE(dev);
96 pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
97 qdev_init_nofail(&dev->qdev);
98 return pci_bridge_get_sec_bus(br);
101 static int pci_dec_21154_device_init(SysBusDevice *dev)
103 PCIHostState *phb;
105 phb = PCI_HOST_BRIDGE(dev);
107 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
108 dev, "pci-conf-idx", 0x1000);
109 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
110 dev, "pci-data-idx", 0x1000);
111 sysbus_init_mmio(dev, &phb->conf_mem);
112 sysbus_init_mmio(dev, &phb->data_mem);
113 return 0;
116 static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
118 /* PCI2PCI bridge same values as PearPC - check this */
121 static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
123 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
124 DeviceClass *dc = DEVICE_CLASS(klass);
126 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
127 k->realize = dec_21154_pci_host_realize;
128 k->vendor_id = PCI_VENDOR_ID_DEC;
129 k->device_id = PCI_DEVICE_ID_DEC_21154;
130 k->revision = 0x02;
131 k->class_id = PCI_CLASS_BRIDGE_PCI;
132 k->is_bridge = 1;
134 * PCI-facing part of the host bridge, not usable without the
135 * host-facing part, which can't be device_add'ed, yet.
137 dc->user_creatable = false;
140 static const TypeInfo dec_21154_pci_host_info = {
141 .name = "dec-21154",
142 .parent = TYPE_PCI_DEVICE,
143 .instance_size = sizeof(PCIDevice),
144 .class_init = dec_21154_pci_host_class_init,
145 .interfaces = (InterfaceInfo[]) {
146 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
147 { },
151 static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
153 SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
155 sdc->init = pci_dec_21154_device_init;
158 static const TypeInfo pci_dec_21154_device_info = {
159 .name = TYPE_DEC_21154,
160 .parent = TYPE_PCI_HOST_BRIDGE,
161 .instance_size = sizeof(DECState),
162 .class_init = pci_dec_21154_device_class_init,
165 static void dec_register_types(void)
167 type_register_static(&pci_dec_21154_device_info);
168 type_register_static(&dec_21154_pci_host_info);
169 type_register_static(&dec_21154_pci_bridge_info);
172 type_init(dec_register_types)