2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
30 #ifndef CONFIG_DEBUG_TCG
31 /* define it to suppress various consistency checks (faster) */
47 #include "qemu-common.h"
48 #include "cache-utils.h"
49 #include "host-utils.h"
51 /* Note: the long term plan is to reduce the dependancies on the QEMU
52 CPU definitions. Currently they are used for qemu_ld/st
54 #define NO_CPU_IO_DEFS
61 #if defined(CONFIG_USE_GUEST_BASE) && !defined(TCG_TARGET_HAS_GUEST_BASE)
62 #error GUEST_BASE not supported on this host.
65 static void patch_reloc(uint8_t *code_ptr
, int type
,
66 tcg_target_long value
, tcg_target_long addend
);
68 static TCGOpDef tcg_op_defs
[] = {
69 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
70 #define DEF2(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags, 0 },
76 static TCGRegSet tcg_target_available_regs
[2];
77 static TCGRegSet tcg_target_call_clobber_regs
;
79 /* XXX: move that inside the context */
80 uint16_t *gen_opc_ptr
;
81 TCGArg
*gen_opparam_ptr
;
83 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
88 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
90 *(uint16_t *)s
->code_ptr
= v
;
94 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
96 *(uint32_t *)s
->code_ptr
= v
;
100 /* label relocation processing */
102 void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
103 int label_index
, long addend
)
108 l
= &s
->labels
[label_index
];
110 /* FIXME: This may break relocations on RISC targets that
111 modify instruction fields in place. The caller may not have
112 written the initial value. */
113 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
115 /* add a new relocation entry */
116 r
= tcg_malloc(sizeof(TCGRelocation
));
120 r
->next
= l
->u
.first_reloc
;
121 l
->u
.first_reloc
= r
;
125 static void tcg_out_label(TCGContext
*s
, int label_index
,
126 tcg_target_long value
)
131 l
= &s
->labels
[label_index
];
134 r
= l
->u
.first_reloc
;
136 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
143 int gen_new_label(void)
145 TCGContext
*s
= &tcg_ctx
;
149 if (s
->nb_labels
>= TCG_MAX_LABELS
)
151 idx
= s
->nb_labels
++;
154 l
->u
.first_reloc
= NULL
;
158 #include "tcg-target.c"
160 /* pool based memory allocation */
161 void *tcg_malloc_internal(TCGContext
*s
, int size
)
166 if (size
> TCG_POOL_CHUNK_SIZE
) {
167 /* big malloc: insert a new pool (XXX: could optimize) */
168 p
= qemu_malloc(sizeof(TCGPool
) + size
);
171 s
->pool_current
->next
= p
;
174 p
->next
= s
->pool_current
;
184 pool_size
= TCG_POOL_CHUNK_SIZE
;
185 p
= qemu_malloc(sizeof(TCGPool
) + pool_size
);
189 s
->pool_current
->next
= p
;
198 s
->pool_cur
= p
->data
+ size
;
199 s
->pool_end
= p
->data
+ p
->size
;
203 void tcg_pool_reset(TCGContext
*s
)
205 s
->pool_cur
= s
->pool_end
= NULL
;
206 s
->pool_current
= NULL
;
209 void tcg_context_init(TCGContext
*s
)
211 int op
, total_args
, n
;
213 TCGArgConstraint
*args_ct
;
216 memset(s
, 0, sizeof(*s
));
217 s
->temps
= s
->static_temps
;
220 /* Count total number of arguments and allocate the corresponding
223 for(op
= 0; op
< NB_OPS
; op
++) {
224 def
= &tcg_op_defs
[op
];
225 n
= def
->nb_iargs
+ def
->nb_oargs
;
229 args_ct
= qemu_malloc(sizeof(TCGArgConstraint
) * total_args
);
230 sorted_args
= qemu_malloc(sizeof(int) * total_args
);
232 for(op
= 0; op
< NB_OPS
; op
++) {
233 def
= &tcg_op_defs
[op
];
234 def
->args_ct
= args_ct
;
235 def
->sorted_args
= sorted_args
;
236 n
= def
->nb_iargs
+ def
->nb_oargs
;
243 /* init global prologue and epilogue */
244 s
->code_buf
= code_gen_prologue
;
245 s
->code_ptr
= s
->code_buf
;
246 tcg_target_qemu_prologue(s
);
247 flush_icache_range((unsigned long)s
->code_buf
,
248 (unsigned long)s
->code_ptr
);
251 void tcg_set_frame(TCGContext
*s
, int reg
,
252 tcg_target_long start
, tcg_target_long size
)
254 s
->frame_start
= start
;
255 s
->frame_end
= start
+ size
;
259 void tcg_func_start(TCGContext
*s
)
263 s
->nb_temps
= s
->nb_globals
;
264 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
265 s
->first_free_temp
[i
] = -1;
266 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
268 s
->current_frame_offset
= s
->frame_start
;
270 gen_opc_ptr
= gen_opc_buf
;
271 gen_opparam_ptr
= gen_opparam_buf
;
274 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
276 if (n
> TCG_MAX_TEMPS
)
280 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
283 TCGContext
*s
= &tcg_ctx
;
287 #if TCG_TARGET_REG_BITS == 32
288 if (type
!= TCG_TYPE_I32
)
291 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
294 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
295 ts
= &s
->temps
[s
->nb_globals
];
296 ts
->base_type
= type
;
302 tcg_regset_set_reg(s
->reserved_regs
, reg
);
306 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
310 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
311 return MAKE_TCGV_I32(idx
);
314 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
318 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
319 return MAKE_TCGV_I64(idx
);
322 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
323 tcg_target_long offset
,
326 TCGContext
*s
= &tcg_ctx
;
331 #if TCG_TARGET_REG_BITS == 32
332 if (type
== TCG_TYPE_I64
) {
334 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
335 ts
= &s
->temps
[s
->nb_globals
];
336 ts
->base_type
= type
;
337 ts
->type
= TCG_TYPE_I32
;
339 ts
->mem_allocated
= 1;
341 #ifdef TCG_TARGET_WORDS_BIGENDIAN
342 ts
->mem_offset
= offset
+ 4;
344 ts
->mem_offset
= offset
;
346 pstrcpy(buf
, sizeof(buf
), name
);
347 pstrcat(buf
, sizeof(buf
), "_0");
348 ts
->name
= strdup(buf
);
351 ts
->base_type
= type
;
352 ts
->type
= TCG_TYPE_I32
;
354 ts
->mem_allocated
= 1;
356 #ifdef TCG_TARGET_WORDS_BIGENDIAN
357 ts
->mem_offset
= offset
;
359 ts
->mem_offset
= offset
+ 4;
361 pstrcpy(buf
, sizeof(buf
), name
);
362 pstrcat(buf
, sizeof(buf
), "_1");
363 ts
->name
= strdup(buf
);
369 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
370 ts
= &s
->temps
[s
->nb_globals
];
371 ts
->base_type
= type
;
374 ts
->mem_allocated
= 1;
376 ts
->mem_offset
= offset
;
383 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
388 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
389 return MAKE_TCGV_I32(idx
);
392 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
397 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
398 return MAKE_TCGV_I64(idx
);
401 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
403 TCGContext
*s
= &tcg_ctx
;
410 idx
= s
->first_free_temp
[k
];
412 /* There is already an available temp with the
415 s
->first_free_temp
[k
] = ts
->next_free_temp
;
416 ts
->temp_allocated
= 1;
417 assert(ts
->temp_local
== temp_local
);
420 #if TCG_TARGET_REG_BITS == 32
421 if (type
== TCG_TYPE_I64
) {
422 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
423 ts
= &s
->temps
[s
->nb_temps
];
424 ts
->base_type
= type
;
425 ts
->type
= TCG_TYPE_I32
;
426 ts
->temp_allocated
= 1;
427 ts
->temp_local
= temp_local
;
430 ts
->base_type
= TCG_TYPE_I32
;
431 ts
->type
= TCG_TYPE_I32
;
432 ts
->temp_allocated
= 1;
433 ts
->temp_local
= temp_local
;
439 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
440 ts
= &s
->temps
[s
->nb_temps
];
441 ts
->base_type
= type
;
443 ts
->temp_allocated
= 1;
444 ts
->temp_local
= temp_local
;
452 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
456 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
457 return MAKE_TCGV_I32(idx
);
460 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
464 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
465 return MAKE_TCGV_I64(idx
);
468 static inline void tcg_temp_free_internal(int idx
)
470 TCGContext
*s
= &tcg_ctx
;
474 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
476 assert(ts
->temp_allocated
!= 0);
477 ts
->temp_allocated
= 0;
481 ts
->next_free_temp
= s
->first_free_temp
[k
];
482 s
->first_free_temp
[k
] = idx
;
485 void tcg_temp_free_i32(TCGv_i32 arg
)
487 tcg_temp_free_internal(GET_TCGV_I32(arg
));
490 void tcg_temp_free_i64(TCGv_i64 arg
)
492 tcg_temp_free_internal(GET_TCGV_I64(arg
));
495 TCGv_i32
tcg_const_i32(int32_t val
)
498 t0
= tcg_temp_new_i32();
499 tcg_gen_movi_i32(t0
, val
);
503 TCGv_i64
tcg_const_i64(int64_t val
)
506 t0
= tcg_temp_new_i64();
507 tcg_gen_movi_i64(t0
, val
);
511 TCGv_i32
tcg_const_local_i32(int32_t val
)
514 t0
= tcg_temp_local_new_i32();
515 tcg_gen_movi_i32(t0
, val
);
519 TCGv_i64
tcg_const_local_i64(int64_t val
)
522 t0
= tcg_temp_local_new_i64();
523 tcg_gen_movi_i64(t0
, val
);
527 void tcg_register_helper(void *func
, const char *name
)
529 TCGContext
*s
= &tcg_ctx
;
531 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
532 n
= s
->allocated_helpers
;
538 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
539 s
->allocated_helpers
= n
;
541 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
542 s
->helpers
[s
->nb_helpers
].name
= name
;
546 /* Note: we convert the 64 bit args to 32 bit and do some alignment
547 and endian swap. Maybe it would be better to do the alignment
548 and endian swap in tcg_reg_alloc_call(). */
549 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
550 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
557 *gen_opc_ptr
++ = INDEX_op_call
;
558 nparam
= gen_opparam_ptr
++;
559 call_type
= (flags
& TCG_CALL_TYPE_MASK
);
560 if (ret
!= TCG_CALL_DUMMY_ARG
) {
561 #if TCG_TARGET_REG_BITS < 64
563 #ifdef TCG_TARGET_WORDS_BIGENDIAN
564 *gen_opparam_ptr
++ = ret
+ 1;
565 *gen_opparam_ptr
++ = ret
;
567 *gen_opparam_ptr
++ = ret
;
568 *gen_opparam_ptr
++ = ret
+ 1;
574 *gen_opparam_ptr
++ = ret
;
581 for (i
= 0; i
< nargs
; i
++) {
582 #if TCG_TARGET_REG_BITS < 64
583 if (sizemask
& (2 << i
)) {
584 #ifdef TCG_TARGET_I386
585 /* REGPARM case: if the third parameter is 64 bit, it is
586 allocated on the stack */
587 if (i
== 2 && call_type
== TCG_CALL_TYPE_REGPARM
) {
588 call_type
= TCG_CALL_TYPE_REGPARM_2
;
589 flags
= (flags
& ~TCG_CALL_TYPE_MASK
) | call_type
;
592 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
593 /* some targets want aligned 64 bit args */
595 *gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
599 #ifdef TCG_TARGET_WORDS_BIGENDIAN
600 *gen_opparam_ptr
++ = args
[i
] + 1;
601 *gen_opparam_ptr
++ = args
[i
];
603 *gen_opparam_ptr
++ = args
[i
];
604 *gen_opparam_ptr
++ = args
[i
] + 1;
610 *gen_opparam_ptr
++ = args
[i
];
614 *gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
616 *gen_opparam_ptr
++ = flags
;
618 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
620 /* total parameters, needed to go backward in the instruction stream */
621 *gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
624 #if TCG_TARGET_REG_BITS == 32
625 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
626 int c
, int right
, int arith
)
629 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
630 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
631 } else if (c
>= 32) {
635 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
636 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
638 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
639 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
642 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
643 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
648 t0
= tcg_temp_new_i32();
649 t1
= tcg_temp_new_i32();
651 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
653 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
655 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
656 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
657 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
658 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
660 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
661 /* Note: ret can be the same as arg1, so we use t1 */
662 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
663 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
664 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
665 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
667 tcg_temp_free_i32(t0
);
668 tcg_temp_free_i32(t1
);
673 static void tcg_reg_alloc_start(TCGContext
*s
)
677 for(i
= 0; i
< s
->nb_globals
; i
++) {
680 ts
->val_type
= TEMP_VAL_REG
;
682 ts
->val_type
= TEMP_VAL_MEM
;
685 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
687 ts
->val_type
= TEMP_VAL_DEAD
;
688 ts
->mem_allocated
= 0;
691 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
692 s
->reg_to_temp
[i
] = -1;
696 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
702 if (idx
< s
->nb_globals
) {
703 pstrcpy(buf
, buf_size
, ts
->name
);
706 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
708 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
713 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
715 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
718 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
720 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
723 static int helper_cmp(const void *p1
, const void *p2
)
725 const TCGHelperInfo
*th1
= p1
;
726 const TCGHelperInfo
*th2
= p2
;
727 if (th1
->func
< th2
->func
)
729 else if (th1
->func
== th2
->func
)
735 /* find helper definition (Note: A hash table would be better) */
736 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
742 if (unlikely(!s
->helpers_sorted
)) {
743 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
745 s
->helpers_sorted
= 1;
750 m_max
= s
->nb_helpers
- 1;
751 while (m_min
<= m_max
) {
752 m
= (m_min
+ m_max
) >> 1;
766 static const char * const cond_name
[] =
768 [TCG_COND_EQ
] = "eq",
769 [TCG_COND_NE
] = "ne",
770 [TCG_COND_LT
] = "lt",
771 [TCG_COND_GE
] = "ge",
772 [TCG_COND_LE
] = "le",
773 [TCG_COND_GT
] = "gt",
774 [TCG_COND_LTU
] = "ltu",
775 [TCG_COND_GEU
] = "geu",
776 [TCG_COND_LEU
] = "leu",
777 [TCG_COND_GTU
] = "gtu"
780 void tcg_dump_ops(TCGContext
*s
, FILE *outfile
)
782 const uint16_t *opc_ptr
;
785 int c
, i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
790 opc_ptr
= gen_opc_buf
;
791 args
= gen_opparam_buf
;
792 while (opc_ptr
< gen_opc_ptr
) {
794 def
= &tcg_op_defs
[c
];
795 if (c
== INDEX_op_debug_insn_start
) {
797 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
798 pc
= ((uint64_t)args
[1] << 32) | args
[0];
803 fprintf(outfile
, "\n");
804 fprintf(outfile
, " ---- 0x%" PRIx64
, pc
);
806 nb_oargs
= def
->nb_oargs
;
807 nb_iargs
= def
->nb_iargs
;
808 nb_cargs
= def
->nb_cargs
;
809 } else if (c
== INDEX_op_call
) {
812 /* variable number of arguments */
814 nb_oargs
= arg
>> 16;
815 nb_iargs
= arg
& 0xffff;
816 nb_cargs
= def
->nb_cargs
;
818 fprintf(outfile
, " %s ", def
->name
);
821 fprintf(outfile
, "%s",
822 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[nb_oargs
+ nb_iargs
- 1]));
824 fprintf(outfile
, ",$0x%" TCG_PRIlx
,
825 args
[nb_oargs
+ nb_iargs
]);
827 fprintf(outfile
, ",$%d", nb_oargs
);
828 for(i
= 0; i
< nb_oargs
; i
++) {
829 fprintf(outfile
, ",");
830 fprintf(outfile
, "%s",
831 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[i
]));
833 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
834 fprintf(outfile
, ",");
835 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
836 fprintf(outfile
, "<dummy>");
838 fprintf(outfile
, "%s",
839 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[nb_oargs
+ i
]));
842 } else if (c
== INDEX_op_movi_i32
843 #if TCG_TARGET_REG_BITS == 64
844 || c
== INDEX_op_movi_i64
847 tcg_target_ulong val
;
850 nb_oargs
= def
->nb_oargs
;
851 nb_iargs
= def
->nb_iargs
;
852 nb_cargs
= def
->nb_cargs
;
853 fprintf(outfile
, " %s %s,$", def
->name
,
854 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
856 th
= tcg_find_helper(s
, val
);
858 fprintf(outfile
, "%s", th
->name
);
860 if (c
== INDEX_op_movi_i32
)
861 fprintf(outfile
, "0x%x", (uint32_t)val
);
863 fprintf(outfile
, "0x%" PRIx64
, (uint64_t)val
);
866 fprintf(outfile
, " %s ", def
->name
);
867 if (c
== INDEX_op_nopn
) {
868 /* variable number of arguments */
873 nb_oargs
= def
->nb_oargs
;
874 nb_iargs
= def
->nb_iargs
;
875 nb_cargs
= def
->nb_cargs
;
879 for(i
= 0; i
< nb_oargs
; i
++) {
881 fprintf(outfile
, ",");
882 fprintf(outfile
, "%s",
883 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[k
++]));
885 for(i
= 0; i
< nb_iargs
; i
++) {
887 fprintf(outfile
, ",");
888 fprintf(outfile
, "%s",
889 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[k
++]));
891 if (c
== INDEX_op_brcond_i32
892 #if TCG_TARGET_REG_BITS == 32
893 || c
== INDEX_op_brcond2_i32
894 #elif TCG_TARGET_REG_BITS == 64
895 || c
== INDEX_op_brcond_i64
898 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]])
899 fprintf(outfile
, ",%s", cond_name
[args
[k
++]]);
901 fprintf(outfile
, ",$0x%" TCG_PRIlx
, args
[k
++]);
906 for(; i
< nb_cargs
; i
++) {
908 fprintf(outfile
, ",");
910 fprintf(outfile
, "$0x%" TCG_PRIlx
, arg
);
913 fprintf(outfile
, "\n");
914 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
918 /* we give more priority to constraints with less registers */
919 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
921 const TCGArgConstraint
*arg_ct
;
924 arg_ct
= &def
->args_ct
[k
];
925 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
926 /* an alias is equivalent to a single register */
929 if (!(arg_ct
->ct
& TCG_CT_REG
))
932 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
933 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
937 return TCG_TARGET_NB_REGS
- n
+ 1;
940 /* sort from highest priority to lowest */
941 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
943 int i
, j
, p1
, p2
, tmp
;
945 for(i
= 0; i
< n
; i
++)
946 def
->sorted_args
[start
+ i
] = start
+ i
;
949 for(i
= 0; i
< n
- 1; i
++) {
950 for(j
= i
+ 1; j
< n
; j
++) {
951 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
952 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
954 tmp
= def
->sorted_args
[start
+ i
];
955 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
956 def
->sorted_args
[start
+ j
] = tmp
;
962 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
973 assert(op
>= 0 && op
< NB_OPS
);
974 def
= &tcg_op_defs
[op
];
975 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
976 for(i
= 0; i
< nb_args
; i
++) {
977 ct_str
= tdefs
->args_ct_str
[i
];
978 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
979 def
->args_ct
[i
].ct
= 0;
980 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
982 oarg
= ct_str
[0] - '0';
983 assert(oarg
< def
->nb_oargs
);
984 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
985 /* TCG_CT_ALIAS is for the output arguments. The input
986 argument is tagged with TCG_CT_IALIAS. */
987 def
->args_ct
[i
] = def
->args_ct
[oarg
];
988 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
989 def
->args_ct
[oarg
].alias_index
= i
;
990 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
991 def
->args_ct
[i
].alias_index
= oarg
;
998 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1002 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1003 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1004 ct_str
, i
, def
->name
);
1012 /* sort the constraints (XXX: this is just an heuristic) */
1013 sort_constraints(def
, 0, def
->nb_oargs
);
1014 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1020 printf("%s: sorted=", def
->name
);
1021 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1022 printf(" %d", def
->sorted_args
[i
]);
1031 #ifdef USE_LIVENESS_ANALYSIS
1033 /* set a nop for an operation using 'nb_args' */
1034 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1035 TCGArg
*args
, int nb_args
)
1038 *opc_ptr
= INDEX_op_nop
;
1040 *opc_ptr
= INDEX_op_nopn
;
1042 args
[nb_args
- 1] = nb_args
;
1046 /* liveness analysis: end of function: globals are live, temps are
1048 /* XXX: at this stage, not used as there would be little gains because
1049 most TBs end with a conditional jump. */
1050 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
)
1052 memset(dead_temps
, 0, s
->nb_globals
);
1053 memset(dead_temps
+ s
->nb_globals
, 1, s
->nb_temps
- s
->nb_globals
);
1056 /* liveness analysis: end of basic block: globals are live, temps are
1057 dead, local temps are live. */
1058 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
)
1063 memset(dead_temps
, 0, s
->nb_globals
);
1064 ts
= &s
->temps
[s
->nb_globals
];
1065 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1074 /* Liveness analysis : update the opc_dead_iargs array to tell if a
1075 given input arguments is dead. Instructions updating dead
1076 temporaries are removed. */
1077 static void tcg_liveness_analysis(TCGContext
*s
)
1079 int i
, op_index
, op
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1081 const TCGOpDef
*def
;
1082 uint8_t *dead_temps
;
1083 unsigned int dead_iargs
;
1085 gen_opc_ptr
++; /* skip end */
1087 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1089 s
->op_dead_iargs
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1091 dead_temps
= tcg_malloc(s
->nb_temps
);
1092 memset(dead_temps
, 1, s
->nb_temps
);
1094 args
= gen_opparam_ptr
;
1095 op_index
= nb_ops
- 1;
1096 while (op_index
>= 0) {
1097 op
= gen_opc_buf
[op_index
];
1098 def
= &tcg_op_defs
[op
];
1106 nb_iargs
= args
[0] & 0xffff;
1107 nb_oargs
= args
[0] >> 16;
1109 call_flags
= args
[nb_oargs
+ nb_iargs
];
1111 /* pure functions can be removed if their result is not
1113 if (call_flags
& TCG_CALL_PURE
) {
1114 for(i
= 0; i
< nb_oargs
; i
++) {
1116 if (!dead_temps
[arg
])
1117 goto do_not_remove_call
;
1119 tcg_set_nop(s
, gen_opc_buf
+ op_index
,
1124 /* output args are dead */
1125 for(i
= 0; i
< nb_oargs
; i
++) {
1127 dead_temps
[arg
] = 1;
1130 if (!(call_flags
& TCG_CALL_CONST
)) {
1131 /* globals are live (they may be used by the call) */
1132 memset(dead_temps
, 0, s
->nb_globals
);
1135 /* input args are live */
1137 for(i
= 0; i
< nb_iargs
; i
++) {
1138 arg
= args
[i
+ nb_oargs
];
1139 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1140 if (dead_temps
[arg
]) {
1141 dead_iargs
|= (1 << i
);
1143 dead_temps
[arg
] = 0;
1146 s
->op_dead_iargs
[op_index
] = dead_iargs
;
1151 case INDEX_op_set_label
:
1153 /* mark end of basic block */
1154 tcg_la_bb_end(s
, dead_temps
);
1156 case INDEX_op_debug_insn_start
:
1157 args
-= def
->nb_args
;
1163 case INDEX_op_discard
:
1165 /* mark the temporary as dead */
1166 dead_temps
[args
[0]] = 1;
1170 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1172 args
-= def
->nb_args
;
1173 nb_iargs
= def
->nb_iargs
;
1174 nb_oargs
= def
->nb_oargs
;
1176 /* Test if the operation can be removed because all
1177 its outputs are dead. We assume that nb_oargs == 0
1178 implies side effects */
1179 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1180 for(i
= 0; i
< nb_oargs
; i
++) {
1182 if (!dead_temps
[arg
])
1185 tcg_set_nop(s
, gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1186 #ifdef CONFIG_PROFILER
1192 /* output args are dead */
1193 for(i
= 0; i
< nb_oargs
; i
++) {
1195 dead_temps
[arg
] = 1;
1198 /* if end of basic block, update */
1199 if (def
->flags
& TCG_OPF_BB_END
) {
1200 tcg_la_bb_end(s
, dead_temps
);
1201 } else if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1202 /* globals are live */
1203 memset(dead_temps
, 0, s
->nb_globals
);
1206 /* input args are live */
1208 for(i
= 0; i
< nb_iargs
; i
++) {
1209 arg
= args
[i
+ nb_oargs
];
1210 if (dead_temps
[arg
]) {
1211 dead_iargs
|= (1 << i
);
1213 dead_temps
[arg
] = 0;
1215 s
->op_dead_iargs
[op_index
] = dead_iargs
;
1222 if (args
!= gen_opparam_buf
)
1226 /* dummy liveness analysis */
1227 void tcg_liveness_analysis(TCGContext
*s
)
1230 nb_ops
= gen_opc_ptr
- gen_opc_buf
;
1232 s
->op_dead_iargs
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1233 memset(s
->op_dead_iargs
, 0, nb_ops
* sizeof(uint16_t));
1238 static void dump_regs(TCGContext
*s
)
1244 for(i
= 0; i
< s
->nb_temps
; i
++) {
1246 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1247 switch(ts
->val_type
) {
1249 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1252 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1254 case TEMP_VAL_CONST
:
1255 printf("$0x%" TCG_PRIlx
, ts
->val
);
1267 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1268 if (s
->reg_to_temp
[i
] >= 0) {
1270 tcg_target_reg_names
[i
],
1271 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1276 static void check_regs(TCGContext
*s
)
1282 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1283 k
= s
->reg_to_temp
[reg
];
1286 if (ts
->val_type
!= TEMP_VAL_REG
||
1288 printf("Inconsistency for register %s:\n",
1289 tcg_target_reg_names
[reg
]);
1294 for(k
= 0; k
< s
->nb_temps
; k
++) {
1296 if (ts
->val_type
== TEMP_VAL_REG
&&
1298 s
->reg_to_temp
[ts
->reg
] != k
) {
1299 printf("Inconsistency for temp %s:\n",
1300 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1302 printf("reg state:\n");
1310 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1313 ts
= &s
->temps
[temp
];
1314 s
->current_frame_offset
= (s
->current_frame_offset
+ sizeof(tcg_target_long
) - 1) & ~(sizeof(tcg_target_long
) - 1);
1315 if (s
->current_frame_offset
+ sizeof(tcg_target_long
) > s
->frame_end
)
1317 ts
->mem_offset
= s
->current_frame_offset
;
1318 ts
->mem_reg
= s
->frame_reg
;
1319 ts
->mem_allocated
= 1;
1320 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1323 /* free register 'reg' by spilling the corresponding temporary if necessary */
1324 static void tcg_reg_free(TCGContext
*s
, int reg
)
1329 temp
= s
->reg_to_temp
[reg
];
1331 ts
= &s
->temps
[temp
];
1332 assert(ts
->val_type
== TEMP_VAL_REG
);
1333 if (!ts
->mem_coherent
) {
1334 if (!ts
->mem_allocated
)
1335 temp_allocate_frame(s
, temp
);
1336 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1338 ts
->val_type
= TEMP_VAL_MEM
;
1339 s
->reg_to_temp
[reg
] = -1;
1343 /* Allocate a register belonging to reg1 & ~reg2 */
1344 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1349 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1351 /* first try free registers */
1352 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1353 reg
= tcg_target_reg_alloc_order
[i
];
1354 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1358 /* XXX: do better spill choice */
1359 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1360 reg
= tcg_target_reg_alloc_order
[i
];
1361 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1362 tcg_reg_free(s
, reg
);
1370 /* save a temporary to memory. 'allocated_regs' is used in case a
1371 temporary registers needs to be allocated to store a constant. */
1372 static void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1377 ts
= &s
->temps
[temp
];
1378 if (!ts
->fixed_reg
) {
1379 switch(ts
->val_type
) {
1381 tcg_reg_free(s
, ts
->reg
);
1384 ts
->val_type
= TEMP_VAL_MEM
;
1386 case TEMP_VAL_CONST
:
1387 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1389 if (!ts
->mem_allocated
)
1390 temp_allocate_frame(s
, temp
);
1391 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1392 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1393 ts
->val_type
= TEMP_VAL_MEM
;
1403 /* save globals to their cannonical location and assume they can be
1404 modified be the following code. 'allocated_regs' is used in case a
1405 temporary registers needs to be allocated to store a constant. */
1406 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1410 for(i
= 0; i
< s
->nb_globals
; i
++) {
1411 temp_save(s
, i
, allocated_regs
);
1415 /* at the end of a basic block, we assume all temporaries are dead and
1416 all globals are stored at their canonical location. */
1417 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1422 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1424 if (ts
->temp_local
) {
1425 temp_save(s
, i
, allocated_regs
);
1427 if (ts
->val_type
== TEMP_VAL_REG
) {
1428 s
->reg_to_temp
[ts
->reg
] = -1;
1430 ts
->val_type
= TEMP_VAL_DEAD
;
1434 save_globals(s
, allocated_regs
);
1437 #define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1439 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
)
1442 tcg_target_ulong val
;
1444 ots
= &s
->temps
[args
[0]];
1447 if (ots
->fixed_reg
) {
1448 /* for fixed registers, we do not do any constant
1450 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1452 /* The movi is not explicitly generated here */
1453 if (ots
->val_type
== TEMP_VAL_REG
)
1454 s
->reg_to_temp
[ots
->reg
] = -1;
1455 ots
->val_type
= TEMP_VAL_CONST
;
1460 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1462 unsigned int dead_iargs
)
1466 const TCGArgConstraint
*arg_ct
;
1468 ots
= &s
->temps
[args
[0]];
1469 ts
= &s
->temps
[args
[1]];
1470 arg_ct
= &def
->args_ct
[0];
1472 /* XXX: always mark arg dead if IS_DEAD_IARG(0) */
1473 if (ts
->val_type
== TEMP_VAL_REG
) {
1474 if (IS_DEAD_IARG(0) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1475 /* the mov can be suppressed */
1476 if (ots
->val_type
== TEMP_VAL_REG
)
1477 s
->reg_to_temp
[ots
->reg
] = -1;
1479 s
->reg_to_temp
[reg
] = -1;
1480 ts
->val_type
= TEMP_VAL_DEAD
;
1482 if (ots
->val_type
== TEMP_VAL_REG
) {
1485 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1487 if (ts
->reg
!= reg
) {
1488 tcg_out_mov(s
, reg
, ts
->reg
);
1491 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1492 if (ots
->val_type
== TEMP_VAL_REG
) {
1495 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, s
->reserved_regs
);
1497 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1498 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1499 if (ots
->fixed_reg
) {
1501 tcg_out_movi(s
, ots
->type
, reg
, ts
->val
);
1503 /* propagate constant */
1504 if (ots
->val_type
== TEMP_VAL_REG
)
1505 s
->reg_to_temp
[ots
->reg
] = -1;
1506 ots
->val_type
= TEMP_VAL_CONST
;
1513 s
->reg_to_temp
[reg
] = args
[0];
1515 ots
->val_type
= TEMP_VAL_REG
;
1516 ots
->mem_coherent
= 0;
1519 static void tcg_reg_alloc_op(TCGContext
*s
,
1520 const TCGOpDef
*def
, int opc
,
1522 unsigned int dead_iargs
)
1524 TCGRegSet allocated_regs
;
1525 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1527 const TCGArgConstraint
*arg_ct
;
1529 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1530 int const_args
[TCG_MAX_OP_ARGS
];
1532 nb_oargs
= def
->nb_oargs
;
1533 nb_iargs
= def
->nb_iargs
;
1535 /* copy constants */
1536 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1537 args
+ nb_oargs
+ nb_iargs
,
1538 sizeof(TCGArg
) * def
->nb_cargs
);
1540 /* satisfy input constraints */
1541 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1542 for(k
= 0; k
< nb_iargs
; k
++) {
1543 i
= def
->sorted_args
[nb_oargs
+ k
];
1545 arg_ct
= &def
->args_ct
[i
];
1546 ts
= &s
->temps
[arg
];
1547 if (ts
->val_type
== TEMP_VAL_MEM
) {
1548 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1549 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1550 ts
->val_type
= TEMP_VAL_REG
;
1552 ts
->mem_coherent
= 1;
1553 s
->reg_to_temp
[reg
] = arg
;
1554 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1555 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1556 /* constant is OK for instruction */
1558 new_args
[i
] = ts
->val
;
1561 /* need to move to a register */
1562 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1563 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1564 ts
->val_type
= TEMP_VAL_REG
;
1566 ts
->mem_coherent
= 0;
1567 s
->reg_to_temp
[reg
] = arg
;
1570 assert(ts
->val_type
== TEMP_VAL_REG
);
1571 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1572 if (ts
->fixed_reg
) {
1573 /* if fixed register, we must allocate a new register
1574 if the alias is not the same register */
1575 if (arg
!= args
[arg_ct
->alias_index
])
1576 goto allocate_in_reg
;
1578 /* if the input is aliased to an output and if it is
1579 not dead after the instruction, we must allocate
1580 a new register and move it */
1581 if (!IS_DEAD_IARG(i
- nb_oargs
))
1582 goto allocate_in_reg
;
1586 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1587 /* nothing to do : the constraint is satisfied */
1590 /* allocate a new register matching the constraint
1591 and move the temporary register into it */
1592 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1593 tcg_out_mov(s
, reg
, ts
->reg
);
1597 tcg_regset_set_reg(allocated_regs
, reg
);
1601 if (def
->flags
& TCG_OPF_BB_END
) {
1602 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1604 /* mark dead temporaries and free the associated registers */
1605 for(i
= 0; i
< nb_iargs
; i
++) {
1606 arg
= args
[nb_oargs
+ i
];
1607 if (IS_DEAD_IARG(i
)) {
1608 ts
= &s
->temps
[arg
];
1609 if (!ts
->fixed_reg
) {
1610 if (ts
->val_type
== TEMP_VAL_REG
)
1611 s
->reg_to_temp
[ts
->reg
] = -1;
1612 ts
->val_type
= TEMP_VAL_DEAD
;
1617 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1618 /* XXX: permit generic clobber register list ? */
1619 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1620 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1621 tcg_reg_free(s
, reg
);
1624 /* XXX: for load/store we could do that only for the slow path
1625 (i.e. when a memory callback is called) */
1627 /* store globals and free associated registers (we assume the insn
1628 can modify any global. */
1629 save_globals(s
, allocated_regs
);
1632 /* satisfy the output constraints */
1633 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1634 for(k
= 0; k
< nb_oargs
; k
++) {
1635 i
= def
->sorted_args
[k
];
1637 arg_ct
= &def
->args_ct
[i
];
1638 ts
= &s
->temps
[arg
];
1639 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1640 reg
= new_args
[arg_ct
->alias_index
];
1642 /* if fixed register, we try to use it */
1644 if (ts
->fixed_reg
&&
1645 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1648 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1650 tcg_regset_set_reg(allocated_regs
, reg
);
1651 /* if a fixed register is used, then a move will be done afterwards */
1652 if (!ts
->fixed_reg
) {
1653 if (ts
->val_type
== TEMP_VAL_REG
)
1654 s
->reg_to_temp
[ts
->reg
] = -1;
1655 ts
->val_type
= TEMP_VAL_REG
;
1657 /* temp value is modified, so the value kept in memory is
1658 potentially not the same */
1659 ts
->mem_coherent
= 0;
1660 s
->reg_to_temp
[reg
] = arg
;
1667 /* emit instruction */
1668 tcg_out_op(s
, opc
, new_args
, const_args
);
1670 /* move the outputs in the correct register if needed */
1671 for(i
= 0; i
< nb_oargs
; i
++) {
1672 ts
= &s
->temps
[args
[i
]];
1674 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
1675 tcg_out_mov(s
, ts
->reg
, reg
);
1680 #ifdef TCG_TARGET_STACK_GROWSUP
1681 #define STACK_DIR(x) (-(x))
1683 #define STACK_DIR(x) (x)
1686 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
1687 int opc
, const TCGArg
*args
,
1688 unsigned int dead_iargs
)
1690 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
1691 TCGArg arg
, func_arg
;
1693 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
1694 int const_func_arg
, allocate_args
;
1695 TCGRegSet allocated_regs
;
1696 const TCGArgConstraint
*arg_ct
;
1700 nb_oargs
= arg
>> 16;
1701 nb_iargs
= arg
& 0xffff;
1702 nb_params
= nb_iargs
- 1;
1704 flags
= args
[nb_oargs
+ nb_iargs
];
1706 nb_regs
= tcg_target_get_call_iarg_regs_count(flags
);
1707 if (nb_regs
> nb_params
)
1708 nb_regs
= nb_params
;
1710 /* assign stack slots first */
1711 /* XXX: preallocate call stack */
1712 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
1713 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
1714 ~(TCG_TARGET_STACK_ALIGN
- 1);
1715 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
1716 if (allocate_args
) {
1717 tcg_out_addi(s
, TCG_REG_CALL_STACK
, -STACK_DIR(call_stack_size
));
1720 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
1721 for(i
= nb_regs
; i
< nb_params
; i
++) {
1722 arg
= args
[nb_oargs
+ i
];
1723 #ifdef TCG_TARGET_STACK_GROWSUP
1724 stack_offset
-= sizeof(tcg_target_long
);
1726 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1727 ts
= &s
->temps
[arg
];
1728 if (ts
->val_type
== TEMP_VAL_REG
) {
1729 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
1730 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1731 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1733 /* XXX: not correct if reading values from the stack */
1734 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1735 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1736 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1737 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1739 /* XXX: sign extend may be needed on some targets */
1740 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1741 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
1746 #ifndef TCG_TARGET_STACK_GROWSUP
1747 stack_offset
+= sizeof(tcg_target_long
);
1751 /* assign input registers */
1752 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1753 for(i
= 0; i
< nb_regs
; i
++) {
1754 arg
= args
[nb_oargs
+ i
];
1755 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1756 ts
= &s
->temps
[arg
];
1757 reg
= tcg_target_call_iarg_regs
[i
];
1758 tcg_reg_free(s
, reg
);
1759 if (ts
->val_type
== TEMP_VAL_REG
) {
1760 if (ts
->reg
!= reg
) {
1761 tcg_out_mov(s
, reg
, ts
->reg
);
1763 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
1764 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1765 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1766 /* XXX: sign extend ? */
1767 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1771 tcg_regset_set_reg(allocated_regs
, reg
);
1775 /* assign function address */
1776 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
1777 arg_ct
= &def
->args_ct
[0];
1778 ts
= &s
->temps
[func_arg
];
1779 func_addr
= ts
->val
;
1781 if (ts
->val_type
== TEMP_VAL_MEM
) {
1782 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1783 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1785 tcg_regset_set_reg(allocated_regs
, reg
);
1786 } else if (ts
->val_type
== TEMP_VAL_REG
) {
1788 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1789 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1790 tcg_out_mov(s
, reg
, ts
->reg
);
1793 tcg_regset_set_reg(allocated_regs
, reg
);
1794 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1795 if (tcg_target_const_match(func_addr
, arg_ct
)) {
1797 func_arg
= func_addr
;
1799 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1800 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
1802 tcg_regset_set_reg(allocated_regs
, reg
);
1809 /* mark dead temporaries and free the associated registers */
1810 for(i
= 0; i
< nb_iargs
; i
++) {
1811 arg
= args
[nb_oargs
+ i
];
1812 if (IS_DEAD_IARG(i
)) {
1813 ts
= &s
->temps
[arg
];
1814 if (!ts
->fixed_reg
) {
1815 if (ts
->val_type
== TEMP_VAL_REG
)
1816 s
->reg_to_temp
[ts
->reg
] = -1;
1817 ts
->val_type
= TEMP_VAL_DEAD
;
1822 /* clobber call registers */
1823 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1824 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1825 tcg_reg_free(s
, reg
);
1829 /* store globals and free associated registers (we assume the call
1830 can modify any global. */
1831 if (!(flags
& TCG_CALL_CONST
)) {
1832 save_globals(s
, allocated_regs
);
1835 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
1837 if (allocate_args
) {
1838 tcg_out_addi(s
, TCG_REG_CALL_STACK
, STACK_DIR(call_stack_size
));
1841 /* assign output registers and emit moves if needed */
1842 for(i
= 0; i
< nb_oargs
; i
++) {
1844 ts
= &s
->temps
[arg
];
1845 reg
= tcg_target_call_oarg_regs
[i
];
1846 assert(s
->reg_to_temp
[reg
] == -1);
1847 if (ts
->fixed_reg
) {
1848 if (ts
->reg
!= reg
) {
1849 tcg_out_mov(s
, ts
->reg
, reg
);
1852 if (ts
->val_type
== TEMP_VAL_REG
)
1853 s
->reg_to_temp
[ts
->reg
] = -1;
1854 ts
->val_type
= TEMP_VAL_REG
;
1856 ts
->mem_coherent
= 0;
1857 s
->reg_to_temp
[reg
] = arg
;
1861 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
1864 #ifdef CONFIG_PROFILER
1866 static int64_t tcg_table_op_count
[NB_OPS
];
1868 static void dump_op_count(void)
1872 f
= fopen("/tmp/op.log", "w");
1873 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
1874 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
1881 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
1885 const TCGOpDef
*def
;
1886 unsigned int dead_iargs
;
1890 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
1892 tcg_dump_ops(s
, logfile
);
1897 #ifdef CONFIG_PROFILER
1898 s
->la_time
-= profile_getclock();
1900 tcg_liveness_analysis(s
);
1901 #ifdef CONFIG_PROFILER
1902 s
->la_time
+= profile_getclock();
1906 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
1907 qemu_log("OP after liveness analysis:\n");
1908 tcg_dump_ops(s
, logfile
);
1913 tcg_reg_alloc_start(s
);
1915 s
->code_buf
= gen_code_buf
;
1916 s
->code_ptr
= gen_code_buf
;
1918 args
= gen_opparam_buf
;
1922 opc
= gen_opc_buf
[op_index
];
1923 #ifdef CONFIG_PROFILER
1924 tcg_table_op_count
[opc
]++;
1926 def
= &tcg_op_defs
[opc
];
1928 printf("%s: %d %d %d\n", def
->name
,
1929 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
1933 case INDEX_op_mov_i32
:
1934 #if TCG_TARGET_REG_BITS == 64
1935 case INDEX_op_mov_i64
:
1937 dead_iargs
= s
->op_dead_iargs
[op_index
];
1938 tcg_reg_alloc_mov(s
, def
, args
, dead_iargs
);
1940 case INDEX_op_movi_i32
:
1941 #if TCG_TARGET_REG_BITS == 64
1942 case INDEX_op_movi_i64
:
1944 tcg_reg_alloc_movi(s
, args
);
1946 case INDEX_op_debug_insn_start
:
1947 /* debug instruction */
1957 case INDEX_op_discard
:
1960 ts
= &s
->temps
[args
[0]];
1961 /* mark the temporary as dead */
1962 if (!ts
->fixed_reg
) {
1963 if (ts
->val_type
== TEMP_VAL_REG
)
1964 s
->reg_to_temp
[ts
->reg
] = -1;
1965 ts
->val_type
= TEMP_VAL_DEAD
;
1969 case INDEX_op_set_label
:
1970 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
1971 tcg_out_label(s
, args
[0], (long)s
->code_ptr
);
1974 dead_iargs
= s
->op_dead_iargs
[op_index
];
1975 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
, dead_iargs
);
1980 /* Note: in order to speed up the code, it would be much
1981 faster to have specialized register allocator functions for
1982 some common argument patterns */
1983 dead_iargs
= s
->op_dead_iargs
[op_index
];
1984 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_iargs
);
1987 args
+= def
->nb_args
;
1989 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2001 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2003 #ifdef CONFIG_PROFILER
2006 n
= (gen_opc_ptr
- gen_opc_buf
);
2008 if (n
> s
->op_count_max
)
2009 s
->op_count_max
= n
;
2011 s
->temp_count
+= s
->nb_temps
;
2012 if (s
->nb_temps
> s
->temp_count_max
)
2013 s
->temp_count_max
= s
->nb_temps
;
2017 tcg_gen_code_common(s
, gen_code_buf
, -1);
2019 /* flush instruction cache */
2020 flush_icache_range((unsigned long)gen_code_buf
,
2021 (unsigned long)s
->code_ptr
);
2022 return s
->code_ptr
- gen_code_buf
;
2025 /* Return the index of the micro operation such as the pc after is <
2026 offset bytes from the start of the TB. The contents of gen_code_buf must
2027 not be changed, though writing the same values is ok.
2028 Return -1 if not found. */
2029 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2031 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2034 #ifdef CONFIG_PROFILER
2035 void tcg_dump_info(FILE *f
,
2036 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...))
2038 TCGContext
*s
= &tcg_ctx
;
2041 tot
= s
->interm_time
+ s
->code_time
;
2042 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2044 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2046 s
->tb_count1
- s
->tb_count
,
2047 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2048 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2049 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2050 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2052 (double)s
->del_op_count
/ s
->tb_count
: 0);
2053 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2055 (double)s
->temp_count
/ s
->tb_count
: 0,
2058 cpu_fprintf(f
, "cycles/op %0.1f\n",
2059 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2060 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2061 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2062 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2063 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2066 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2067 (double)s
->interm_time
/ tot
* 100.0);
2068 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2069 (double)s
->code_time
/ tot
* 100.0);
2070 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2071 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2072 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2074 cpu_fprintf(f
, " avg cycles %0.1f\n",
2075 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2080 void tcg_dump_info(FILE *f
,
2081 int (*cpu_fprintf
)(FILE *f
, const char *fmt
, ...))
2083 cpu_fprintf(f
, "[TCG profiler not compiled]\n");